Weak magnetic detection device for cable defects

Abstract

The utility model relates to a weak magnetic detection device for cable defects. The weak magnetic detection device comprises a shell, and a power supply, a magnetism gathering ring, a magnetic sensitive chip and a control circuit board which are arranged in the shell, the shell is made of a magnetic shielding material, at least one gap is formed in the left and right side surfaces, and a switch is arranged on the top surface; the control circuit board is placed at the bottom of the shell, the magnetic sensitive chip is arranged on the control circuit board, the magnetic gathering ring is arranged right above the magnetic sensitive chip, a small opening is formed in the magnetic gathering ring, and the small opening is right opposite to the magnetic sensitive chip. According to the utility model, whether a defect occurs in the cable is detected by judging the difference of magnetic field values, so that the defect that a contact type detection method needs to damage the structure of the cable is overcome, and the defects of high signal attenuation speed, high reliability and the like of common non-contact detection methods such as an ultrasonic detection method and a temperature detection method are overcome. The method overcomes the defects of limited detection distance and hysteresis quality, and has good practicability and detection precision.

Description

Technical Field

[0001] The present application relates to the technical field of cable defect detection, and in particular to a weak magnetic detection device for cable defects. Background Art

[0002] Currently, the main methods for detecting cable defects can be divided into contact testing and non-contact testing. Contact testing usually requires destroying the cable structure and forming a loop between the cable's central conductor or cable accessories and the detection device for detection. Non-contact testing does not require direct contact with the high-voltage cable. Instead, sensors detect the electromagnetic field or other physical properties around the cable to identify the cable's condition.

[0003] Common contact detection methods include the pulse current method and the differential method. The pulse current method, also known as the ERA method, typically uses a high-frequency current sensor (HFCT) or detection impedance to obtain partial discharge information. The ERA method may be affected by external electromagnetic interference during the detection process, thereby reducing detection accuracy. At the same time, the ERA method requires series connection with the cable. If the test sample is damaged, the input unit may be damaged, causing significant damage to the equipment. The differential method utilizes the principle of a bridge balanced circuit. A pair of metal platinum electrodes are attached to the sheath on each side of the cable's intermediate connector. These electrodes are used to collect partial discharge signals and verify pulse input. Although the differential method can effectively reduce common-mode interference, the unbalanced resistance or capacitance of the two lines of the differential signal may introduce errors. The differential method relies on the transmission of high-frequency signals, but high-frequency signals are severely attenuated in the cable, reducing monitoring sensitivity.

[0004] Common non-contact detection methods include ultrasonic testing and temperature detection. The ultrasonic detection method works by assuming that partial discharge (PD) within a cable or cable accessory generates vibrations and sounds, accompanied by explosive acoustic emissions. These waves quickly propagate into the surrounding medium. Ultrasonic sensors installed on the outside of the cable or cable accessory convert these signals into electrical signals, enabling detection of PD within the cable or cable accessory. However, ultrasonic waves attenuate very quickly in air, requiring proximity to the fault point to be effective. Otherwise, the signal collected by the ultrasonic sensor will be very weak. Temperature detection relies on the fact that PD within a cable or cable accessory is often accompanied by a localized temperature increase. Therefore, cable temperature monitoring can be used to determine if the cable is defective. However, temperature is significantly affected by the environment, resulting in significant attenuation. Furthermore, since temperature changes are not noticeable in the early stages of a cable fault, temperature detection exhibits significant hysteresis. Summary of the Invention

[0005] The purpose of the utility model is to provide a weak magnetic detection device for cable defects, which detects whether there are defects inside the cable by judging the difference in magnetic field values. It overcomes the defect that the contact detection method requires destruction of the cable structure, and overcomes the defects of common non-contact detection methods such as ultrasonic detection method and temperature detection method, such as fast signal attenuation, limited detection distance and hysteresis, and has good practicality and detection accuracy.

[0006] The technical solution adopted by the utility model is: a weak magnetic detection device for cable defects, including a shell and a power supply, a magnetic focusing ring, a magnetic sensitive chip and a control circuit board arranged inside the shell; the shell is made of magnetic shielding material, and at least one gap is provided on the left and right sides, and a switch is provided on the top surface; the control circuit board is placed at the bottom of the shell, the magnetic sensitive chip is arranged on the control circuit board, the magnetic focusing ring is arranged directly above the magnetic sensitive chip, and a small opening is opened on the magnetic focusing ring, and the small opening is directly opposite to the magnetic sensitive chip; the control circuit board includes a power supply, a power circuit, a filter circuit, an amplification circuit, an MCU and a communication module, the power supply The power supply is connected to the magnetic sensitive chip and the power supply circuit through the switch to provide electric energy for the magnetic sensitive chip and the power supply circuit. The power supply circuit is connected to the MCU and is used to convert the voltage of the power supply into the working voltage of the MCU. The input end of the filter circuit is connected to the output end of the magnetic sensitive chip and is used to filter out the clutter in the signal output by the magnetic sensitive chip. The input end of the amplifier circuit is connected to the output end of the filter circuit, and the output end is connected to the input end of the MCU to amplify the filtered input signal for processing by the MCU. The output end of the MCU is connected to the communication module, and communication with the host computer is achieved through the communication module to transmit the detection results of the magnetic sensitive chip.

[0007] Furthermore, the width of the gap is 0.5 cm to 1.5 cm, and the width of two adjacent gaps is 1 cm to 1.5 cm.

[0008] Furthermore, the magnetic shielding material includes iron, cobalt, nickel and permalloy.

[0009] Furthermore, the power supply circuit includes a power conversion chip, a twelfth capacitor and a thirteenth capacitor, the input end of the power conversion chip is connected to the positive pole of the power supply and one end of the thirteenth capacitor, the output end is connected to one end of the twelfth capacitor, and the ground end is grounded to the other ends of the twelfth capacitor and the thirteenth capacitor.

[0010] Furthermore, the filtering circuit includes an operational amplifier, a first resistor, a second resistor, a fifth resistor, a sixth resistor, a sixth capacitor and an eighth capacitor, wherein one end of the first resistor is grounded and the other end is connected to the inverting input of the operational amplifier, one end of the second resistor is connected to the inverting input of the operational amplifier and the other end is connected to the output of the operational amplifier, the fifth resistor and the sixth resistor are connected in series, one end is connected to the magnetic sensitive chip and the other end is connected to the non-inverting input of the operational amplifier, one end of the sixth capacitor is connected to the non-inverting input of the operational amplifier and the other end is grounded, and one end of the eighth capacitor is connected to the series point of the fifth resistor and the sixth resistor and the other end is connected to the output of the operational amplifier.

[0011] Furthermore, the amplifier circuit includes two operation units with mutually symmetrical circuit structures, an output unit, a seventh capacitor, and an eighth resistor; wherein the first operation unit includes a first input operational amplifier, a twenty-second resistor, a third capacitor, a twenty-fifth resistor, a fifth capacitor, a third resistor, a seventh resistor, a first capacitor, a twenty-first resistor, and a first diode, wherein one end of the twenty-second resistor is connected to the output of the operational amplifier in the filter circuit, and the other end is connected to the non-inverting input of the first input operational amplifier; one end of the third capacitor is connected to the non-inverting input of the first input operational amplifier, and the other end is grounded; the twenty-fifth resistor is connected in parallel with the fifth capacitor, and one end is connected to the inverting input of the first input operational amplifier, and the other end is connected to the output of the first input operational amplifier; the third resistor and the seventh resistor are connected in series, and one end is connected to the anode of the first diode, and the other end is connected to the positive power supply input of the first input operational amplifier; one end of the first capacitor is connected to the positive power supply input of the first input operational amplifier, and the other end is grounded; one end of the twenty-first resistor is connected to the positive electrode of the power supply, and the other end is connected to the positive power supply input of the first input operational amplifier; the cathode of the first diode is connected to the series connection point of the third resistor and the seventh resistor;

[0012] The second operation unit includes a second input operational amplifier, a twelfth resistor, a ninth capacitor, a ninth resistor, an eighth capacitor, a tenth resistor, an eleventh resistor, a tenth capacitor, a fifteenth resistor and a second diode, wherein the second input operational amplifier is symmetrically arranged with the first input operational amplifier, the twelfth resistor is symmetrically arranged with the twenty-second resistor, the ninth capacitor is symmetrically arranged with the third capacitor, the ninth resistor is symmetrically arranged with the twenty-fifth resistor, the eighth capacitor is symmetrically arranged with the fifth capacitor, the tenth resistor is symmetrically arranged with the seventh resistor, the eleventh resistor is symmetrically arranged with the third resistor, the tenth capacitor is symmetrically arranged with the first capacitor, the fifteenth resistor is symmetrically arranged with the twenty-first resistor, and the second diode is symmetrically arranged with the first diode; the positive power input terminal and the negative power input terminal of the second input operational amplifier are respectively connected to the positive power input terminal and the negative power input terminal of the first input operational amplifier; one end of the fifteenth resistor is connected to the negative electrode of the power supply; and the seventh resistor is connected in series with the tenth resistor;

[0013] The output unit includes an output operational amplifier, a fourth resistor, a twenty-sixth resistor, a second capacitor and a twenty-sixth capacitor. After the fourth resistor and the twenty-sixth resistor are connected in series, one end of the fourth resistor and the twenty-sixth resistor are connected to the output end of the first input operational amplifier, and the other end is connected to the output end of the second input operational amplifier. The non-inverting input end of the output operational amplifier is connected to the series connection point of the fourth resistor and the twenty-sixth resistor, the inverting input end is connected to the series connection point of the seventh resistor and the tenth resistor, the positive power input end is connected to the positive electrode of the power supply, the negative power input end is connected to the negative electrode of the power supply, and the output end is connected to the MCU; one end of the second capacitor is connected to the positive power input end of the output operational amplifier, and the other end is grounded; one end of the twenty-sixth capacitor is connected to the negative power input end of the output operational amplifier, and the other end is grounded;

[0014] One end of the seventh capacitor is connected to the non-inverting input terminal of the first input operational amplifier, and the other end is connected to the non-inverting input terminal of the second input operational amplifier. One end of the eighth resistor is connected to the inverting input terminal of the first input operational amplifier, and the other end is connected to the inverting input terminal of the second input operational amplifier.

[0015] Furthermore, a reset circuit and a clock circuit are provided on the periphery of the MCU. The reset circuit includes a reset button, a twenty-third resistor, and a twenty-seventh capacitor. The reset button and the twenty-third resistor are connected in series, one end of which is connected to the output end of the power conversion chip and the other end is grounded. The twenty-seventh capacitor is connected in parallel with the reset button, and the end of the reset button connected to the twenty-third resistor is also connected to the MCU.

[0016] The clock circuit includes two clock modules with the same structure. Each clock module includes a crystal oscillator and two capacitors. One end of the two capacitors is connected to the crystal oscillator respectively, and the other end is grounded. The two ends of the crystal oscillator are connected to the MCU.

[0017] Furthermore, the communication module is a Bluetooth module, the power input terminal of the Bluetooth module is connected to the positive electrode of the power supply, the ground terminal is grounded, and the signal input terminal is connected to the MCU.

[0018] The beneficial effects of the present invention are as follows: the present invention detects whether there are defects inside the cable by detecting the weak magnetic field on the surface of the high-voltage cable and judging the difference in the magnetic field values; compared with the traditional contact method of measuring the cable, there is no need to contact the inside of the cable, thus avoiding damage to the cable; no power outage is required, thus ensuring the normal operation of the power system; the weak magnetic detection chip has high sensitivity, which can detect cable defects in the early stage to avoid further expansion of cable damage and more serious consequences, and has good immediacy; compared with the non-contact detection method, it can effectively overcome the problems of low detection accuracy caused by too fast signal attenuation and great influence of the environment; the present invention can collect the magnetic field strength in a specified direction to avoid noise interference in other directions. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 This is a schematic structural diagram of an embodiment of the present utility model;

[0021] Figure 2 This is a schematic diagram of the control structure of an embodiment of the utility model;

[0022] Figure 3 This is a circuit diagram of a power supply circuit in an embodiment of the present utility model;

[0023] Figure 4 1 is a circuit diagram of a filter circuit in an embodiment of the present utility model;

[0024] Figure 5 This is a circuit diagram of an amplifier circuit in an embodiment of the present utility model;

[0025] Figure 6 This is a schematic diagram of the structure of the MCU in the embodiment of the present utility model;

[0026] Figure 7 1 is a circuit diagram of a reset circuit in an embodiment of the present utility model;

[0027] Figure 8 This is a circuit diagram of a clock circuit in an embodiment of the present utility model;

[0028] Figure 9This is a schematic diagram of the structure of the communication module in the embodiment of the present utility model;

[0029] Figure 10 It is a structural diagram of the cable cross section;

[0030] Figure 11 Schematic diagram of the magnetic field intensity around the cable when the cable is free of defects and when it has defects, where (a) is the schematic diagram of the magnetic field intensity when the cable is free of defects, and (b) is the schematic diagram of the magnetic field intensity when it has defects;

[0031] Figure 12 The magnetic field strength curves around the cable when the cable is free of defects and when the cable has defects;

[0032] Figure 13 This is a schematic diagram of the pins of the magnetic sensitive chip in the embodiment of the present utility model;

[0033] Figure 14 It is a schematic diagram of the mathematical model of the utility model in use.

[0034] Explanation of the accompanying symbols: 1-shell, 2-power supply, 3-magnetic focusing ring, 4-magnetic sensitive chip, 5-control circuit board, 6-gap, 7-switch, 9-power circuit, 10-filter circuit, 11-amplifier circuit, 12-MCU, 13-communication module, 14-core, 15-inner semiconductor layer, 16-insulating layer, 17-outer semiconductor layer, 18-water blocking layer, 19-armor layer, 20-outer sheath. DETAILED DESCRIPTION

[0035] In order to more clearly understand the above-mentioned purposes, features and advantages of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can also be implemented in other ways different from those described herein. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0036] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by persons having ordinary skills in the field described in this application. The words "first", "second" and similar terms used in this patent application specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "a" or "an" do not indicate a quantity limitation, but rather indicate the existence of at least one. Words such as "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship also changes accordingly.

[0037] like Figure 1~Figure 2 As shown, a weak magnetic detection device for cable defects includes a housing 1 and a power supply 2, a magnetic focusing ring 3, a magnetic sensitive chip 4, and a control circuit board 5 disposed inside the housing 1. The housing 1 is made of a high-magnetic-permeability material, with at least one gap 6 provided on the left and right sides, and a switch 7 provided on the top. The housing 1 is used to form a magnetic shielding space to prevent external magnetic fields from interfering with the magnetic focusing ring 3, the magnetic sensitive chip 4, and the control circuit board 5, thereby protecting sensitive equipment from the influence of the magnetic field. Therefore, the housing 1 must be made of a magnetic shielding material. In an embodiment of the present utility model, the housing 1 is made of a high-magnetic-permeability material such as iron, cobalt, nickel, or permalloy, and three gaps 6 are provided on the left and right sides of the housing 1. The width of the gaps 6 is 0.5 cm to 1.5 cm, and the width of two adjacent gaps 6 is 1 cm to 1.5 cm. The gaps 6 allow horizontal magnetic fields to pass through the housing 1, while magnetic fields other than the horizontal direction are shielded by the housing 1. The switch 7 is used to control the opening and closing of the present utility model embodiment. In the embodiment of the present invention, the housing 1 is a cuboid with a length of 10 cm, a width of 10 cm, and a height of 7 cm. There are three gaps 6 , each of which has a width of 1 cm, and the width between two adjacent gaps 6 is 1 cm.

[0038] The control circuit board 5 is placed at the bottom of the housing 1. The magnetic sensitive chip 4 is mounted on the control circuit board 5. The magnetic focusing ring 3 is positioned directly above the magnetic sensitive chip 4. A small opening is formed in the magnetic focusing ring 3, which faces the magnetic sensitive chip 4. The magnetic sensitive chip 4 is used to detect the magnetic field strength around the cable. The magnetic focusing ring 3 is made of ferromagnetic material, which can further concentrate the magnetic field signal, helping the magnetic sensitive chip 4 detect the magnetic field strength near the cable.

[0039] The control circuit board 5 includes a power supply 2, a power circuit 9, a filter circuit 10, an amplifier circuit 11, an MCU 12, and a communication module 13. The power supply 2 is connected to the magnetic sensing chip 4 and the power circuit 9 via the switch 7, providing electrical energy to the magnetic sensing chip 4 and the power circuit 9. The switch 7 can control the on / off connection of the power supply 2, the magnetic sensing chip 4, and the power circuit 9. The power circuit 9 is connected to the MCU 12 and is used to convert the voltage of the power supply 2 into an operating voltage for the MCU 12. In this embodiment, the power supply 2 has a supply voltage of 5V, and the operating voltage of the MCU 12 is 3.3V. The input end of the filter circuit 10 is connected to the output end of the magnetic sensing chip 4 to filter out noise from the signal output by the magnetic sensing chip 4, leaving only the signal generated around the cable. The input end of the amplifier circuit 11 is connected to the output end of the filter circuit 10, and the output end is connected to the input end of the MCU 12 to amplify the filtered input signal for processing by the MCU 12. The amplifier circuit 11 can amplify the output signal of the magnetic sensor chip 4, which is only tens of millivolts or hundreds of millivolts, to hundreds of millivolts or 1 volt. The output end of the MCU 12 is connected to the communication module 13, which communicates with the host computer through the communication module 13, transmits the detection results of the magnetic sensor chip 4, and displays them on the PC.

[0040] like Figure 3 As shown, the power supply circuit 9 includes a power conversion chip U2, a twelfth capacitor C12, and a thirteenth capacitor C13. In this embodiment of the utility model, the model of the power conversion chip U2 is ME6206A33XG. The input terminal VIN of the power conversion chip U2 is connected to the positive electrode of the power supply 2 and one end of the thirteenth capacitor C13. The output terminal VOUT is connected to one end of the twelfth capacitor C12 and outputs a 3.3V voltage. The ground terminal VSS and the other ends of the twelfth capacitor C12 and the thirteenth capacitor C13 are grounded. The twelfth capacitor C12 is used to filter input voltage noise, and the thirteenth capacitor C13 is used to filter output voltage noise.

[0041] like Figure 4As shown, the filtering circuit 10 includes an operational amplifier U1A, a first resistor R1, a second resistor R2, a fifth resistor R5, a sixth resistor R6, a sixth capacitor C6, and an eighth capacitor C8. In the embodiment of the present utility model, the model of the operational amplifier U1A is AD8657. One end of the first resistor R1 is grounded, and the other end is connected to the inverting input terminal of the operational amplifier U1A, that is, pin 6 of the operational amplifier U1A. One end of the second resistor R2 is connected to the inverting input terminal of the operational amplifier U1A, and the other end is connected to the output terminal of the operational amplifier U1A, that is, pin 7 of the operational amplifier U1A. The output signal of the magnetic sensitive chip 4 is recorded as IN2, and the output signal of the output terminal of the operational amplifier U1A is recorded as IN3. The fifth resistor R5 and the sixth resistor R6 are connected in series, with one end connected to the magnetic sensor chip 4 and the other end connected to the non-inverting input of the operational amplifier U1A, namely, pin 5 of the operational amplifier U1A. The sixth capacitor C6 has one end connected to the non-inverting input of the operational amplifier U1A and the other end connected to ground. The eighth capacitor C8 has one end connected to the series connection point of the fifth resistor R5 and the sixth resistor R6 and the other end connected to the output of the operational amplifier U1A. The first resistor R1 and the second resistor R2 are used to adjust the feedback voltage, the fifth resistor R5 and the sixth resistor R6 are used to distribute the input voltage, the sixth capacitor C6 is used for bypass filtering, and the eighth capacitor C8 is used for voltage stabilization.

[0042] like Figure 5 As shown, the amplifier circuit 11 includes two operation units with mutually symmetrical circuit structures, an output unit, a seventh capacitor C7 and an eighth resistor R8. Among them, the first operation unit includes a first input operational amplifier U2A, a twenty-second resistor R22, a third capacitor C3, a twenty-fifth resistor R25, a fifth capacitor C5, a third resistor R3, a seventh resistor R7, a first capacitor C1, a twenty-first resistor R21 and a first diode Q1. One end of the twenty-second resistor R22, i.e. Figure 5SIGNAL1+ in the filter circuit 10 is connected to the output terminal of the operational amplifier U1A in the filter circuit 10, and the other end is connected to the non-inverting input terminal of the first input operational amplifier U2A, that is, pin 3 of the first input operational amplifier U2A. One end of the third capacitor C3 is connected to the non-inverting input terminal of the first input operational amplifier U2A, and the other end is grounded. After the twenty-fifth resistor R25 is connected in parallel with the fifth capacitor C5, one end is connected to the inverting input terminal of the first input operational amplifier U2A, that is, pin 2 of the first input operational amplifier U2A, and the other end is connected to the output terminal of the first input operational amplifier U2A, that is, pin 2 of the first input operational amplifier U2A. A, the third resistor R3 and the seventh resistor R7 are connected in series, one end of which is connected to the anode of the first diode Q1, and the other end is connected to the positive power supply input of the first input operational amplifier U2A, that is, pin 8 of the first input operational amplifier U2A. One end of the first capacitor C1 is connected to the positive power supply input of the first input operational amplifier U2A, and the other end is grounded. One end of the twenty-first resistor R21 is connected to the positive electrode of the power supply 2, and the other end is connected to the positive power supply input of the first input operational amplifier U2A. The cathode of the first diode Q1 is connected to the series point of the third resistor R3 and the seventh resistor R7.

[0043] The second operation unit includes a second input operational amplifier U2B, a twelfth resistor R12, a ninth capacitor C9, a ninth resistor R9, an eighth capacitor C8, a tenth resistor R10, an eleventh resistor R11, a tenth capacitor C10, a fifteenth resistor R15, and a second diode Q2. One end of the twelfth resistor R12, i.e. Figure 5SIGNAL1- is grounded, and the other end is connected to the non-inverting input terminal of the second input operational amplifier U2B, that is, pin 5 of the second input operational amplifier U2B. One end of the ninth capacitor C9 is connected to the non-inverting input terminal of the second input operational amplifier U2B, and the other end is grounded. After the ninth resistor R9 and the eighth capacitor C8 are connected in parallel, one end is connected to the inverting input terminal of the second input operational amplifier U2B, that is, pin 6 of the second input operational amplifier U2B, and the other end is connected to the output terminal of the second input operational amplifier U2B, that is, pin 7 of the second input operational amplifier U2B. After the tenth resistor R10 and the eleventh resistor R11 are connected in series, one end is connected to the anode of the second diode Q2 and the negative power supply input terminal of the first input operational amplifier U2A, that is, the The first input operational amplifier U2A is connected to pin 4, and the other end is connected to the seventh resistor R7; one end of the tenth capacitor C10 is connected to the eleventh resistor R11, and the other end is grounded; one end of the fifteenth resistor R15 is connected to the eleventh resistor R11, and the other end is connected to the negative electrode of the power supply 2; the cathode of the second diode is connected to the series point of the tenth resistor R10 and the eleventh resistor R11; the positive power supply input terminal of the second input operational amplifier U2B, that is, pin 8 of the second input operational amplifier U2B is connected to the positive power supply input terminal of the first input operational amplifier U2A, and the negative power supply input terminal of the second input operational amplifier U2B, that is, pin 4 of the second input operational amplifier U2B is connected to the negative power supply input terminal of the first input operational amplifier U2A.

[0044] The output unit includes an output operational amplifier U3A, a fourth resistor R4, a twenty-sixth resistor R26, a second capacitor C2 and a twenty-sixth capacitor C26. The fourth resistor R4 and the twenty-sixth resistor R26 are connected in series, one end of which is connected to the output end of the first input operational amplifier U2A, and the other end is connected to the output end of the second input operational amplifier U2B. The non-inverting input terminal of the output operational amplifier U3A, that is, pin 3 of the output operational amplifier U3A, is connected to the series point of the fourth resistor R4 and the twenty-sixth resistor R26, the inverting input terminal of the output operational amplifier U3A, that is, pin 2 of the output operational amplifier U3A, is connected to the series point of the seventh resistor R7 and the tenth resistor R10, the positive power supply input terminal of the output operational amplifier U3A, that is, pin 8 of the output operational amplifier U3A, is connected to the positive electrode of the power supply 2, the negative power supply input terminal of the output operational amplifier U3A, that is, pin 4 of the output operational amplifier U3A, is connected to the negative electrode of the power supply 2, the output terminal of the output operational amplifier U3A, pin 1 of the output operational amplifier U3A is connected to the MCU 12, and the output signal of the output operational amplifier U3A is recorded as Shield0; one end of the second capacitor C2 is connected to the positive power supply input terminal of the output operational amplifier U3A, and the other end is grounded; one end of the twenty-sixth capacitor C26 is connected to the negative power supply input terminal of the output operational amplifier U3A, and the other end is grounded.

[0045] One end of the seventh capacitor C7 is connected to the non-inverting input of the first input operational amplifier U2A, and the other end is connected to the non-inverting input of the second input operational amplifier U2B. One end of the eighth resistor R8 is connected to the inverting input of the first input operational amplifier U2A, and the other end is connected to the inverting input of the second input operational amplifier U2B. In this embodiment of the utility model, the first input operational amplifier U2A, the second input operational amplifier U2B, and the output operational amplifier U3A are all TLC2272 models. The twenty-second resistor R22 is used to limit the input current, the third capacitor C3 is used for bypass filtering, the twenty-fifth resistor R25 is used to adjust the negative feedback voltage, the fifth capacitor C5 is used to stabilize the resistor voltage, the third resistor R3 and the seventh resistor R7 are used to distribute the voltage, the first capacitor C1 is used for bypass filtering, the twenty-first resistor R21 is used to buffer the power supply voltage, the twelfth resistor R12 is used to limit the input current, the ninth capacitor C9 is used for bypass filtering, the ninth resistor R9 is used to adjust the negative feedback voltage, the eighth capacitor C8 is used to stabilize the resistor voltage, the tenth resistor R10 and the eleventh resistor R11 are used to distribute the voltage, the tenth capacitor C10 is used for bypass filtering, the fifteenth resistor R15 is used to buffer the power supply voltage, the first diode Q1 and the second diode Q2 are used for voltage stabilization, the fourth resistor R4 and the sixth resistor R26 are used to adjust the output voltage, the second capacitor C2 and the twenty-sixth capacitor C26 are used for bypass filtering, the seventh capacitor C7 is used for voltage stabilization, and the eighth resistor R8 is used for amplification gain adjustment.

[0046] like Figure 6 As shown, the signal of MCU 12 used in the embodiment of the present invention is STM32F103CBT6. Pins 8, 23, 35 and 47 of MCU 12 are grounded, pins 9, 24, 3 and 48 are connected to the output terminal VOUT of the power conversion chip U2, and pin 11 is connected to the output signal of the output operational amplifier U3A. In the embodiment of the present invention, the MCU 12 is peripherally provided with a reset circuit and a clock circuit. The reset circuit is as shown in FIG. Figure 7 As shown, it includes a reset button SW2, a twenty-third resistor R23 and a twenty-seventh capacitor C27. The reset button SWE2 is connected in series with the twenty-third resistor R23, one end of which is connected to the output terminal VOUT of the power conversion chip U2 and the other end is grounded. The twenty-seventh capacitor C27 is connected in parallel with the reset button SW2. The reset button SW2 outputs a reset signal NRST at one end connected to the twenty-third resistor R23. The reset signal NRST is connected to pin 7 of the MCU 12 to reset the MCU 12. The twenty-third resistor R23 is used to limit the current, and the twenty-seventh capacitor C27 is used to filter out noise. The clock circuit is as shown in FIG. Figure 8 As shown, it includes two clock modules with the same structure, each clock module includes a crystal oscillator and two capacitors. The first clock module includes a first crystal oscillator X1, a twenty-eighth capacitor C28 and a twenty-ninth capacitor C29, one end of the twenty-eighth capacitor C28 and the twenty-ninth capacitor C29 are respectively connected to the first crystal oscillator X1, and the other end is grounded. The input end OSC-IN of the first crystal oscillator X1 is connected to pin 5 of the MCU 12, and the output end OSC-OUT is connected to pin 6 of the MCU 12. The second clock module includes a second crystal oscillator X2, a thirtieth capacitor C30 and a thirty-first capacitor C31, one end of the thirtieth capacitor C30 and the thirty-first capacitor C31 are respectively connected to the second crystal oscillator X2, and the other end is grounded. The input end OSC32-IN of the second crystal oscillator X2 is connected to pin 3 of the MCU 12, and the output end OSC32-OUT is connected to pin 4 of the MCU 12. The first crystal oscillator X1 has an 8 MHz frequency, and the second crystal oscillator X2 has a 32 kHz frequency. These two clock modules generate a sinusoidal voltage signal. The 28th and 30th capacitors C28 and C30 are used to filter output noise, while the 29th and 31st capacitors C29 and C31 are used to filter input noise.

[0047] like Figure 9As shown, the communication module 13 is a Bluetooth module. In this embodiment of the utility model, the model of the Bluetooth module is HC-05. The power input terminal VCC of the Bluetooth module is connected to the positive electrode of the power supply 2, the ground terminal GND is grounded, the signal input terminal RXD is connected to pin 31 of the MCU 12, and the signal output terminal TXD is connected to the host computer.

[0048] like Figure 10 As shown, the cable includes, from the inside to the outside, a core 14, an inner semiconducting layer 15, an insulating layer 16, an outer semiconducting layer 17, a water-blocking layer 18, an armor layer 19, and an outer sheath 20. When the cable is powered on and operating normally, a large current of several hundred amperes or even thousands of amperes flows through the core 14, and a circular magnetic field is generated around the outer sheath 20, with the direction of the magnetic field being Figure 10 When a tiny defect occurs somewhere in the cable, especially corrosion or insulation defects, it will cause tiny magnetic field distortion in a stable magnetic field environment. Figure 11 (a) is a schematic diagram of the magnetic field strength of the cable when there are no defects. Figure 11 (b) is a schematic diagram of the magnetic field strength when the cable is defective. Figure 12 The blue straight line is the magnetic field strength curve of the cable without defects, and the green straight line is the magnetic field strength curve of the cable with defects. Figure 11 and Figure 10 It can be seen that when there is a defect in the cable, the magnetic field strength value of the cable will have a deviation of about 10%. Different defects correspond to different deviation values. Therefore, the presence of defects in the cable can be detected by changing the magnetic field strength. When in use, the embodiment of the utility model is installed on the surface of the cable outer sheath 20. The sensitivity is maximum when the magnetic sensitive direction of the embodiment of the utility model is parallel to the direction of the magnetic field strength generated by the cable. Therefore, the magnetic sensitive direction of the embodiment of the utility model must be kept parallel to the direction of the cable magnetic field during installation.

[0049] Figure 13 FIG. 4 is a schematic diagram of the pins of the magnetic sensitive chip 4 in the embodiment of the present utility model. Figure 13 As shown, pins 1, 2, 7, and 8 of the magnetic sensing chip 4 are left floating. Pin 6 is a power supply pin connected to the positive terminal of the power supply 2. Pins 4 and 5 are output pins of the magnetic sensing chip 4, with pin 4 being the negative output port and pin 5 being the positive output port. The output signal IN2 of pin 5 is connected to the filter circuit 10. Pins 4 and 3 are grounded. The parameters of the magnetic sensing chip 4 in this embodiment of the utility model are shown in Table 1.

[0050] Table 1 Magnetic sensor chip parameters

[0051] Supply voltage (V) Sensitivity (mV / V / GS) Saturation magnetic field (Gs) Magnetic sensitivity direction 1~7 3.1 ±150 X-axis

[0052] like Figure 14 As shown, according to the Biot-Savart law, the magnetic field strength at any point P around a long straight wire is: , where B is the magnetic field strength; π is the circumference of the circle; and µ0 is the vacuum permeability, which is 4π×10 -7 ; I is the current passing through the conductor; r0 is the vertical distance from point P to the conductor; 1 is the angle between point P and the wire, 2 is the supplementary angle between point P and the wire. When the wire can be considered infinitely long, the long straight wire is equivalent to a cable. 1=0°, 2=180°, then the formula becomes . The embodiment of the present invention places the detection device on the surface of the cable, so the value of r0 is the radius of the cable, and the magnetic field strength B calculated according to the magnitude of the current I passing through the conductor in the cable is the magnitude of the magnetic field strength on the surface of the cable. According to the sensitivity of the magnetic sensitive chip 4 and the supply voltage of the power supply 2 in Table 1, when the supply voltage is 5V, the sensitivity of the magnetic sensitive chip 4 is 5×3.1=15.5mV / GS, and the output voltage Vout of the magnetic sensitive chip 4 = 15.5×B (mV). When there is a defect in the cable, the magnetic field strength B on the surface of the cable will change, causing the voltage value output by the embodiment of the present invention to change accordingly, thereby detecting whether the cable has a defect.

[0053] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that the present invention is susceptible to various modifications and variations. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A weak magnetic detection device for cable defects, characterized in that: The invention comprises a shell and a power supply, a magnetic focusing ring, a magnetic sensitive chip and a control circuit board arranged inside the shell; the shell is made of magnetic shielding material, and at least one gap is set on the left and right sides, and a switch is set on the top surface; the control circuit board is placed at the bottom of the shell, the magnetic sensitive chip is set on the control circuit board, the magnetic focusing ring is set just above the magnetic sensitive chip, and a small opening is opened on the magnetic focusing ring, and the small opening is directly opposite to the magnetic sensitive chip; the control circuit board comprises a power supply, a power circuit, a filtering circuit, an amplifying circuit, an MCU and a communication module, and the power supply is connected to the magnetic sensitive chip through the switch. The filter circuit is connected to the power supply circuit to provide power to the magnetic sensitive chip and the power supply circuit. The power supply circuit is connected to the MCU and is used to convert the voltage of the power supply into the working voltage of the MCU. The input end of the filter circuit is connected to the output end of the magnetic sensitive chip to filter out the clutter in the signal output by the magnetic sensitive chip. The input end of the amplifier circuit is connected to the output end of the filter circuit, and the output end is connected to the input end of the MCU to amplify the filtered input signal for processing by the MCU. The output end of the MCU is connected to the communication module to communicate with the host computer through the communication module to transmit the detection results of the magnetic sensitive chip.

2. A weak magnetic field detection device for cable defects according to claim 1, characterized in that: The width of the gap is 0.5 cm to 1.5 cm, and the width of two adjacent gaps is 1 cm to 1.5 cm.

3. The weak magnetic field detection device for cable defects according to claim 1, characterized in that: The power supply circuit includes a power conversion chip, a twelfth capacitor and a thirteenth capacitor. The input end of the power conversion chip is connected to the positive pole of the power supply and one end of the thirteenth capacitor, the output end is connected to one end of the twelfth capacitor, and the ground end is grounded to the other ends of the twelfth capacitor and the thirteenth capacitor.

4. A weak magnetic field detection device for cable defects according to claim 3, characterized in that: The filtering circuit includes an operational amplifier, a first resistor, a second resistor, a fifth resistor, a sixth resistor, a sixth capacitor and an eighth capacitor, wherein one end of the first resistor is grounded and the other end is connected to the inverting input terminal of the operational amplifier, one end of the second resistor is connected to the inverting input terminal of the operational amplifier and the other end is connected to the output terminal of the operational amplifier, the fifth resistor and the sixth resistor are connected in series, one end is connected to the magnetic sensitive chip and the other end is connected to the non-inverting input terminal of the operational amplifier, one end of the sixth capacitor is connected to the non-inverting input terminal of the operational amplifier and the other end is grounded, and one end of the eighth capacitor is connected to the series connection point of the fifth resistor and the sixth resistor and the other end is connected to the output terminal of the operational amplifier.

5. A weak magnetic field detection device for cable defects according to claim 4, characterized in that: The amplifier circuit includes two operation units with mutually symmetrical circuit structures, an output unit, a seventh capacitor, and an eighth resistor; wherein the first operation unit includes a first input operational amplifier, a twenty-second resistor, a third capacitor, a twenty-fifth resistor, a fifth capacitor, a third resistor, a seventh resistor, a first capacitor, a twenty-first resistor, and a first diode, wherein one end of the twenty-second resistor is connected to the output of the operational amplifier in the filter circuit, and the other end is connected to the non-inverting input of the first input operational amplifier; one end of the third capacitor is connected to the non-inverting input of the first input operational amplifier, and the other end is grounded; the twenty-fifth resistor is connected in parallel with the fifth capacitor, and one end is connected to the inverting input of the first input operational amplifier, and the other end is connected to the output of the first input operational amplifier; the third resistor and the seventh resistor are connected in series, and one end is connected to the anode of the first diode, and the other end is connected to the positive power supply input of the first input operational amplifier; one end of the first capacitor is connected to the positive power supply input of the first input operational amplifier, and the other end is grounded; one end of the twenty-first resistor is connected to the positive electrode of the power supply, and the other end is connected to the positive power supply input of the first input operational amplifier; the cathode of the first diode is connected to the series connection point of the third resistor and the seventh resistor; The second operation unit includes a second input operational amplifier, a twelfth resistor, a ninth capacitor, a ninth resistor, an eighth capacitor, a tenth resistor, an eleventh resistor, a tenth capacitor, a fifteenth resistor and a second diode, wherein the second input operational amplifier is symmetrically arranged with the first input operational amplifier, the twelfth resistor is symmetrically arranged with the twenty-second resistor, the ninth capacitor is symmetrically arranged with the third capacitor, the ninth resistor is symmetrically arranged with the twenty-fifth resistor, the eighth capacitor is symmetrically arranged with the fifth capacitor, the tenth resistor is symmetrically arranged with the seventh resistor, the eleventh resistor is symmetrically arranged with the third resistor, the tenth capacitor is symmetrically arranged with the first capacitor, the fifteenth resistor is symmetrically arranged with the twenty-first resistor, and the second diode is symmetrically arranged with the first diode; the positive power input terminal and the negative power input terminal of the second input operational amplifier are respectively connected to the positive power input terminal and the negative power input terminal of the first input operational amplifier; one end of the fifteenth resistor is connected to the negative electrode of the power supply; and the seventh resistor is connected in series with the tenth resistor; The output unit includes an output operational amplifier, a fourth resistor, a twenty-sixth resistor, a second capacitor and a twenty-sixth capacitor. After the fourth resistor and the twenty-sixth resistor are connected in series, one end of the fourth resistor and the twenty-sixth resistor are connected to the output end of the first input operational amplifier, and the other end is connected to the output end of the second input operational amplifier. The non-inverting input end of the output operational amplifier is connected to the series connection point of the fourth resistor and the twenty-sixth resistor, the inverting input end is connected to the series connection point of the seventh resistor and the tenth resistor, the positive power input end is connected to the positive electrode of the power supply, the negative power input end is connected to the negative electrode of the power supply, and the output end is connected to the MCU; one end of the second capacitor is connected to the positive power input end of the output operational amplifier, and the other end is grounded; one end of the twenty-sixth capacitor is connected to the negative power input end of the output operational amplifier, and the other end is grounded; One end of the seventh capacitor is connected to the non-inverting input terminal of the first input operational amplifier, and the other end is connected to the non-inverting input terminal of the second input operational amplifier. One end of the eighth resistor is connected to the inverting input terminal of the first input operational amplifier, and the other end is connected to the inverting input terminal of the second input operational amplifier.

6. A weak magnetic field detection device for cable defects according to claim 5, characterized in that: The communication module is a Bluetooth module, a power input terminal of the Bluetooth module is connected to the positive electrode of the power supply, a ground terminal is grounded, and a signal input terminal is connected to the MCU.

Images