Lateral epitaxial growth gallium nitride structure and semiconductor device
By setting the interlaced graphene and oxide mask structures on the substrate layer, a nano-scale vacant area is formed for gallium nitride nucleation growth, the problem of high GaN dislocation density is solved, and a low dislocation density and high-quality gallium nitride epitaxial layer is achieved, reducing the preparation cost.
Patent Information
- Application Number
- CN202422453286.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-11
- Publication Date
- 2025-08-12
- Estimated Expiration
- 2034-10-11
AI Technical Summary
In the prior art, GaN has a high dislocation density, which limits its crystal quality and the performance of the final device, and there is still room for improvement in the lateral epitaxial growth scheme.
The interlaced graphene mask structure and oxide mask structure are arranged on the substrate layer to form nanoscale vacant areas. These mask structures are used as masks to perform nucleation growth of gallium nitride to avoid dislocation extending to the epitaxial layer.
It effectively reduces the dislocation density of gallium nitride, improves crystal quality and device performance, and reduces preparation costs.
Smart Images
Figure CN223219403U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductors, and in particular to a laterally epitaxially grown gallium nitride structure and a semiconductor device. Background Art
[0002] GaN and its compounds have been widely studied for optoelectronic applications such as light-emitting diodes (LEDs), laser diodes, and high-frequency electronics. However, because GaN is primarily grown via heteroepitaxial growth, the heterogeneous substrate prevents further reduction of GaN dislocation density, limiting the crystal quality of GaN. These dislocations can affect the performance of the final device. To overcome these challenges, researchers have attempted various technological improvements and material innovations.
[0003] Lateral epitaxial growth (LEG) is considered an effective solution. It typically uses a dielectric film (such as SiO2) as a mask and is fabricated through photolithography and other related processes. The film first grows into a nucleation layer in the window area, but does not grow in the mask area. By controlling the growth conditions, lateral epitaxial growth is achieved, and the nucleation layers merge, covering the mask area and ultimately forming a thin film. During lateral epitaxial growth of nitrides, dislocations in the substrate are blocked by the mask and cannot extend to the epitaxial layer. Furthermore, during the lateral merging of the nucleation layers, dislocations with opposite Burgers vectors merge and terminate. Therefore, lateral epitaxial growth of nitrides can significantly reduce dislocation density.
[0004] Graphene, an emerging two-dimensional material, has attracted attention due to its excellent conductivity, chemical stability, and unique influence on epitaxial growth processes. The application of graphene masking technology in the semiconductor field has demonstrated its potential in improving material quality and controlling growth morphology. Furthermore, because GaN has a strong lateral growth capability, using graphene as a mask for lateral epitaxial growth of GaN has become an effective method for reducing GaN dislocation density. However, current approaches still suffer from high dislocation density, resulting in low-quality GaN growth. Utility Model Content
[0005] The utility model provides a gallium nitride structure and semiconductor device grown by lateral epitaxial growth, in which a staggered graphene mask structure and an oxide mask structure are arranged on a substrate layer, and the nanoscale vacant region between the two is a gallium nitride nucleation layer for nucleation growth, with a low dislocation density, thereby preventing a large number of dislocations from extending to the epitaxial layer.
[0006] In order to solve the above technical problems, the first aspect of the present invention provides a laterally epitaxially grown gallium nitride structure, comprising:
[0007] substrate layer;
[0008] a mask layer, the mask layer comprising a plurality of graphene mask structures and a plurality of oxide mask structures that are staggered, the graphene mask structures and the oxide mask structures being both disposed on the substrate layer, with vacant regions being disposed between adjacent graphene mask structures and the oxide mask structures;
[0009] A gallium nitride epitaxial layer fills the vacant area and covers all of the graphene mask structure and the oxide mask structure.
[0010] The utility model arranges staggered graphene mask structures and oxide mask structures on the substrate layer, uses the graphene mask structure and the oxide mask structure together as masks, and forms a nanoscale vacant area between the two to fill the nucleated and grown gallium nitride, with a low dislocation density, preventing a large number of dislocations from extending to the epitaxial layer.
[0011] Furthermore, the GaN epitaxial layer includes a GaN nucleation layer and a GaN thin film layer. The GaN nucleation layer fills the vacant regions and is disposed on the substrate layer; the GaN thin film layer overlies the graphene mask structure, the oxide mask structure, and the GaN nucleation layer. The GaN nucleation layer nucleates and grows in the nanoscale vacant regions, creating an extremely narrow growth window. This prevents dislocations from extending into the GaN epitaxial layer grown on the oxide and graphene mask structures, resulting in a low dislocation density.
[0012] Furthermore, the substrate layer includes a first region substrate and a second region substrate alternately arranged along the surface of the substrate layer, the graphene mask structure is disposed on the first region substrate, and the oxide mask structure is disposed on the second region substrate.
[0013] Furthermore, the substrate layer further includes a third regional substrate disposed along the surface of the substrate layer, the surface of the third regional substrate is disposed between the first regional substrate and the second regional substrate, and the gallium nitride nucleation layer is disposed on the third regional substrate.
[0014] Furthermore, the surface where the substrate layer contacts the mask layer is a horizontal surface.
[0015] Furthermore, bottoms of the first region substrate, the second region substrate, and the third region substrate are located on the same horizontal plane.
[0016] Preferably, the tops of the first regional substrate and the third regional substrate are located at the same horizontal plane.
[0017] Preferably, the thickness of the substrate in the first region is greater than that of the substrate in the second region; the oxygen plasma etches the graphene layer on the substrate layer to expose the substrate layer, and reacts with the substrate layer to consume a small amount of the substrate layer to form an oxide mask structure.
[0018] Preferably, the top of the oxide mask structure is not higher than the bottom of the graphene mask structure.
[0019] Furthermore, the graphene mask structure and the bottom of the gallium nitride nucleation layer are located at the same horizontal plane, and the height of the graphene mask structure is less than the height of the gallium nitride nucleation layer, and the top of the gallium nitride nucleation layer covers the edge of the graphene mask structure; the gallium nitride nucleation layer nucleates and grows in the nanoscale vacancy area between the graphene mask structure and the oxide mask structure.
[0020] Preferably, the thickness of the graphene mask structure is greater than or equal to the thickness of the oxide mask structure.
[0021] Preferably, the thickness of the graphene mask structure is 4-8 nm, for example, 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, 6.5 nm, 7 nm, 7.5 nm or 8 nm.
[0022] Preferably, the thickness of the oxide mask structure is 3-5 nm, for example, 3 nm, 3.2 nm, 3.4 nm, 3.6 nm, 3.8 nm, 4 nm, 4.2 nm, 4.4 nm, 4.6 nm, 4.8 nm or 5 nm.
[0023] Preferably, the thickness of the gallium nitride thin film layer is 5-10 μm, for example, 5 μm, 5.5 μm, 6 μm, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, 9 μm, 9.5 μm or 10 μm.
[0024] Furthermore, the multiple graphene mask structures and the multiple oxide mask structures are uniformly distributed in an array.
[0025] Preferably, the width of the graphene mask structure is smaller than the width of the oxide mask structure.
[0026] Preferably, the length of the graphene mask structure is equal to the length of the oxide mask structure.
[0027] Preferably, the width of the graphene mask structure is 1-3 μm, for example, it can be 1 μm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, 2 μm, 2.2 nm, 2.4 nm, 2.6 nm, 2.8 nm or 3 μm, and the width of the oxide mask structure is 4-6 μm, for example, it can be 4 μm, 4.2 nm, 4.4 nm, 4.6 nm, 4.8 nm, 5 μm, 5.2 nm, 5.4 nm, 5.6 nm, 5.8 nm or 6 μm, etc.
[0028] Preferably, the width of the gallium nitride nucleation layer is 200-600 nm, for example, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm or 600 nm.
[0029] Furthermore, the material of the substrate layer is different from that of the mask layer;
[0030] Preferably, the substrate layer is made of gallium nitride or aluminum nitride, and the oxide mask structure is made of gallium oxide or aluminum oxide.
[0031] A second aspect of the present invention provides a semiconductor device, comprising a stacked gallium nitride structure and an epitaxial structure, wherein the gallium nitride structure is the gallium nitride structure described in the first aspect.
[0032] The beneficial effects of the present invention are as follows: the present invention arranges staggered graphene mask structures and oxide mask structures on the substrate layer, uses the graphene mask structure and the oxide mask structure together as masks, and forms a nanoscale vacant area between the two to fill the nucleated and grown gallium nitride, with a low dislocation density, thereby preventing a large number of dislocations from extending to the epitaxial layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 This is a schematic diagram of the laterally epitaxially grown gallium nitride structure provided by the present invention;
[0034] Figure 2 This is a schematic diagram of the structure of the semiconductor device provided by the utility model;
[0035] Explanation of the numbers in the figure: 1. Substrate layer, 11. First region substrate, 12. Second region substrate, 13. First region substrate, 2. Mask layer, 21. Graphene mask structure, 22. Oxide mask structure, 3. GaN epitaxial layer, 31. GaN nucleation layer, 32. GaN thin film layer, 4. Epitaxial structure. DETAILED DESCRIPTION
[0036] The present invention will be further described below in conjunction with specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.
[0037] Reference Figure 1 As shown, this embodiment provides a gallium nitride structure grown by lateral epitaxial growth, including: a substrate layer 1, a mask layer 2 and a gallium nitride epitaxial layer 3.
[0038] The mask layer 2 includes a plurality of graphene mask structures 21 and a plurality of oxide mask structures 22 that are staggered. Both the graphene mask structures 21 and the oxide mask structures 22 are disposed on the substrate layer 1 , and a vacant area is disposed between adjacent graphene mask structures 21 and oxide mask structures 22 .
[0039] The GaN epitaxial layer 3 fills the vacant areas and covers all of the graphene mask structure 21 and the oxide mask structure 22 .
[0040] In this embodiment, a staggered graphene mask structure 21 and an oxide mask structure 22 are provided on the substrate layer 1. The graphene mask structure 21 and the oxide mask structure 22 are used together as masks, and a nanoscale vacant area is formed between the two to fill the nucleated and grown gallium nitride. The dislocation density is low, which prevents a large number of dislocations from extending to the epitaxial layer.
[0041] In a specific embodiment, Figure 1 As shown, the gallium nitride epitaxial layer 3 includes a gallium nitride nucleation layer 31 and a gallium nitride thin film layer 32. The gallium nitride nucleation layer 31 fills the vacant area and is arranged on the substrate layer 1; the gallium nitride thin film layer 32 covers the graphene mask structure 21, the oxide mask structure 22 and the gallium nitride nucleation layer 31.
[0042] The GaN nucleation layer 31 nucleates and grows in the nanoscale vacant region, and the growth window is extremely narrow, which prevents dislocations from extending to the epitaxial layer and has a low dislocation density.
[0043] The preparation method of the gallium nitride structure is as follows: preparing a graphene layer on a substrate layer 1; etching the graphene layer on the substrate layer 1 by oxygen plasma to expose the substrate layer 1 and continue to act on the substrate layer 1 to form an oxide mask structure 22; continuing to etch the retained graphene layer by ammonia to form a graphene mask structure 21 and forming a nanometer-scale vacant area at the edge of the graphene mask structure 21. No advanced nanometer-scale photolithography machine is required to etch the nanometer-scale window, which is low-cost.
[0044] In a more preferred embodiment, Figure 1 As shown, the substrate layer 1 includes a first region substrate 11 and a second region substrate 12 alternately arranged along the surface of the substrate layer 1 , the graphene mask structure 21 is disposed on the first region substrate 11 , and the oxide mask structure 22 is disposed on the second region substrate 12 .
[0045] Further, if Figure 1 As shown, the substrate layer 1 further includes a third region substrate 13 disposed along the surface of the substrate layer 1 . The surface of the third region substrate 13 is disposed between the first region substrate 11 and the second region substrate 12 . The gallium nitride nucleation layer 31 is disposed on the third region substrate 13 .
[0046] In a more preferred embodiment, Figure 1As shown, the surface where the substrate layer 1 contacts the mask layer 2 is a horizontal surface.
[0047] In a more preferred embodiment, Figure 1 As shown, the bottoms of the first regional substrate 11 , the second regional substrate 12 and the third regional substrate 13 are located at the same horizontal plane; the tops of the first regional substrate 11 and the third regional substrate 13 are located at the same horizontal plane; and the thickness of the first regional substrate 11 is greater than that of the second regional substrate 12 .
[0048] The oxide mask structure 22 on the second region substrate 12 is grown in situ. The oxygen plasma etches the graphene layer on the substrate layer 1 until the substrate layer 1 is exposed. Subsequently, the oxygen plasma continues to react with the substrate layer 1 to consume a small amount of the substrate layer 1 to form the oxide mask structure 22, resulting in the thickness of the second region substrate 12 being less than the thickness of the first region substrate 11; the top of the oxide mask structure 22 is no higher than the bottom of the graphene mask structure 21.
[0049] In a more preferred embodiment, Figure 1 As shown, the graphene mask structure 21 and the gallium nitride nucleation layer 31 are both formed on the surface of the substrate layer 1 , the bottom of the graphene mask structure 21 and the gallium nitride nucleation layer 4 are located at the same horizontal plane, and the height of the graphene mask structure 21 is less than the height of the gallium nitride nucleation layer 31 .
[0050] The top of the gallium nitride nucleation layer 31 covers the edge of the graphene mask structure 21. The gallium nitride nucleation layer 31 nucleates and grows in the nanoscale vacant area between the graphene mask structure 21 and the oxide mask structure 22. When the height of the nucleation layer grows to be greater than the height of the graphene mask structure, it grows laterally to cover the edge of the graphene mask structure 21 and continues to grow. The gallium nitride nucleation layer 31 merges to form a gallium nitride thin film layer 32.
[0051] Preferably, the thickness of the graphene mask structure 21 is greater than or equal to the thickness of the oxide mask structure 22 .
[0052] In a preferred embodiment, the thickness of the graphene mask structure 21 is 4-8 nm, for example, it can be 4 nm, 4.5 nm, 5 nm, 5.5 nm, 6 nm, 6.5 nm, 7 nm, 7.5 nm or 8 nm; in a preferred embodiment, the thickness of the oxide mask structure 22 is 3-5 nm, for example, it can be 3 nm, 3.2 nm, 3.4 nm, 3.6 nm, 3.8 nm, 4 nm, 4.2 nm, 4.4 nm, 4.6 nm, 4.8 nm or 5 nm; in a preferred embodiment, the thickness of the gallium nitride thin film layer 32 is 5-10 μm, for example, it can be 5 μm, 5.5 μm, 6 μm, 6.5 μm, 7 μm, 7.5 μm, 8 μm, 8.5 μm, 9 μm, 9.5 μm or 10 μm.
[0053] In a preferred embodiment, multiple graphene mask structures 21 and multiple oxide mask structures 22 are uniformly distributed in an array; the width of the graphene mask structure 21 is smaller than the width of the oxide mask structure 22; and the length of the graphene mask structure 21 is equal to the length of the oxide mask structure 22.
[0054] In a preferred embodiment, the width of the graphene mask structure 21 is 1-3 μm, for example, it can be 1 μm, 1.2 nm, 1.4 nm, 1.6 nm, 1.8 nm, 2 μm, 2.2 nm, 2.4 nm, 2.6 nm, 2.8 nm or 3 μm, and the width of the oxide mask structure 22 is 4-6 μm, for example, it can be 4 μm, 4.2 nm, 4.4 nm, 4.6 nm, 4.8 nm, 5 μm, 5.2 nm, 5.4 nm, 5.6 nm, 5.8 nm or 6 μm, etc.; in a preferred embodiment, the width of the gallium nitride nucleation layer 31 is 200-600 nm, for example, it can be 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, 550 nm or 600 nm, etc.
[0055] In a preferred embodiment, the material of the substrate layer 1 is different from that of the mask layer 2 . The substrate layer 1 is made of gallium nitride or aluminum nitride, and the oxide mask structure 22 is made of gallium oxide or aluminum oxide. The oxide is generated in situ by etching the substrate layer 1 with oxygen plasma.
[0056] See also Figure 2 , Figure 2 1 is a schematic structural diagram of a semiconductor device provided by the present invention. The semiconductor device includes a stacked gallium nitride structure and an epitaxial structure 4. The gallium nitride structure is the gallium nitride structure in the above embodiment.
[0057] In summary, the present invention sets a staggered graphene mask structure and an oxide mask structure on the substrate layer, uses the graphene mask structure and the oxide mask structure together as a mask, and forms a nanoscale vacant region between the two to fill the nucleated and grown gallium nitride, with a low dislocation density, to prevent a large number of dislocations from extending to the epitaxial layer. The gallium nitride structure first etches the graphene layer on the substrate layer with oxygen plasma, exposing the substrate layer and continuing to act on the substrate layer to form an oxide mask structure. Ammonia gas is then used to continue etching the retained graphene layer to form a graphene mask structure and form a nanoscale vacant region at the edge of the graphene mask structure. There is no need for advanced nanoscale photolithography machines to etch nanoscale windows, which is low cost.
[0058] The above-described embodiments are merely preferred embodiments for the purpose of fully illustrating the present invention, and the scope of protection of the present invention is not limited thereto. Equivalent substitutions or modifications made by those skilled in the art based on the present invention are within the scope of protection of the present invention. The scope of protection of the present invention shall be subject to the claims.
Claims
1. A laterally epitaxially grown gallium nitride structure, characterized in that: include: substrate layer; a mask layer, the mask layer comprising a plurality of graphene mask structures and a plurality of oxide mask structures that are staggered, the graphene mask structures and the oxide mask structures being both disposed on the substrate layer, with vacant regions being disposed between adjacent graphene mask structures and the oxide mask structures; A gallium nitride epitaxial layer fills the vacant area and covers all of the graphene mask structure and the oxide mask structure.
2. The laterally epitaxially grown gallium nitride structure according to claim 1, wherein: The gallium nitride epitaxial layer includes a gallium nitride nucleation layer and a gallium nitride thin film layer. The gallium nitride nucleation layer fills the vacant area and is arranged on the substrate layer; the gallium nitride thin film layer covers the graphene mask structure, the oxide mask structure and the gallium nitride nucleation layer.
3. The laterally epitaxially grown gallium nitride structure according to claim 2, wherein: The substrate layer includes a first region substrate and a second region substrate alternately arranged along the surface of the substrate layer. The graphene mask structure is disposed on the first region substrate, and the oxide mask structure is disposed on the second region substrate.
4. The laterally epitaxially grown gallium nitride structure according to claim 3, wherein: The substrate layer further includes a third region substrate disposed along a surface of the substrate layer. The surface of the third region substrate is disposed between the first region substrate and the second region substrate. The gallium nitride nucleation layer is disposed on the third region substrate.
5. The laterally epitaxially grown gallium nitride structure according to claim 4, wherein: The surface of the substrate layer contacting the mask layer is a horizontal surface.
6. The laterally epitaxially grown gallium nitride structure according to claim 4, wherein: The bottoms of the first region substrate, the second region substrate, and the third region substrate are located on the same horizontal plane; The tops of the first region substrate and the third region substrate are located at the same horizontal plane; The thickness of the first region substrate is greater than the thickness of the second region substrate; The top of the oxide mask structure is no higher than the bottom of the graphene mask structure.
7. The laterally epitaxially grown gallium nitride structure according to any one of claims 2 to 6, wherein: The graphene mask structure and the bottom of the gallium nitride nucleation layer are located at the same horizontal plane, and the height of the graphene mask structure is smaller than the height of the gallium nitride nucleation layer, and the top of the gallium nitride nucleation layer covers the edge of the graphene mask structure; The thickness of the graphene mask structure is greater than or equal to the thickness of the oxide mask structure; The thickness of the graphene mask structure is 4-8 nm; The thickness of the oxide mask structure is 3-5 nm; The thickness of the gallium nitride thin film layer is 5-10 μm; The width of the vacant region is 200-600 nm.
8. The laterally epitaxially grown gallium nitride structure according to any one of claims 2 to 6, wherein: The multiple graphene mask structures and the multiple oxide mask structures are respectively and evenly distributed in an array; The width of the graphene mask structure is smaller than the width of the oxide mask structure; The length of the graphene mask structure is equal to the length of the oxide mask structure; The width of the graphene mask structure is 1-3 μm, and the width of the oxide mask structure is 4-6 μm; The width of the gallium nitride nucleation layer is 200-600 nm.
9. The laterally epitaxially grown gallium nitride structure according to any one of claims 1 to 6, wherein: The material of the substrate layer is different from the material of the mask layer; The material of the substrate layer is gallium nitride or aluminum nitride, and the material of the oxide mask structure is gallium oxide or aluminum oxide. 10 . A semiconductor device comprising a stacked gallium nitride structure and an epitaxial structure, wherein the gallium nitride structure is the gallium nitride structure according to claim 1 .