Package structure

Abstract

The utility model provides a packaging structure, and the packaging structure comprises a substrate which is provided with a first photon transceiver; a wafer disposed on the substrate and having a second photon transceiver; a first bonding wire arranged to electrically connect the wafer and the substrate; and the optical channel is arranged to be connected with the first photon transceiver and the second photon transceiver, and the path of the optical channel is longer than that of the first bonding wire. Therefore, the optical signal transmission path is not exposed in the environment, the transmission quality of the optical signal is not influenced by environmental factors, and meanwhile, the path of the optical channel is longer than the path of the first bonding wire, so that the optical channel can replace a bonding wire with a longer wire length.

Description

Technical Field

[0001] The present application relates to the field of semiconductor packaging technology, and in particular to a packaging structure. Background Art

[0002] Currently, to reduce signal transmission losses between a chip and a substrate, an optical signal transmission structure is constructed using an optical source disposed on the substrate, an optical sensor disposed on the chip, and a reflector. However, if the optical signal transmission path is exposed to the environment, it is susceptible to interference from environmental factors, which can affect the transmission quality of the optical signal. Utility Model Content

[0003] The present application proposes a packaging structure.

[0004] In a first aspect, the present application provides a packaging structure, comprising: a substrate having a first photonic transceiver; a chip disposed on the substrate and having a second photonic transceiver; a first bonding wire configured to electrically connect the chip and the substrate; and an optical channel configured to connect the first photonic transceiver and the second photonic transceiver, wherein a path of the optical channel is longer than a path of the first bonding wire.

[0005] In some optional embodiments, the first bonding wire is separated from the optical channel by a dielectric layer.

[0006] In some optional embodiments, the optical channel includes a first reflective layer and a first waveguide layer covered by the first reflective layer.

[0007] In some optional embodiments, the first waveguide layer is separated from the dielectric layer by the first reflective layer.

[0008] In some optional embodiments, the packaging structure further includes:

[0009] A second bonding wire is configured to electrically connect the chip and the substrate, wherein a path of the second bonding wire is longer than a path of the optical channel.

[0010] In some optional embodiments, the packaging structure further includes:

[0011] The packaging layer is configured to cover the second bonding wire and is separated from the first waveguide layer by the first reflective layer.

[0012] In some optional embodiments, the optical channel further includes a second waveguide layer and a second reflective layer, the second waveguide layer is separated from the first waveguide layer by the second reflective layer, and the second reflective layer covers the second waveguide layer.

[0013] In some optional embodiments, an adhesive layer is provided between the substrate and the wafer.

[0014] In some optional embodiments, the packaging structure further includes:

[0015] The solder balls are arranged on a side of the substrate away from the chip.

[0016] In some optional embodiments, a first electrical pad is provided on the substrate, a second electrical pad is provided on the chip, the first bonding wire electrically connects the chip and the substrate through the first electrical pad and the second electrical pad, and the second bonding wire electrically connects the chip and the substrate through the first electrical pad and the second electrical pad.

[0017] In order to solve the problem that the optical signal transmission path in the existing packaging structure is exposed to the environment and is easily interfered by environmental factors, thereby affecting the transmission quality of the optical signal, the present application proposes a packaging structure, in which a first photon transceiver is arranged on the substrate, and a second photon transceiver is arranged on the chip. The first photon transceiver and the second photon transceiver are connected through an optical channel, so that optical signals are transmitted between the chip and the substrate through the optical channel. In this way, the optical signal transmission path will not be exposed to the environment, nor will the transmission quality of the optical signal be affected by environmental factors. At the same time, since the path of the optical channel is longer than the path of the first bonding wire, the optical channel can replace the bonding wire with a longer wire length. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Other features, objects and advantages of the present application will become more apparent upon reading the detailed description of non-limiting embodiments made with reference to the following drawings:

[0019] Figure 1 This is a schematic diagram of an existing packaging structure;

[0020] Figure 2 is a structural schematic diagram of an embodiment 2a of the packaging structure according to the present application;

[0021] Figure 3 is a structural schematic diagram of an embodiment 3a of the packaging structure according to the present application;

[0022] Figure 4 is a structural schematic diagram of an embodiment 4a of the packaging structure according to the present application;

[0023] Figure 5 is a structural diagram of an embodiment 5a of the packaging structure according to the present application;

[0024] Figure 6 is a structural diagram of an embodiment 6a of the packaging structure according to the present application;

[0025] Figure 7 is a dimension marking diagram of an embodiment 2a of the package structure according to the present application;

[0026] Figure 8-Figure 27 It is a schematic diagram of the manufacturing steps of an embodiment 2a of the packaging structure according to the present application.

[0027] Description of reference numerals / symbols:

[0028] 101-substrate; 102-wafer; 103-reflector; 104-optical source; 105-optical sensor; 106-optical path; 107-electrical pad; 108-bonding wire; 201-substrate; 202-first wafer; 203-first bonding wire; 204-optical channel; 205-dielectric layer; 206-second bonding wire; 207-packaging layer; 208-adhesive layer; 209-first electrical pad; 210-solder ball; 211-photoresist; 212-third bonding wire; 213-second electrical pad; 2011-first photonic transceiver; 2021-second photonic transceiver; 2012-second wafer; 2041-first reflective layer; 2042-first waveguide layer; 2043-second reflective layer; 2044-second waveguide layer. DETAILED DESCRIPTION

[0029] The following describes the specific embodiments of the present application in conjunction with the accompanying drawings and examples. Those skilled in the art will readily understand the technical problems solved by the present application and the technical effects produced by the present application through the contents of this specification. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the relevant invention and are not intended to limit the invention. Furthermore, for ease of description, only portions relevant to the relevant invention are shown in the accompanying drawings.

[0030] It should be readily understood that the meanings of “on,” “over,” and “over…” in this application should be interpreted in the broadest sense, such that “on” not only means “directly on something,” but also means “on something” including intermediate components or layers therebetween.

[0031] Furthermore, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," and "upper" may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90° or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0032] As used herein, the term "layer" refers to a portion of a material comprising an area having a certain thickness. A layer may extend over the entire underlying or superstructure, or may have an extent that is less than the extent of the underlying or superstructure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically and / or along a tapered surface. A substrate may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above and / or below. A layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.

[0033] As used herein, the term "substrate" refers to the material onto which subsequent material layers are added. The substrate itself can be patterned. The material added on top of the substrate can be patterned or can remain unpatterned. In addition, the substrate can include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate can be made of a non-conductive material, such as glass, plastic, or sapphire wafer. Further alternatively, the substrate can have semiconductor devices or circuits formed therein.

[0034] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of this application. Therefore, they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed in this application without affecting the efficacy and purpose that can be achieved by this application. At the same time, terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of description and are not used to limit the scope of the implementation of this application. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of this application without substantially changing the technical content.

[0035] It should also be noted that the longitudinal section corresponding to the embodiment of the present application may be a section corresponding to the front view direction, the transverse section may be a section corresponding to the right view direction, and the horizontal section may be a section corresponding to the top view direction.

[0036] In addition, the embodiments and features of the embodiments of the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0037] refer to Figure 1 , Figure 1This is a schematic diagram of an existing packaging structure.

[0038] like Figure 1 The package structure shown includes a substrate 101 , a wafer 102 , a reflector 103 , an optical source 104 , an optical sensor 105 , an optical path 106 , electrical pads 107 , and bonding wires 108 .

[0039] Among them, the optical source 104 and the electrical pad 107 are arranged on the substrate 101, the optical sensor 105 is arranged on the chip 102, and the bonding wire 108 is used to connect the electrical pad 107 and the optical sensor 105. The reflector 103 has an opening. In this way, the light path 106 will be exposed to the environment through the opening of the reflector 103, and is easily interfered by environmental factors, which may affect the transmission quality of the light path 106.

[0040] refer to Figure 2 , Figure 2 It is a structural diagram of an embodiment 2a of the packaging structure according to the present application.

[0041] like Figure 2 As shown, the packaging structure 2a of the present application includes a substrate 201, a first chip 202, a first bonding wire 203 and an optical channel 204, wherein the substrate 201 has a first photon transceiver 2011; the first chip 202 is arranged on the substrate 201 and has a second photon transceiver 2021; the first bonding wire 203 is arranged to electrically connect the first chip 202 and the substrate 201; the optical channel 204 is arranged to connect the first photon transceiver 2011 and the second photon transceiver 2021, wherein the path of the optical channel 204 is longer than the path of the first bonding wire 203.

[0042] Here, the first photon transceiver 2011 and the second photon transceiver 2021 can be used to receive and transmit optical signals. For example, the first photon transceiver 2011 can receive an optical signal transmitted from the second photon transceiver 2021, or the second photon transceiver 2021 can receive an optical signal transmitted from the first photon transceiver 2011.

[0043] Here, the optical channel 204 can be used to transmit optical signals and guide the transmission path of the optical signals. The optical channel 204 connects the first photon transceiver 2011 and the second photon transceiver 2021. When the first photon transceiver 2011 sends an optical signal, the optical signal can be transmitted to the second photon transceiver 2021 through the optical channel 204. When the second photon transceiver 2021 sends an optical signal, the optical signal can be transmitted to the first photon transceiver 2011 through the optical channel 204.

[0044] Here, after the first photonic transceiver 2011 or the second photonic transceiver 2021 transmits an optical signal, the optical signal can be transmitted in the optical channel 204 without being exposed to the external environment. Therefore, the transmission quality of the optical signal will not be affected by external environmental factors. In addition, since the optical channel 204 is arranged above the first bonding wire 203, the path of the optical channel 204 can be longer than the path of the first bonding wire 203, and a bonding wire with a relatively long wire length can be replaced by the optical channel 204.

[0045] In addition, since the propagation speed of optical signals is much higher than that of electrical signals, connecting the first photon transceiver 2011 and the second photon transceiver 2021 through the optical channel 204 can increase the signal transmission speed between the substrate 201 and the first chip 202, providing more efficient communication.

[0046] In some optional embodiments, a first electrical pad 209 is provided on the substrate 201, a second electrical pad 213 is provided on the first chip, and the first bonding wire 203 is configured to electrically connect the first chip 202 and the substrate 201. Specifically, the first bonding wire 203 can be electrically connected to the first chip 202 and the substrate 201 through the first electrical pad 209 and the second electrical pad 213.

[0047] In some optional embodiments, the first bonding wire 203 is separated from the optical channel 204 by a dielectric layer 205 .

[0048] Here, the dielectric layer 205 can protect the first bonding wire 203 and support the optical channel 204. At the same time, the dielectric layer 205 can prevent an electrical short circuit between the first bonding wire 203 and the optical channel 204, thereby reducing interference between signals.

[0049] In some optional embodiments, the optical channel 204 includes a first reflective layer 2041 and a first waveguide layer 2042 covered by the first reflective layer 2041 .

[0050] Here, the material of the first reflective layer 2041 may be metal, for example, the material of the first reflective layer 2041 may be silver, aluminum, copper, etc.

[0051] The first reflection layer 2041 may include a first upper reflection layer and a first lower reflection layer. The first upper reflection layer may be disposed on the top surface of the first waveguide layer 2042, and the first lower reflection layer may be disposed on the bottom surface of the first waveguide layer 2042. The first waveguide layer 2042 may be covered by the first upper reflection layer and the first lower reflection layer.

[0052] The first waveguide layer 2042 may be a material having a high refractive index. For example, the first waveguide layer 2042 may be a polymer.

[0053] The first waveguide layer 2042 can be used to transmit optical signals, and the first reflective layer 2041 can be used to guide the transmission direction of the optical signals, reflecting the optical signals reaching the top surface of the first waveguide layer 2042 or the bottom surface of the first waveguide layer 2042 back to the first waveguide layer 2042 to ensure that the optical signals can be transmitted along the first waveguide layer 2042.

[0054] Continue to refer Figure 2 For example, after the second photon transceiver 2021 transmits an optical signal, the optical signal enters the first waveguide layer 2042 for transmission. During the transmission process, the optical signal reaches the top surface of the first waveguide layer 2042, is reflected by the first upper reflective layer, and re-enters the first waveguide layer 2042 for transmission. When the optical signal reaches the bottom surface of the first waveguide layer 2042, it is reflected by the first lower reflective layer and re-enters the first waveguide layer 2042 for transmission. In this way, the optical signal can reach the first photon transceiver 2011 after multiple reflections on the first reflective layer 2041.

[0055] In some optional embodiments, the first waveguide layer 2042 is separated from the dielectric layer 205 by the first reflective layer 2041 .

[0056] Here, the first waveguide layer 2042 and the dielectric layer 205 are separated by the first reflective layer 2041 , which can prevent the optical signal from escaping from the first waveguide layer 2042 to the dielectric layer 205 , thereby reducing the transmission loss of the optical signal and improving the transmission efficiency of the optical signal.

[0057] In some optional embodiments, the package structure 2 a further includes a second bonding wire 206 configured to electrically connect the first chip 202 and the substrate 201 , wherein the path of the second bonding wire 206 is longer than the path of the optical channel 204 .

[0058] Here, since the second bonding wire 206 is disposed above the optical channel 204 , the path of the second bonding wire 206 can be longer than that of the optical channel 204 , and the first chip 202 can be electrically connected to the substrate 201 through the second bonding wire 206 .

[0059] In some optional embodiments, a first electrical pad 209 is provided on the substrate 201, a second electrical pad 213 is provided on the first chip, and the second bonding wire 206 electrically connects the first chip 202 and the substrate 201. The second bonding wire 206 can electrically connect the first chip 202 and the substrate 201 through the first electrical pad 209 and the second electrical pad 213.

[0060] In some optional embodiments, the packaging structure 2 a further includes a packaging layer 207 , which is configured to cover the second bonding wire 206 and is separated from the first waveguide layer 2042 by the first reflective layer 2041 .

[0061] Here, the packaging layer 207 can protect and fix the second bonding wire 206. In addition, the packaging layer 207 and the first waveguide layer 2042 are separated by the first reflective layer 2041, which can prevent the optical signal from escaping from the first waveguide layer 2042 to the packaging layer 207, thereby reducing the transmission loss of the optical signal and improving the transmission efficiency of the optical signal.

[0062] In some optional embodiments, the second bonding wire 206 may be separated from the optical channel 204 by an encapsulation layer 207 .

[0063] Here, since the encapsulation layer 207 covers the second bonding wire 206 and fills the gap between the second bonding wire 206 and the optical channel 204, the second bonding wire 206 and the optical channel 204 can be separated by the encapsulation layer 207. The encapsulation layer 207 can prevent an electrical short circuit between the second bonding wire 206 and the optical channel 204 and reduce interference between signals.

[0064] In some optional embodiments, an adhesive layer 208 is provided between the substrate 201 and the first wafer 202 .

[0065] By providing the adhesive layer 208 , the first wafer 202 can be fixed on the substrate 201 .

[0066] In some optional embodiments, the package structure further includes solder balls 210 disposed on a side of the substrate 201 away from the first chip 202 .

[0067] Above, an embodiment 2a of the packaging structure of the present application is introduced.

[0068] refer to Figure 3 , Figure 3 It is a structural diagram of an embodiment 3a of the packaging structure according to the present application.

[0069] Figure 3 The package structure 3a shown is similar to Figure 2 The package structure 2a shown in FIG is different in that:

[0070] The optical channel 204 further includes a second waveguide layer 2044 and a second reflective layer 2043 . The second waveguide layer 2044 is separated from the first waveguide layer 2042 by the second reflective layer 2043 .

[0071] In some optional embodiments, the second reflective layer 2043 covers the second waveguide layer 2044 .

[0072] Here, the material of the second reflective layer 2043 may be metal, for example, the material of the second reflective layer 2043 may be silver, aluminum, copper, etc.

[0073] The material of the second reflective layer 2043 may be the same as or different from the material of the first reflective layer 2041 .

[0074] The second reflective layer 2043 may include a second upper reflective layer and a second lower reflective layer. The second upper reflective layer may be disposed on the top surface of the second waveguide layer 2044, and the second lower reflective layer may be disposed on the bottom surface of the second waveguide layer 2044. Similarly, the first reflective layer 2041 may also include a first upper reflective layer and a first lower reflective layer. The second lower reflective layer and the first upper reflective layer may be two independent metal layers, or the second lower reflective layer and the first upper reflective layer may be the same metal layer. When the second lower reflective layer and the first upper reflective layer are the same metal layer, it means that the metal layer can serve as both the first upper reflective layer of the first reflective layer 2041 and the second lower reflective layer of the second reflective layer 2043. The second reflective layer 2043 covers the second waveguide layer 2044, and the first reflective layer 2041 covers the first waveguide layer 2042.

[0075] The second waveguide layer 2044 may be a material having a high refractive index. For example, the second waveguide layer 2044 may be a polymer.

[0076] The second waveguide layer 2044 has the same function as the first waveguide layer 2042 , and can be used to transmit optical signals and guide the transmission path of the optical signals.

[0077] The second reflective layer 2043 may be used to reflect the optical signal reaching the top surface or the bottom surface of the second waveguide layer 2044 back to the second waveguide layer 2044 , so as to ensure that the optical signal is transmitted along the second waveguide layer 2044 .

[0078] For example, after the first photon transceiver 2011 transmits an optical signal, the optical signal may enter the second waveguide layer 2044 for transmission. When the optical signal is transmitted to the top surface of the second waveguide layer 2044, it is reflected by the second upper reflective layer and re-enters the second waveguide layer 2044 for transmission. When the optical signal is transmitted to the bottom surface of the second waveguide layer 2044, it is reflected by the second lower reflective layer and re-enters the second waveguide layer 2044 for transmission. In this way, the optical signal can reach the second photon transceiver 2021 after multiple reflections on the second reflective layer 2043.

[0079] Here, the first waveguide layer 2042 and the second waveguide layer 2044 can simultaneously transmit optical signals in the same or opposite directions. That is, the first waveguide layer 2042 and the second waveguide layer 2044 can simultaneously transmit optical signals sent from the first photon transceiver 2011 to the second photon transceiver 2021. Alternatively, the first waveguide layer 2042 can transmit optical signals sent from the first photon transceiver 2011 to the second photon transceiver 2021, and the second waveguide layer 2044 can transmit optical signals sent from the second photon transceiver 2021 to the first photon transceiver 2011.

[0080] In some optional embodiments, the packaging structure 3 a further includes a packaging layer 207 , which is separated from the second waveguide layer 2044 by the second reflective layer 2043 .

[0081] Here, the second reflective layer 2043 separates the encapsulation layer 207 and the second waveguide layer 2044 , thereby preventing the optical signal from escaping from the second waveguide layer 2044 to the encapsulation layer 207 , thereby reducing the transmission loss of the optical signal and improving the transmission efficiency of the optical signal.

[0082] An embodiment 3a of the packaging structure of the present application has been introduced above.

[0083] refer to Figure 4 , Figure 4 It is a structural diagram of an embodiment 4a of the packaging structure according to the present application.

[0084] Figure 4 The package structure 4a shown is similar to Figure 2 The package structure 2a shown in FIG is different in that:

[0085] The substrate 201 includes a second chip 2012 . The second chip 2012 is disposed on the substrate 201 .

[0086] In some optional implementations, the first photonic transceiver 2011 may be disposed on the second chip 2012 .

[0087] Here, when the substrate 201 includes the second wafer 2012 , the first photon transceiver 2011 may be disposed on the second wafer 2012 .

[0088] In some optional embodiments, the first bonding wire 203 is configured to electrically connect the first chip 202 and the second chip 2012 .

[0089] In some optional implementations, the second bonding wire 206 is configured to electrically connect the first wafer 202 and the second wafer 2012 .

[0090] Similarly, the optical signal can be transmitted in the optical channel 204 without being exposed to the external environment. Therefore, the transmission quality of the optical signal will not be affected by external environmental factors.

[0091] Above, an embodiment 4a of the packaging structure of the present application is introduced.

[0092] refer to Figure 5 , Figure 5 It is a structural diagram of an embodiment 5a of the packaging structure according to the present application.

[0093] Figure 5 The package structure 5a shown is similar to Figure 2 The package structure 2a shown in FIG is different in that:

[0094] The package structure 5 a may include at least one optical channel 204 .

[0095] like Figure 5 As shown, the package structure 5 a may include an optical channel 204 disposed on one side of the substrate 201 and the first chip 202 .

[0096] like Figure 2-Figure 4 As shown, the packaging structure may include two optical channels 204 , which are respectively disposed on both sides of the substrate 201 and the first chip 202 .

[0097] The specific setting of the optical channel 204 needs to be set according to actual conditions and is not limited here.

[0098] An embodiment 5a of the packaging structure of the present application has been introduced above.

[0099] refer to Figure 6 , Figure 6 It is a structural diagram of an embodiment 6a of the packaging structure according to the present application.

[0100] Figure 6 The package structure 6a shown is similar to Figure 2 The package structure 2a shown in FIG is different in that:

[0101] like Figure 6 As shown, the package structure further includes a third bonding wire 212 , which is configured to electrically connect the first chip 202 and the substrate 201 and is separated from the optical channel 204 by the dielectric layer 205 .

[0102] The specific configuration of the third bonding wire 212 can be set according to actual conditions and is not limited here.

[0103] Above, an embodiment 6a of the packaging structure of the present application is introduced.

[0104] refer to Figure 7, Figure 7 2 is a dimension marking diagram of an embodiment of a package structure 2a according to the present application.

[0105] like Figure 7 As shown, L1 may represent the distance between the first waveguide layer 2042 and the first bonding wire 203 , and the range of L1 may be 1 um to 10 um.

[0106] L2 may represent the thickness of the first reflective layer 2041 , and the range of L2 may be 0.5 um to 5 um.

[0107] L3 may represent the thickness of the first waveguide layer 2042 , and the range of L3 may be 2 um to 30 um.

[0108] L4 may represent the distance between the first waveguide layer 2042 and the second bonding wire 206 , and the range of L4 may be 1 um to 10 um.

[0109] L5 may represent the opening width between the first reflective layer 2041 and the first waveguide layer 2042 , and the range of L5 may be 2 um to 30 um.

[0110] L6 may represent a distance between the first photonic transceiver 2011 and the first electrical pad 209 connected to the first bonding wire 203 , and the range of L6 may be 5 um to 20 um.

[0111] refer to Figure 8-Figure 27 . Figure 8-Figure 27 It is a schematic diagram of the manufacturing steps of an embodiment 2a of the packaging structure according to the present application.

[0112] refer to Figure 8 , providing a first chip 202, a second electrical pad 213 and a second photonic transceiver 2021.

[0113] A second photonic transceiver 2021 and a second electrical pad 213 may be provided on the first wafer 202 .

[0114] Here, the second photonic transceiver 2021 may be used to receive and transmit optical signals.

[0115] refer to Figure 9 , the first wafer 202 is thinned.

[0116] Here, the first wafer 202 may be ground by a grinding wheel to reduce the thickness of the first wafer 202 . A thinner first wafer 202 may enable the package structure 2 a to achieve a smaller package size.

[0117] refer to Figure 10 , and perform cutting operations on the wafer.

[0118] Here, a complete wafer may be divided into a plurality of individual first chips 202 .

[0119] refer to Figure 11 , a picking operation of the first wafer 202 .

[0120] The cut single first wafer 202 is taken out from the wafer.

[0121] refer to Figure 12 , providing a substrate 201 , a first electrical pad 209 , a first photonic transceiver 2011 and an adhesive layer 208 .

[0122] Here, a first electrical pad 209, a first photon transceiver 2011 and an adhesive layer 208 may be provided on the substrate 201. The first electrical pad 209 and the first photon transceiver 2011 are provided on both sides of the adhesive layer.

[0123] The first photonic transceiver 2011 may be used to receive and transmit optical signals.

[0124] refer to Figure 13 , the first chip 202 and the substrate 201 are bonded together.

[0125] Here, you can Figure 11 The picked-up first wafer 202 is placed on the adhesive layer 208 , and pressure is applied to the first wafer 202 to achieve bonding between the first wafer 202 and the substrate 201 through the adhesive layer 208 .

[0126] refer to Figure 14 , start making the first bonding wire 203.

[0127] Here, the first bonding wire 203 may be fabricated by a capillary. Here, the first bonding wire 203 may be delivered to the top of the first electrical pad 209 by the capillary.

[0128] refer to Figure 15 , completing the production of the first bonding wire 203.

[0129] By moving the capillary, the first bonding wire 203 may extend from the first electrical pad 209 on the substrate 201 to the second electrical pad 213 on the first wafer 202 , thereby completing the fabrication of the first bonding wire 203 .

[0130] In this way, the first bonding wire 203 can electrically connect the first chip 202 and the substrate 201 .

[0131] refer to Figure 16 , providing a dielectric layer 205.

[0132] Here, the dielectric layer 205 can be manufactured through a mold so that the dielectric layer 205 covers the first bonding wire 203. The dielectric layer 205 can protect the first bonding wire 203. After the optical channel 204 is subsequently manufactured, the dielectric layer 205 can support the optical channel 204. At the same time, the dielectric layer 205 can prevent an electrical short circuit between the first bonding wire 203 and the optical channel 204, thereby reducing interference between signals.

[0133] refer to Figure 17 ,exist Figure 16 The formed packaging structure is subjected to lamination and photolithography of the photoresist 211 .

[0134] Here, by Figure 16 The photoresist 211 is laminated on the formed packaging structure and excess photoresist 211 is removed by photolithography to form a desired circuit pattern, ie, a circuit pattern of a portion of the first reflective layer 2041 .

[0135] refer to Figure 18 , forming a first metal layer.

[0136] Here, the first metal layer may be electroplated on the circuit pattern by physical vapor deposition (PVD).

[0137] refer to Figure 19 , forming a portion of the first reflective layer 2041.

[0138] Here, after forming the first metal layer, the remaining excess photoresist 211 and a portion of the first metal layer may be removed to form a portion of the first reflective layer 2041 , ie, a first low reflective layer.

[0139] Here, the material of the first reflective layer 2041 may be metal, for example, the material of the first reflective layer 2041 may be silver, aluminum, copper, etc.

[0140] refer to Figure 20 , laminating the first waveguide layer strip.

[0141] Here, in Figure 19 The first waveguide layer strip may be laminated on the formed packaging structure and exposed.

[0142] refer to Figure 21 , forming a first waveguide layer 2042.

[0143] The excess first waveguide layer strip is removed by development to form the first waveguide layer 2042 .

[0144] Here, the first waveguide layer 2042 may be a material having a high refractive index, for example, the first waveguide layer 2042 may be a polymer. The first waveguide layer 2042 may be used to transmit an optical signal.

[0145] refer to Figure 22 ,exist Figure 21 The formed packaging structure is subjected to lamination and photolithography of the photoresist 211 .

[0146] Here, by Figure 21 The photoresist 211 is laminated on the formed packaging structure and excess photoresist 211 is removed by photolithography to form a desired circuit pattern, ie, a circuit pattern of a portion of the first reflective layer 2041 .

[0147] refer to Figure 23 , forming an optical channel 204.

[0148] Here, a second metal layer may be electroplated on the circuit pattern by physical deposition (PVD). Then, after the second metal layer is formed, the remaining excess photoresist 211 and part of the second metal layer may be removed to form part of the first reflective layer 2041, i.e., the first upper reflective layer.

[0149] Here, the first reflection layer 2041 can be obtained by the first upper reflection layer and the first lower reflection layer. Further, the optical channel 204 is formed. The optical channel 204 includes the first reflection layer 2041 and the first waveguide layer 2042 covered by the first reflection layer 2041 .

[0150] The optical channel 204 is configured to connect the first photon transceiver 2011 and the second photon transceiver 2021. In this way, when the first photon transceiver 2011 sends an optical signal, the optical signal can be transmitted to the second photon transceiver 2021 through the optical channel 204. When the second photon transceiver 2021 sends an optical signal, the optical signal can be transmitted to the first photon transceiver 2011 through the optical channel 204.

[0151] Here, after the first photonic transceiver 2011 or the second photonic transceiver 2021 transmits an optical signal, the optical signal can be transmitted in the optical channel 204 without being exposed to the external environment. Therefore, the transmission quality of the optical signal will not be affected by external environmental factors. In addition, since the optical channel 204 is arranged above the first bonding wire 203, the path of the optical channel 204 can be longer than the path of the first bonding wire 203, and a bonding wire with a relatively long wire length can be replaced by the optical channel 204.

[0152] In addition, since the propagation speed of optical signals is much higher than that of electrical signals, connecting the first photon transceiver 2011 and the second photon transceiver 2021 through the optical channel 204 can increase the signal transmission speed between the substrate 201 and the first chip 202, providing more efficient communication.

[0153] Here, the first bonding wire 203 is separated from the optical channel 204 by a dielectric layer 205 , and the first waveguide layer 2042 is separated from the dielectric layer 205 by a first reflective layer 2041 .

[0154] Here, the first waveguide layer 2042 and the dielectric layer 205 are separated by the first reflective layer 2041 , which can prevent the optical signal from escaping from the first waveguide layer 2042 to the dielectric layer 205 , thereby reducing the transmission loss of the optical signal and improving the transmission efficiency of the optical signal.

[0155] refer to Figure 24 , completing the production of the second bonding wire 206.

[0156] Here, similar to the production process of the first bonding wire 203, the production of the second bonding wire 206 can be achieved through a capillary. Here, the second bonding wire 206 can be delivered to the top of the first electrical pad 209 on the substrate 201 through the capillary, and then, by moving the capillary, the second bonding wire 206 is extended from the first electrical pad 209 on the substrate 201 to the second electrical pad 213 on the first chip 202 to complete the production of the second bonding wire 206.

[0157] In this way, the second bonding wire 206 can electrically connect the first chip 202 and the substrate 201 . Moreover, since the second bonding wire 206 is disposed above the optical channel 204 , the path of the second bonding wire 206 can be longer than that of the optical channel 204 .

[0158] refer to Figure 25 , providing an encapsulation layer 207.

[0159] Here, the packaging layer 207 may be manufactured by a mold, so that the packaging layer 207 covers the second bonding wire 206 and is separated from the first waveguide layer 2042 by the first reflective layer 2041 .

[0160] Here, the packaging layer 207 can protect and fix the second bonding wire 206. In addition, the packaging layer 207 and the first waveguide layer 2042 are separated by the first reflective layer 2041, which can prevent the optical signal from escaping from the first waveguide layer 2042 to the packaging layer 207, thereby reducing the transmission loss of the optical signal and improving the transmission efficiency of the optical signal.

[0161] Here, the second bonding wire 206 can be separated from the optical channel 204 by the encapsulation layer 207. Since the encapsulation layer 207 covers the second bonding wire 206 and fills the space between the second bonding wire 206 and the optical channel 204, the encapsulation layer 207 can separate the second bonding wire 206 and the optical channel 204. The encapsulation layer 207 can prevent an electrical short circuit between the second bonding wire 206 and the optical channel 204, thereby reducing interference between signals.

[0162] refer to Figure 26 , providing solder balls 210 .

[0163] Here, the solder balls 210 may be disposed on a side of the substrate 201 away from the first wafer 202 .

[0164] refer to Figure 27 , forming a packaging structure 2a.

[0165] Here, you can Figure 26 The packaging structure 2a is formed by dividing the packaging structure 2a.

[0166] Although the present application has been described and illustrated with reference to specific embodiments of the present application, these descriptions and illustrations do not limit the present application. It will be clearly understood by those skilled in the art that various changes may be made and equivalent elements may be substituted within the embodiments without departing from the true spirit and scope of the present application as defined by the appended claims. The illustrations may not necessarily be drawn to scale. Due to variables in the manufacturing process, etc., there may be differences between the technical reproduction in the present application and the actual implementation. There may be other embodiments of the present application that are not specifically described. The description and illustrations should be regarded as illustrative, not restrictive. Modifications may be made to adapt specific circumstances, materials, compositions of matter, methods or processes to the objectives, spirit and scope of the present application. All such modifications fall within the scope of the appended claims. Although the methods disclosed herein have been described with reference to specific operations performed in a specific order, it should be understood that these operations may be combined, subdivided or reordered to form equivalent methods without departing from the teachings of the present application. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit the present application.

Claims

1. A packaging structure, characterized in that: include: a substrate having a first photonic transceiver; a chip disposed on the substrate and having a second photon transceiver; a first bonding wire configured to electrically connect the wafer and the substrate; An optical channel is configured to connect the first photonic transceiver and the second photonic transceiver, wherein a path of the optical channel is longer than a path of the first bonding wire.

2. The packaging structure according to claim 1, wherein: The first bond wire is separated from the optical channel by a dielectric layer.

3. The packaging structure according to claim 1, wherein: The optical channel includes a first reflective layer and a first waveguide layer covered by the first reflective layer.

4. The packaging structure according to claim 3, wherein: The first waveguide layer is separated from the dielectric layer by the first reflective layer.

5. The packaging structure according to claim 1, wherein: The packaging structure further includes: A second bonding wire is configured to electrically connect the chip and the substrate, wherein a path of the second bonding wire is longer than a path of the optical channel.

6. The packaging structure according to claim 5, wherein: The packaging structure further includes: The packaging layer is configured to cover the second bonding wire and is separated from the first waveguide layer by the first reflective layer.

7. The packaging structure according to claim 3, wherein: The optical channel further includes a second waveguide layer and a second reflective layer, wherein the second waveguide layer is separated from the first waveguide layer by the second reflective layer, and the second reflective layer covers the second waveguide layer.

8. The packaging structure according to claim 1, wherein: An adhesive layer is provided between the substrate and the wafer.

9. The packaging structure according to claim 1, wherein: The packaging structure further includes: The solder balls are arranged on a side of the substrate away from the chip.

10. The packaging structure according to claim 5, wherein: A first electrical pad is provided on the substrate, a second electrical pad is provided on the chip, the first bonding wire electrically connects the chip and the substrate through the first electrical pad and the second electrical pad, and the second bonding wire electrically connects the chip and the substrate through the first electrical pad and the second electrical pad.

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