Ceramic surface-mounted packaging structure with top heat dissipation function

Abstract

The utility model provides a ceramic surface-mounted packaging structure with a top heat dissipation function. The ceramic surface-mounted packaging structure comprises a ceramic top plate. A metal layer is arranged at one end of the lower end face of the ceramic top plate, a chip is installed on the metal layer, a source electrode extraction electrode, a grid electrode extraction electrode, a source electrode outer electrode and a grid electrode outer electrode are arranged at the other end of the lower end face of the ceramic top plate, the source electrode extraction electrode and the source electrode outer electrode are connected through a source electrode plate, and the grid electrode extraction electrode and the grid electrode outer electrode are connected through a grid electrode plate. According to the utility model, the ceramic plate is used as the top of the package, and only each electrode of the chip is led to the cover plate and the side of the cover plate, so that a user can use the packaged chip continuously in a mode of welding the bottom electrode and the PCB patch without changing the use habit during use; the chip is attached to the top of the package, so that electric connection is separated from a heat dissipation path, the heat dissipation path is shortened, and thermal resistance is reduced; and the heat dissipation main path does not pass through the PCB, so that the temperature rise of the PCB is avoided, and the temperature rise of other devices on the PCB caused by the heating of the power device is avoided.

Description

Technical Field

[0001] The utility model relates to a ceramic surface-mount packaging structure for top heat dissipation. Background Art

[0002] Surface-mount packaging (SMD) is one of the most popular packaging solutions in the market. The bottom of the package is a metal substrate with electrodes, which serves as both the chip carrier and potential lead. When in use, the electrodes are connected downward to the PCB. The gate and source electrodes on the front of the chip are connected to the remaining electrodes via bonding wires. The electrodes are separated by insulating material and protected by a housing or overall plastic package.

[0003] The advantages of this type of package are its simple structure, ease of implementation, short electrical connection paths, and low parasitic parameters. However, while heat dissipated by the chip is directly transferred to the PCB and then dissipated outward, this can present some problems. First, the heat dissipation path through the PCB is long and has high thermal resistance, resulting in poor heat dissipation. Second, the primary heat dissipation path for surface-mounted components passes through the PCB, leading to high overall PCB temperatures. This, in turn, causes heat to be transferred from the high-temperature PCB to other components that generate less heat, raising operating temperatures and degrading performance at high temperatures, negatively impacting overall system operation. Utility Model Content

[0004] In order to solve the above technical problems, the utility model provides a top heat dissipation ceramic surface mount packaging structure.

[0005] The utility model is achieved through the following technical solutions.

[0006] The utility model provides a top-heat-dissipating ceramic surface-mount packaging structure, comprising a ceramic top plate; a metal layer is provided at one end of the lower end surface of the ceramic top plate, a chip is mounted on the metal layer, and a source lead electrode, a gate lead electrode, a source external electrode, and a gate external electrode are provided at the other end; the source lead electrode and the source external electrode, and the gate lead electrode and the gate external electrode are connected respectively via a source electrode plate and a gate electrode plate; the source lead electrode, the chip, and the gate lead electrode are surrounded by a metal ring frame mounted on the ceramic top plate, the metal ring frame is also connected to the metal layer, the source of the chip is connected to the source lead electrode via a bonding wire, and the gate of the chip is connected to the gate lead electrode via a bonding wire; a metal bottom cover is fixed to the top of the metal ring frame.

[0007] The source electrode plate and the gate electrode plate are arranged on the upper end surface of the ceramic top plate or inside the ceramic top plate.

[0008] When the source electrode plate and the gate electrode plate are arranged on the upper surface of the ceramic top plate, an insulating layer is provided on the surface of the source electrode plate.

[0009] A chip groove is processed on the lower end surface of the ceramic top plate, and the metal layer and the chip are placed in the chip groove.

[0010] A heat sink layer is also provided on the ceramic top plate, and the heat sink layer covers the surface of the ceramic top plate opposite to the surface on which the chip is mounted.

[0011] The source external electrode, the gate external electrode and the lower end surface of the metal bottom cover are on the same plane.

[0012] The ceramic top plate is made of Al2O3 material.

[0013] The metal ring frame and the metal bottom cover are made of Kovar material.

[0014] The heat sink layer is made of a high thermal conductivity material.

[0015] The metal layer and the metal ring frame are an integrated structure.

[0016] The beneficial effects of the present invention are as follows: using the ceramic plate as the top of the package and leading the drain electrode of the chip to the cover plate allows users to continue using the packaged chip by soldering the bottom electrode to the PCB patch without changing their usage habits; and because the chip is attached to the top of the package, the electrical connection and the heat dissipation path are separated, the heat dissipation path is shortened, and the thermal resistance is reduced; the main heat dissipation path does not pass through the PCB, which will not cause the temperature of the PCB to rise, and thus the temperature of other devices on the PCB will not rise due to the heat generated by the power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the chip layout plan structure of the present invention;

[0018] Figure 2 For the utility model Figure 1 Schematic diagram of the cross-section structure at AA;

[0019] Figure 3 This is a schematic diagram of the top structure of the utility model;

[0020] Figure 4 This is a schematic diagram of the top insulation structure principle of the utility model;

[0021] Figure 5 This is a schematic diagram of the structure of the electrode plate embedded in the ceramic plate of the present invention;

[0022] Figure 6 This is a schematic diagram of the structure of the chip of the utility model installed in the groove of the ceramic plate;

[0023] In the figure: 1-source lead electrode, 2-chip, 3-bonding wire, 4-gate lead electrode, 5-heat sink layer, 6-ceramic top plate, 7-metal ring frame, 71-metal layer, 8-metal bottom cover, 9-source external electrode, 10-gate external electrode, 11-gate electrode plate, 12-source electrode plate, 13-insulating layer, 14-chip slot. DETAILED DESCRIPTION

[0024] The technical solution of the present invention is further described below, but the scope of protection claimed is not limited to the described solution.

[0025] The packaging structure of the present invention is mainly used for the packaging of power devices, and its scope of application includes but is not limited to three-terminal devices such as MOS and IGBT. The top of the package of the present invention is a top heat sink 5, which can be a plate-shaped structure made of a conventional high-thermal-conductivity material such as copper, aluminum, or Kovar. Below the top heat sink 5 is a ceramic top plate 6. The right side of the ceramic top plate 6 has an opening structure, in which the source lead electrode 1 and the gate lead electrode 4 are respectively installed. The left surface of the ceramic top plate 6 is made of a metal layer, which is connected to the metal ring frame 7 to form an integrated structure. The chip 2 is soldered to the surface of the metal layer, and the drain electrode D on the back of the chip is electrically connected to the metal ring frame 7 through the metal layer. The gate G and source S on the front of the chip are respectively connected to the gate lead electrode 4 and the source lead electrode 1 through bonding wires 3. The cover plate 8 is connected to the metal ring frame 7, and the potential of the cover plate 8 is also the drain electrode D. The entire inner cavity is sealed by parallel seam welding or melting the cover plate 8 and the metal ring frame 7.

[0026] Example 1: Figure 4 As shown, a layer of ceramic is added on the upper side of the gate G and source S electrodes as insulation, so that the entire top is an insulating surface and is not charged.

[0027] Example 2: Figure 5 As shown, based on Example 1, the gate G and source S electrodes are buried in the ceramic to improve the overall insulation.

[0028] Example 3: Figure 6 As shown, based on Example 2, a groove is dug on the ceramic top plate, and the chip is placed in the groove, so that the chip is closer to the top surface, thereby achieving a better heat dissipation effect on the top.

[0029] Process implementation:

[0030] First, the ceramic top plate 6 is sintered using the HTCC process, and a metallization layer is sintered in the localized areas of the ceramic top plate 6 where metal connections are required. The metal ring frame 7, top heat sink 5, source lead electrode 1, and gate lead electrode 4 are then connected to the ceramic top plate 6 using silver-copper soldering. The chip is then sintered to the metallization layer of the ceramic top plate 6 using low-temperature soldering. Ultrasonic bonding is used to connect the gate G and source S electrodes on the chip surface to the gate lead electrode 4 and source lead electrode 1, respectively. Finally, the cover plate 8 is sealed to the metal ring frame 7 using parallel seam welding or solder sintering sealing. The ceramic top plate 6 is preferably made of Al2O3, which has good thermal conductivity and mechanical strength. The metal ring frame 7 and cover plate 8 are preferably made of Kovar, which has good mechanical properties and good thermal compatibility with ceramics. The source lead electrode 1, gate lead electrode 4, and top heat sink 5 are preferably made of CPC (copper-molybdenum-copper-copper), which has good electrical properties and is a multilayer material that easily absorbs stress.

[0031] This package structure is a top-heat-dissipating ceramic surface-mount airtight package. The lower electrode can be connected to the PCB circuit, and the upper part can be connected to the heat sink of the entire system. This can reduce the operating temperature of this package product and the entire PCB system, thereby enabling the device to operate more reliably and effectively.

Claims

1. A top heat dissipation ceramic surface mount packaging structure, comprising a ceramic top plate (6), characterized in that: A metal layer (71) is provided at one end of the lower end surface of the ceramic top plate (6), a chip (2) is mounted on the metal layer (71), and a source lead electrode (1), a gate lead electrode (4), a source external electrode (9), and a gate external electrode (10) are provided at the other end. The source lead electrode (1) and the source external electrode (9), and the gate lead electrode (4) and the gate external electrode (10) are connected respectively via a source electrode plate (12) and a gate electrode plate (11). The source lead electrode (1), the chip (2), and the gate lead electrode (4) are surrounded by a metal ring frame (7) mounted on the ceramic top plate (6), and the metal ring frame (7) is also connected to the metal layer (71). The source of the chip (2) is connected to the source lead electrode (1) via a bonding wire (3), and the gate of the chip (2) is connected to the gate lead electrode (4) via a bonding wire (3). A metal bottom cover (8) is fixed to the top of the metal ring frame (7).

2. The top heat dissipation ceramic surface mount package structure according to claim 1, characterized in that: The source electrode plate (12) and the gate electrode plate (11) are arranged on the upper end surface of the ceramic top plate (6) or inside the ceramic top plate (6).

3. The top heat dissipation ceramic surface mount package structure according to claim 2, wherein: When the source electrode plate (12) and the gate electrode plate (11) are arranged on the upper end surface of the ceramic top plate (6), an insulating layer (13) is provided on the surface of the source electrode plate (12).

4. The top heat dissipation ceramic surface mount package structure according to claim 1, wherein: A chip groove (14) is processed on the lower end surface of the ceramic top plate (6), and the metal layer (71) and the chip (2) are placed in the chip groove (14).

5. The top heat dissipation ceramic surface mount package structure according to claim 1, wherein: A heat sink layer (5) is also provided on the ceramic top plate (6), and the heat sink layer (5) covers the surface of the ceramic top plate (6) opposite to the surface on which the chip (2) is mounted.

6. The top heat dissipation ceramic surface mount package structure according to claim 1, wherein: The source external electrode (9), the gate external electrode (10) and the lower end surface of the metal bottom cover (8) are on the same plane.

7. The top heat dissipation ceramic surface mount package structure according to claim 1, wherein: The ceramic top plate (6) is made of Al2O3 material.

8. The top heat dissipation ceramic surface mount package structure according to claim 1, wherein: The metal ring frame (7) and the metal bottom cover (8) are made of Kovar material.

9. The top heat dissipation ceramic surface mount package structure according to claim 5, characterized in that: The heat sink layer (5) is made of a high thermal conductivity material.

10. The top heat dissipation ceramic surface mount packaging structure according to claim 1, wherein: The metal layer (71) and the metal ring frame (7) are an integrated structure.

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