Semiconductor plastic package fixing packaging substrate
By introducing large-area metal bumps and U-shaped heat dissipation holes into the packaging substrate, the chip heat dissipation problem is solved, and the heat dissipation efficiency and substrate rigidity are improved.
Patent Information
- Application Number
- CN202422542364.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-21
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2034-10-21
AI Technical Summary
In the existing chip embedding technology, the heat dissipation problem causes the chip heat to be unable to be dissipated quickly, which may cause failure.
The structure design includes a packaging substrate, metal bumps and heat dissipation parts. The heat dissipation parts are large metal blocks and are equipped with U-shaped heat dissipation holes to form an efficient heat dissipation channel through mechanical grinding and physical etching.
It realizes efficient heat dissipation during chip operation, and enhances the rigidity and heat dissipation performance of the substrate.
Smart Images
Figure CN223284984U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of automated machinery, in particular to a semiconductor plastic-sealed fixed packaging substrate. Background Art
[0002] Existing chip embedding technology relies on mechanical or chemical etching to form a cavity, then the chip is pasted into the cavity with Tap, and the cavity is filled with dielectric materials such as ABF or PP to fix the chip. The chip is then connected to the external RDL through laser window plating.
[0003] After the chip is embedded in the substrate, it is difficult to dissipate heat, which results in the chip's heat not being able to dissipate quickly. This may cause the chip to malfunction due to the inability to dissipate heat quickly. Therefore, a semiconductor package substrate structure that can dissipate heat quickly is needed. Utility Model Content
[0004] The main purpose of the utility model is to provide a semiconductor plastic package fixed packaging substrate.
[0005] In order to achieve the above purpose, the technical solution adopted by the utility model is:
[0006] A semiconductor plastic-encapsulated fixed packaging substrate includes a packaging substrate, metal bumps and a heat sink. The packaging substrate includes several layers, and a chip is embedded in any one of the several layers of the packaging substrate. The back silicon layer of the chip is fixedly connected to the heat sink, which is embedded in the packaging substrate. The input and output ends of the chip are connected to the metal bumps.
[0007] Furthermore, the heat sink is a heat dissipation metal block, the cross-sectional area of the heat dissipation metal block is not less than the cross-sectional area of the silicon layer of the flip-chip, and the cross-sectional area of the heat dissipation metal block away from the chip end is larger than the cross-sectional area of the contact surface between the heat dissipation metal block and the chip.
[0008] Furthermore, the heat dissipation metal block includes one of a metal copper block, a metal aluminum block, and a metal silver block.
[0009] Furthermore, the packaging substrates are fixedly connected via a plurality of metal support columns.
[0010] Furthermore, a plurality of heat dissipation holes are fixedly opened on one end of the heat dissipation metal block away from the chip, and the heat dissipation holes are U-shaped.
[0011] Compared with the prior art, the beneficial effects of the present invention are:
[0012] The structure of the utility model can embed chips at any layer, and can be customized to meet the heat dissipation requirements generated during the operation of the chip. Moreover, since the heat dissipation support for the chip is a relatively large metal copper block, the rigidity and heat dissipation requirements of the substrate can be better increased. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 This is a main structural diagram of Example 1 of the present utility model;
[0014] Figure 2 This is a main structural diagram of Example 2 of the present utility model;
[0015] Figure 3 This is a diagram of the internal structure of the heat sink of the present utility model.
[0016] Reference numerals
[0017] 1. Package substrate; 2. Metal bumps; 3. Heat sink; 4. Chip; 5. Metal support column; 6. Heat dissipation hole. DETAILED DESCRIPTION
[0018] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more precise definition of the protection scope of the present invention.
[0019] A semiconductor plastic-encapsulated fixed packaging substrate comprises a packaging substrate, a metal bump and a heat sink. The packaging substrate comprises several layers, any one of which is embedded with a chip, a back silicon layer of the chip is fixedly connected to a heat sink, the heat sink is embedded in the packaging substrate, and the input and output ends of the chip are connected to the metal bump. The heat sink is a heat sink metal block, the cross-sectional area of the heat sink metal block is not less than the cross-sectional area of the silicon layer of the flip chip, and the cross-sectional area of the heat sink metal block at one end away from the chip is larger than the cross-sectional area of the contact surface between the heat sink metal block and the chip. The heat sink metal block comprises one of a metal copper block, a metal aluminum block and a metal silver block. The packaging substrates are fixedly connected by several metal support columns. The end of the heat sink metal block away from the chip is fixedly provided with several heat dissipation holes, which are U-shaped.
[0020] Example 1
[0021] See also Figure 1As shown, first make a metal bump connected to the chip on any layer of the packaging substrate, then flip the chip on the metal bump, preliminarily fix the chip through reflow soldering, and then completely fix the chip by plastic packaging. After the fixation is completed, the substrate connection metal is exposed through mechanical grinding and physical etching, and the silicon layer on the back of the chip is exposed. Then, a large copper block that can be used for heat dissipation is made on the exposed position of the chip, and then the layer is added in the same way as the packaging substrate, so that the substrate can meet the high heat dissipation requirements.
[0022] Example 2
[0023] See also Figure 2 As shown, a metal copper block that needs to dissipate heat and fix the chip is first made on the packaging substrate. The chip is then pre-fixed using a high-thermal-conductivity chip adhesive. After the fixation is completed, it is completely fixed using plastic packaging. The plastic packaging position is thinned through mechanical grinding and physical etching to expose the metal position of the chip that needs to be connected and conducted. Subsequently, additional layers are added in the same way as the packaging substrate, and the connection conduction position is exported to the surface of the packaging substrate.
[0024] The above description is only a preferred embodiment of the present invention. The protection scope of the present invention is not limited to the above embodiment. Any equivalent modifications or changes made by ordinary technicians in this field based on the content disclosed in the present invention should be included in the protection scope recorded in the claims.
Claims
1. A semiconductor plastic encapsulated fixed package substrate, comprising a package substrate, a metal bump and a heat sink, wherein the package substrate comprises several layers and is characterized in that: A chip is embedded in any one of the several layers of packaging substrates. The chip is fixedly embedded in the substrate by plastic packaging. The back silicon layer of the chip is fixedly connected to a heat sink, which is embedded in the packaging substrate. The input and output ends of the chip are connected to metal bumps.
2. The semiconductor plastic encapsulation fixed package substrate according to claim 1, characterized in that: The heat sink is a heat dissipation metal block, the cross-sectional area of which is not less than the cross-sectional area of the silicon layer of the flip chip, and the cross-sectional area of the heat dissipation metal block away from the chip end is larger than the cross-sectional area of the contact surface between the heat dissipation metal block and the chip.
3. The semiconductor plastic-encapsulated fixed package substrate according to claim 2, characterized in that: The heat dissipation metal block includes one of a metal copper block, a metal aluminum block, and a metal silver block.
4. The semiconductor plastic-encapsulated fixed package substrate according to claim 1, characterized in that: The packaging substrates are fixedly connected via a plurality of metal support columns.
5. The semiconductor plastic-encapsulated fixed package substrate according to claim 2, characterized in that: A plurality of heat dissipation holes are fixedly opened at one end of the heat dissipation metal block away from the chip, and the heat dissipation holes are U-shaped.