MOS tube level conversion circuit
Through the MOS tube level conversion circuit, the circuit composed of MOS tube and transistor is used to solve the communication failure problem caused by the voltage differences of different integrated circuits, and the level conversion with simple circuit and strong bidirectionality is achieved.
Patent Information
- Application Number
- CN202421969261.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-14
- Publication Date
- 2025-09-02
- Estimated Expiration
- 2034-08-14
AI Technical Summary
The voltage difference between different integrated circuit chips leads to communication failure, and level conversion circuits are needed to solve the problem of voltage mismatch.
The MOS tube level conversion circuit is adopted, and the level conversion is achieved through the combination of MOS tube, resistor and transistor by voltage difference. The circuit is simple and flexible.
It realizes smooth communication between different voltage chips, and the circuit structure is simple and bidirectional.
Smart Images
Figure CN223297585U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of digital circuits, in particular to a MOS tube level conversion circuit. Background Art
[0002] In digital circuits, different integrated circuit chips (hereinafter referred to as chips) have different voltages, and the levels of the physical interfaces are also different. When the pin physical interfaces of two chips with different voltages need to communicate, the different voltage levels of the chips will cause communication failure. In order to meet the physical interface voltage of the chip pins, the different levels need to be converted to a matching level. This circuit is called a level conversion circuit. Utility Model Content
[0003] The technical problem solved by the present invention is to provide a MOS tube level conversion circuit to solve the problems raised in the above background technology.
[0004] The technical problem solved by the present invention is achieved by adopting the following technical solution: a MOS tube level conversion circuit, comprising: a MOS tube, the MOS tube is connected to a Vcc power supply interface and a Vdd power supply interface, a resistor RS1 is provided between the MOS tube and the Vcc power supply interface, a resistor RS2 is provided between the MOS tube and the Vdd power supply interface, a transistor Q1 is connected to the MO tube, and the transistor Q1 is connected to the Vdd power supply interface.
[0005] Furthermore, the resistor RS1 is connected to the D pole of the MOS tube, the resistor RS2 is connected to the S pole of the MOS tube, and the transistor Q1 is connected to the G pole of the MOS tube.
[0006] Furthermore, the voltage of the Vcc power interface is greater than the voltage of the Vdd power interface.
[0007] Compared with the prior art, the beneficial effects of the present invention are: the circuit of the present invention is mainly composed of MOS tubes and three components, the circuit is simple, the application is flexible, and the input and output bidirectionality can be used. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 It is a structural diagram of the present utility model. DETAILED DESCRIPTION
[0009] In order to make the technical means for realizing the present invention, the creative features, the purpose and the effect thereof easy to understand, the present invention is further explained below in combination with specific diagrams. In the description of the present invention, it should be noted that, unless otherwise clearly stipulated and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection. It can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be internal communication between two components. Example 1
[0010] like Figure 1 As shown, a MOS transistor level conversion circuit includes: a MOS transistor, the MOS transistor is connected to a Vcc power interface and a Vdd power interface, a resistor RS1 is provided between the MOS transistor and the Vcc power interface, a resistor RS2 is provided between the MOS transistor and the Vdd power interface, and a transistor Q1 is connected to the MOS transistor, and the transistor Q1 is connected to the Vdd power interface. Example 2
[0011] like Figure 1 As shown, a MOS transistor level conversion circuit includes: a MOS transistor, the MOS transistor being connected to a Vcc power interface and a Vdd power interface, a resistor RS1 being provided between the MOS transistor and the Vcc power interface, a resistor RS2 being provided between the MOS transistor and the Vdd power interface, a transistor Q1 being connected to the MOS transistor, and the transistor Q1 being connected to the Vdd power interface. The resistor RS1 is connected to the D electrode of the MOS transistor, the resistor RS2 is connected to the S electrode of the MOS transistor, and the transistor Q1 is connected to the G electrode of the MOS transistor. Example 3
[0012] like Figure 1 As shown, a MOS transistor level conversion circuit includes: a MOS transistor, the MOS transistor being connected to a Vcc power interface and a Vdd power interface, a resistor RS1 being provided between the MOS transistor and the Vcc power interface, a resistor RS2 being provided between the MOS transistor and the Vdd power interface, a transistor Q1 being connected to the MOS transistor, and the transistor Q1 being connected to the Vdd power interface. The voltage of the Vcc power interface is greater than the voltage of the Vdd power interface.
[0013] The working principle of this utility model is:
[0014] This circuit requires VCC voltage > VDD voltage in design;
[0015] When point B is high, Vgs = 0 on the MOS tube. Q1 is not conducting, and the voltage level at point A is pulled up to VCC high by resistor RS1. At this time, both points B and A are high. When point B is low, Vgs = VDD on the MOS tube. Q1 is conducting, and the voltage level at point A is equal to that at point B. At this time, both points B and A are low.
[0016] When point A is high, Vgs = 0 on the MOS tube. Q1 is not conducting, and the voltage level at point B is pulled up to VCC high by resistor RS2. At this time, both points A and B are high. When point A is low, Vgs = VDD on the MOS tube. Q1 is also not conducting, but the parasitic diode (or freewheeling diode) connected in parallel between the D and S poles inside the MOS tube is conducting. The voltage level at point A is higher than that at point B by a parasitic diode voltage drop. At this time, both points B and A are low.
[0017] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and improvements may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and improvements are intended to fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.
Claims
1. A MOS tube level conversion circuit, comprising: A MOS transistor, characterized in that: the MOS transistor is connected to a Vcc power interface and a Vdd power interface, a resistor RS1 is provided between the MOS transistor and the Vcc power interface, a resistor RS2 is provided between the MOS transistor and the Vdd power interface, and a transistor Q1 is connected to the MOS transistor, and the transistor Q1 is connected to the Vdd power interface.
2. The MOS transistor level conversion circuit according to claim 1, characterized in that: The resistor RS1 is connected to the D pole of the MOS tube, the resistor RS2 is connected to the S pole of the MOS tube, and the transistor Q1 is connected to the G pole of the MOS tube.
3. The MOS transistor level conversion circuit according to claim 1, wherein: The voltage of the Vcc power supply interface is greater than the voltage of the Vdd power supply interface.