Semiconductor product packaging clamp
Through the stacking design of the pin limiting layer and the temperature diffusion layer in the fixture, the problem of pin offset and tilt caused by solder flow during the reflow process is solved, achieving higher packaging quality and welding position accuracy.
Patent Information
- Application Number
- CN202422531037.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-18
- Publication Date
- 2025-09-12
- Estimated Expiration
- 2034-10-18
AI Technical Summary
During the reflow process of existing soldering fixtures, the pins are easily affected by the flow of solder, resulting in deviation and tilt, which affects the packaging quality.
A semiconductor product packaging fixture is designed, including a pin mounting base and a product mounting base. The pin mounting base is stacked by a pin limiting layer and a temperature diffusion layer. The pin limiting layer extends along the length of the pin to limit the position, and the temperature diffusion layer ensures uniform heat distribution. Combined with a detachable multi-layer structure, the limiting stability and temperature uniformity are improved.
It effectively avoids the deviation and tilt of the pins caused by solder flow during the reflow process, improves the packaging quality, reduces the chance of pin collision during disassembly, and ensures the accuracy of the welding position.
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Figure CN223333773U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductors, and in particular to a semiconductor product packaging fixture. Background Art
[0002] In semiconductor products such as integrated circuits (ICs), microprocessors (MPUs), and memories, soldering technology is used to connect the pads on the chip to the pins on the package, achieving pin-welded packaging. To ensure the accuracy of the pin soldering position, a fixture is usually used to assist in pin-welded packaging.
[0003] However, the positioning of the pins by the existing welding fixture is greatly affected by the flowing solder during reflow, which causes the pins to shift and tilt after welding, affecting the packaging quality. Utility Model Content
[0004] An embodiment of the present application provides a semiconductor product packaging fixture that can improve the packaging quality of pins.
[0005] An embodiment of the present application provides a semiconductor product packaging fixture, including: a pin mounting seat, including a pin limiting layer, a temperature diffusion layer and a pin channel stacked along a first direction, the pin channel is arranged along the first direction to pass through the pin limiting layer and the temperature diffusion layer, and is used for plugging pins; a product mounting seat, which is detachably connected to the pin mounting seat, is used to support the semiconductor product welded to the pin and abut against the pin.
[0006] According to the semiconductor product packaging fixture provided by an embodiment of the present application, the temperature diffusion layer includes a hollow area opened along a second direction, and the second direction is arranged at an angle to the first direction.
[0007] According to the semiconductor product packaging fixture provided in an embodiment of the present application, the pin limiting layer includes a pin plug-in board and a socket, the pin plug-in board includes a plurality of functional areas arranged along the second direction, the functional areas are arranged opposite to the hollow area, the socket is opened in the functional area, and is arranged to pass through the pin plug-in board along the first direction to form the pin channel.
[0008] According to the semiconductor product packaging fixture provided by an embodiment of the present application, the pin socket board also includes a first heat passage area arranged along the second direction, the first heat passage area is opened between adjacent functional areas, and the first heat passage area includes a first hollow hole passing through the pin socket board along the first direction.
[0009] According to the semiconductor product packaging fixture provided by the embodiment of the present application, the functional area is avoided to form an opening area and a second heat passage area, the socket is opened in the opening area, and the second heat passage area includes a second hollow hole of the pin socket board passing through the first direction.
[0010] According to the semiconductor product packaging fixture provided by the embodiment of the present application, the multiple layers of the pin plug-in boards are detachably connected.
[0011] According to the semiconductor product packaging fixture provided in an embodiment of the present application, the pin mounting seat includes a first pin limiting layer and a second pin limiting layer arranged in a stacked manner, the first pin limiting layer includes a first pin plug-in board and a plurality of first mounting parts, the first mounting part is protrudingly arranged on the side of the first pin plug-in board facing away from the second pin limiting layer, the plurality of first mounting parts are arranged around the circumference of the functional area, the side of the first mounting part facing away from the second pin limiting layer includes a limiting groove for limiting the semiconductor product supported by the product mounting seat, and some of the first mounting parts are connected to the product mounting seat.
[0012] According to the semiconductor product packaging fixture provided by an embodiment of the present application, the second pin limiting layer includes a second pin plug-in board and a second mounting portion mounted on the second pin plug-in board, and the second mounting portion is connected to a portion of the first mounting portion.
[0013] According to the semiconductor product packaging fixture provided in an embodiment of the present application, the product mounting seat includes a plurality of mounting areas arranged along the second direction, and the mounting areas are arranged opposite to the functional areas for independently supporting the semiconductor product; the mounting area includes a third hollow hole passing through the product mounting seat along the first direction, and the size of the third hollow hole is smaller than the size of the semiconductor product.
[0014] According to the semiconductor product packaging fixture provided by an embodiment of the present application, the product mounting seat further includes a third heat passage area arranged between the mounting areas, and the third heat passage area includes a fourth hollow hole passing through the product mounting seat along the first direction.
[0015] The semiconductor product packaging fixture of the embodiment of the present application extends the length of the pin channel in the direction of the pin length by stacking a pin limiting layer and a temperature diffusion layer in a first direction, thereby extending the limiting length of the pin, so as to prevent the flowing solder from causing the pin to deflect and tilt during reflow soldering, thereby improving the packaging quality and reducing the probability of collision between the pin and the fixture when the semiconductor product is disassembled; and the temperature expansion layer can ensure that the semiconductor product is heated evenly during reflow soldering. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0017] Figure 1 A schematic structural diagram of a semiconductor product packaging fixture provided by some embodiments of the present application is shown;
[0018] Figure 2 Showing an example Figure 1 sectional view of
[0019] Figure 3 A schematic diagram showing the structure of pins provided in some embodiments of the present application is shown;
[0020] Figure 4 Shows a schematic structural diagram of a pin mounting base provided in some embodiments of the present application;
[0021] Figure 5 Showing an example Figure 4 A top view of
[0022] Figure 6 It shows a front view of a pin mounting base according to another embodiment of the present application;
[0023] Figure 7 A schematic structural diagram of a second pin plug-in board provided in some embodiments of the present application is shown;
[0024] Figure 8 A schematic diagram of a surface structure of a product mounting base provided by some embodiments of the present application is shown;
[0025] Figure 9 Another schematic diagram of the surface structure of the product mounting base provided in some embodiments of the present application is shown.
[0026] Reference numerals:
[0027] 100: Pin mounting base; 101: Pin plug board; 110: Pin limiting layer; 111: Functional area; 112: First hollow hole; 113: Opening area; 114: Positioning hole; 115: Second hollow hole; 120: Temperature diffusion layer; 121: Hollow area; 130: Pin channel; 131: Socket; 102: First pin limiting layer; 140: First pin plug board; 141: First mounting portion; 142: Limiting groove; 103: Second pin limiting layer; 150: Second pin plug board; 151: Second mounting portion;
[0028] 200: Product mounting seat; 210: Mounting area; 211: Third hollow hole; 212: Fourth hollow hole; 221: Protrusion; 301: Semiconductor product; 302: Pin; 310: Extension section; 311: Variable diameter section; 312: Connecting section; 313: Third mounting portion; 314: Positioning pin. DETAILED DESCRIPTION
[0029] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is merely to provide a better understanding of the present application by illustrating the examples of the present application.
[0030] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, the elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the process, method, article, or device comprising the elements.
[0031] Reflow soldering of semiconductor products with pins is a process that melts solder by heating, thereby achieving a reliable electrical connection between the pins and the pads on the circuit board. The principles of reflow soldering are primarily based on heat distribution, temperature control, and the properties of the solder. During the reflow process, solder is placed between the pins and the pads on the circuit board and then heated by a heater. The assembly material between the pins and the board is solder paste, which becomes fluid when heated. When subjected to sufficient heat, the solder paste melts and flows, filling the gap between the pins and the pads. Upon cooling, the solder solidifies, forming a reliable electrical connection.
[0032] When soldering pins to circuit boards, in order to ensure the accuracy of the pin position on the circuit board, a fixture is usually used to encapsulate the pins and circuit board. The circuit board and pins are fixed in the fixture and then placed in the reflow soldering equipment for reflow soldering. The limitation of the fixture reduces the influence of solder flow on the pin position.
[0033] However, the pins are long, and the existing fixture's structure for retaining the pins is limited in height, so the fixture's ability to retain the pins is limited. Furthermore, during disassembly, the pins are exposed for a long time outside the fixture, making them easily damaged and deformed. Simply increasing the fixture's height would affect the solder paste's uniform heating.
[0034] In order to solve the problems in the prior art, the present invention provides a semiconductor product packaging fixture. The semiconductor product packaging fixture provided by the present invention is first introduced below.
[0035] Figure 1 shows a schematic structural diagram of a semiconductor product packaging fixture provided by some embodiments of the present application, Figure 2 Showing an example Figure 1 sectional view of .
[0036] like Figure 1 and Figure 2 As shown, the present application provides a semiconductor product 301 packaging fixture including a pin mounting seat 100 and a product mounting seat 200, the pin mounting seat 100 includes a pin limiting layer 110, a temperature diffusion layer 120 and a pin channel 130 stacked along a first direction, the pin channel 130 is arranged along the first direction through the pin limiting layer 110 and the temperature diffusion layer 120, and is used to plug in the pin 302; the product mounting seat 200 is detachably connected to the pin mounting seat 100, and is used to support the semiconductor product 301 welded with the pin 302, and abut against the pin 302.
[0037] Specifically, the pin mounting base 100 includes a pin limiting layer 110 and a temperature diffusion layer 120 stacked along a first direction, and the pin limiting layer 110 and the temperature diffusion layer 120 are alternately arranged. The pin mounting base 100 can be an integrally formed structure, or it can be a detachable connection structure in which the temperature diffusion layer 120 and the pin limiting layer 110 are stacked. The first direction can be the thickness direction of the pin mounting base 100. The pin mounting base 100 is provided with multiple layers of pin limiting layers 110 along the first direction, and the temperature diffusion layer 120 is provided between adjacent pin limiting layers 110. The pin limiting layer 110 limits the pin 302 along the length direction of the pin 302 to improve the stability of the pin 302. The temperature diffusion layer 120 mainly makes the temperature uniform in the packaging fixture during reflow heating or cooling, so that the solder paste in various places on the circuit board is evenly heated or evenly cooled, avoiding excessive local temperature in the packaging fixture. The stacked pin limiting layer 110 and temperature diffusion layer 120 not only improve the limiting capability of the pins 302, but also improve the overall temperature uniformity of the packaging fixture. For example, the circuit board can be a DBC board or a PBC board.
[0038] The pin mounting seat 100 also includes a pin channel 130, which is arranged along the first direction through the pin limiting layer 110 and the temperature diffusion layer 120. The pin 302 is inserted into the pin channel 130. The pin 302 can be exposed from the pin channel 130 or completely sunk into the pin channel 130. The length of the pin 302 exposed from the pin channel 130 is less than 1 / 5 of the total length of the pin 302 to reduce the chance of touching the pin 302 during disassembly and other processes.
[0039] The product mounting base 200 and the pin mounting base 100 are detachably connected to facilitate assembly of the semiconductor product 301 and the pins 302. During assembly, the pin mounting base 100 is first inverted, and the pins 302 are inserted into the pin mounting base 100. Then, the semiconductor product 301, coated with solder paste, is mounted on the pin mounting base 100, covering the pins 302. Finally, the product mounting base 200 is placed over the semiconductor product 301 and connected to the pin mounting base 100. Finally, the connected product mounting base 200 and pin mounting base 100 are flipped over, so that the pin mounting base 100 is placed above the product mounting base 200. The semiconductor product 301 is supported by the product mounting base 200, and the pins 302 are in contact with the semiconductor product 301.
[0040] Figure 3 A schematic structural diagram of the pin 302 provided in some embodiments of the present application is shown.
[0041] like Figure 3 As shown, with respect to a pin 302 structure of the present application, the pin 302 includes a connecting section 312, a reducing section 311, and an extension section 310, which are arranged in sequence. The end of the connecting section 312 is connected to the semiconductor product 301, specifically, the end of the connecting section 312 is connected to the circuit board of the semiconductor product 301. The reducing section 311 is connected between the extension section 310 and the connecting section 312. The radial dimension of the reducing section 311 is larger than the radial dimension of the extension section 310. When the pin 302 is inserted into the pin channel 130, the extension section 310 is placed in the pin channel 130. The larger radial dimension of the reducing section 311 acts as a limiter, preventing the connecting section 312 from being placed in the pin channel 130. This allows the end of the connecting section 312 to better contact the semiconductor product 301 after the product mounting base 200 is connected to the pin mounting base 100.
[0042] like Figure 2 As shown, in one embodiment of the present application, the temperature diffusion layer 120 includes a hollow area 121 opened along the second direction, and the second direction is set at an angle to the first direction.
[0043] The temperature diffusion layer 120 may include one or more hollow regions 121, and the multiple hollow regions 121 may be interconnected or separated. The hollow regions 121 facilitate temperature diffusion within the pin mounting base 100, and reduce the quality and cost of the pin mounting base 100. The second direction may be the extension direction of the pin mounting base 100.
[0044] In other embodiments of the present application, the temperature diffusion layer 120 may also have a heat exchange channel, which extends along the second direction. A heat exchange medium of appropriate temperature is introduced into the heat exchange channel based on the current temperature of the packaging fixture. For example, during the heating process, a high-temperature heat exchange medium is introduced, and during the cooling process, a low-temperature heat exchange medium is introduced, so that the temperature of the temperature diffusion layer 120 is consistent with the temperature of other positions of the packaging fixture.
[0045] Figure 4 Schematic diagram of the structure of the pin mounting base 100 provided in some embodiments of the present application is shown. Figure 5 Showing an example Figure 4 Top view of .
[0046] like Figure 4 and Figure 5 As shown, in some embodiments of the present application, the pin limiting layer 110 includes a pin plug-in board 101 and a socket 131, the pin plug-in board 101 includes a plurality of functional areas 111 arranged along the second direction, the functional areas 111 are arranged opposite to the hollow area 121, the socket 131 is opened in the functional area 111, and is arranged to penetrate the pin plug-in board 101 along the first direction to form a pin channel 130.
[0047] Among them, the pin limiting layer 110 includes a pin plug board 101 or multiple stacked pin plug boards 101, and each pin plug board 101 is provided with spaced functional areas 111 along the second direction. When there are multiple layers of pin plug boards 101, the structures of the pin plug boards 101 on each layer are the same. In the embodiment of the present application, one functional area 111 corresponds to one semiconductor product 301, or several functional areas 111 correspond to one semiconductor product 301. That is to say, the packaging fixture of the present application can simultaneously install multiple semiconductor products 301 and perform reflow soldering at the same time. When there is one hollow area 121, all functional areas 111 on the pin plug board 101 are arranged relative to the hollow area 121; when there are multiple hollow areas 121, one hollow area 121 can correspond to multiple functional areas 111, or one hollow area 121 corresponds to one functional area 111.
[0048] For example, hollow regions 121 forming the temperature diffusion layer 120 are spaced apart between adjacent pin plug-in boards 101 .
[0049] The socket 131 is opened on the pin plug-in board 101 and passes through the pin plug-in board 101. The socket 131 is connected to the hollow area 121. The socket 131 on the pin plug-in board 101 of the multi-layer pin limiting layer 110 is connected through the hollow areas 121 of each layer of temperature diffusion layer 120 to form a pin channel 130.
[0050] like Figure 5 As shown, in another embodiment of the present application, the pin plug board 101 also includes a first heat passage area arranged along the second direction, the first heat passage area is opened between adjacent functional areas 111, and the first heat passage area includes a first hollow hole 112 that penetrates the pin plug board 101 along the first direction.
[0051] On the one hand, the first hollow holes 112 can reduce the weight of the pin plug board 101, and on the other hand, the first hollow holes 112 can facilitate the heat flow between the upper and lower pin plug boards 101. The first heat passage area includes one or more first hollow holes 112, and the shapes of the multiple first hollow holes 112 can be the same or different.
[0052] Continue to refer Figure 5 In an optional embodiment of the present application, in order to improve the temperature uniformity capability of the pin mounting base 100, the functional area 111 is avoided to form an opening area 113 and a second heat passage area, the socket 131 is opened in the opening area 113, and the second heat passage area includes a second hollow hole 115 of the pin plug board 101 penetrating along the first direction.
[0053] The pins 302 on the circuit board are mounted in an irregular position. Therefore, the second heat passage area and the opening area 113 are also arranged irregularly. The opening area 113 is further divided by the socket 131 corresponding to the pin 302. The second heat passage area is defined by the second hollow holes 115 located in locations other than the socket 131. For example, the opening areas 113 are positioned circumferentially around the second heat passage area. A single functional area 111 of the pin socket board 101 can have multiple second heat passage areas, and can also have multiple opening areas 113. Each second heat passage area can have one or more second hollow holes 115, and the shapes of the multiple second hollow holes 115 can be the same or different.
[0054] Furthermore, in other embodiments of the present application, the multi-layer pin socket board 101 is detachably connected. Since the pins 302 required by different semiconductor products 301 have different heights, pin socket boards 101 with different numbers of layers can be provided based on the height of the pins 302. The multi-layer pin socket board 101 is detachably connected, thereby improving the adaptability of the packaging fixture.
[0055] Furthermore, the multiple layers of sequentially connected pin plug boards 101 can improve the convenience of removing the pins 302 , avoiding removing the thicker pin mounting base 100 at one time and removing the thinner pin plug boards 101 one layer at a time to reduce the chance of bumping the pins 302 .
[0056] Figure 6 A front view of a pin mounting base 100 according to another embodiment of the present application is shown.
[0057] like Figure 4 and Figure 6 As shown, in some embodiments of the present application, the pin mounting seat 100 includes a first pin limiting layer 102 and a second pin limiting layer 103 arranged in a stacked manner, the first pin limiting layer 102 includes a first pin plug-in board 140 and a plurality of first mounting portions 141, the first mounting portion 141 is protrudingly arranged on the side of the first pin plug-in board 140 facing away from the second pin limiting layer 103, the plurality of first mounting portions 141 are arranged around the functional area 111, the side of the first mounting portion 141 facing away from the second pin limiting layer 103 includes a limiting groove 142, which is used to limit the semiconductor product 301 supported by the product mounting seat 200, and part of the first mounting portion 141 is connected to the product mounting seat 200.
[0058] Specifically, the product mounting base 200 and the second pin-retaining layer 103 are connected via the first pin-retaining layer 102. The first pin-retaining layer 102 includes a first pin-plugging plate 140. During installation, the first pin-plugging plate 140 is used to directly receive the semiconductor product 301. After installation, the pin mounting base 100 is flipped over, and the semiconductor product 301 is positioned between the first pin-plugging plate 140 and the product mounting base 200. The first pin-plugging plate 140 also includes the opening area 113 and the second heat-transmission area formed by avoiding the functional area 111 of the pin-plugging plate 101 in the aforementioned embodiment.
[0059] In order to improve the accuracy of the relative position of the semiconductor product 301 and the pin 302, a plurality of first mounting portions 141 are provided on the side of the first pin plug-in board 140 facing away from the second pin limiting layer 103. The side of the first mounting portion 141 facing away from the second pin limiting layer 103 includes a limiting groove 142 for limiting the semiconductor product 301 supported by the product mounting seat 200.
[0060] For example, on one side of the first mounting portion 141 close to the functional area 111, a limiting groove 142 is recessed in the depth direction, and the limiting groove 142 matches the shape of the overlap of the semiconductor product 301. For example, the limiting groove 142 overlaps and limits the four corners of the semiconductor product 301, so the limiting groove 142 can be L-shaped or rectangular. The structures of multiple first mounting portions 141 can be the same or different, and two first mounting portions 141 are shared between adjacent functional areas 111. Among them, the first mounting portion 141 is protruding above the first pin plug board 140. After the semiconductor product 301 is installed in the limiting groove 142, there is a distance between it and the first pin plug board 140.
[0061] Figure 7 A schematic structural diagram of a second pin plug-in board 150 provided in some embodiments of the present application is shown.
[0062] Continue to refer Figure 7 In another optional embodiment of the present application, the second pin limiting layer 103 includes a second pin plug-in board 150 and a second mounting portion 151 mounted on the second pin plug-in board 150 , and the second mounting portion 151 is connected to a portion of the first mounting portion 141 .
[0063] The second pin limiting layer 103 may include multiple layers of second pin plug-in boards 150 , a temperature diffusion layer 120 is disposed between the multiple layers of second pin plug-in boards 150 , and a temperature diffusion layer 120 is disposed between the first pin plug-in board 140 and the second pin plug-in board 150 .
[0064] The second mounting portions 151 can be arranged around the second pin board 150 and connected to some of the first mounting portions 141 around the first pin board 140. For example, six first mounting portions 141 can be arranged around the first pin board 140, and four second mounting portions 151 can be arranged on the second pin board 150. The four second mounting portions 151 can be connected to four of the six first mounting portions 141. The first mounting portions 141 and the second mounting portions 151 can be connected using pins.
[0065] Figure 8 A schematic diagram of a surface structure of a product mounting base 200 provided in some embodiments of the present application is shown; Figure 9 Another schematic structural diagram of a product mounting base 200 provided in some embodiments of the present application is shown.
[0066] like Figure 8 and Figure 9As shown, in some embodiments of the present application, the product mounting seat 200 includes a plurality of mounting areas 210 arranged along the second direction, and the mounting areas 210 are arranged opposite to the functional areas 111 for independently carrying the semiconductor product 301; the mounting area 210 includes a third hollow hole 211 passing through the product mounting seat 200 along the first direction, and the size of the third hollow hole 211 is smaller than the size of the semiconductor product 301.
[0067] The product mounting base 200 includes multiple mounting areas 210 arranged along the second direction. Each mounting area 210 defines one or more third hollow holes 211. Placing a semiconductor product 301 above the third hollow holes 211 allows heat to quickly pass through the third hollow holes 211 during heating, heating the solder paste on the semiconductor product 301. During cooling, the third hollow holes 211 can quickly cool the semiconductor product 301. To minimize heat resistance on the product mounting base 200, the third hollow holes 211 can be rectangular, slightly smaller than the semiconductor product 301, ensuring its stability.
[0068] In addition, in order to improve the abutting effect, a protrusion 221 is provided in the circumferential direction of the third hollow hole 211 , and the semiconductor product 301 is placed above the protrusion 221 .
[0069] like Figure 9 As shown, in other embodiments of the present application, the product mounting base 200 further includes a third heat passage area disposed between the mounting areas 210 , and the third heat passage area includes a fourth hollow hole 212 penetrating the product mounting base 200 along the first direction.
[0070] The third heat passage area may be provided with one or more fourth hollow holes 212 to reduce the heat blocking effect of the product mounting base 200 . The structures of the plurality of fourth hollow holes 212 may be the same or different.
[0071] In addition, if Figure 5 and Figure 8 As shown, the product mounting base 200 includes a mounting plate and a third mounting portion 313. The mounting area 210 and the third heat passage area are both disposed on the mounting plate, and the third mounting portion 313 is connected to the circumference of the mounting plate. The third mounting portion 313 is provided with a locating pin 314 that engages with the locating hole 114 of the first pin socket 140. The third mounting portion 313 is connected to a portion of the first mounting portion 141. For example, there are four third mounting portions 313, two of which are provided with a locating pin 314. Furthermore, two third mounting portions 313 are connected to two first mounting portions 141, for example, by bolts.
[0072] The above description is only a specific embodiment of the present application. Those skilled in the art will clearly understand that for the convenience and brevity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the scope of protection of the present application.
Claims
1. A semiconductor product packaging fixture, characterized in that: include: A pin mounting seat comprises a pin limiting layer, a temperature diffusion layer and a pin channel stacked along a first direction, wherein the pin channel is arranged along the first direction through the pin limiting layer and the temperature diffusion layer for inserting pins; The product mounting seat is detachably connected to the pin mounting seat, and is used to support the semiconductor product welded to the pin and abut against the pin.
2. The semiconductor product packaging fixture according to claim 1, characterized in that: The temperature diffusion layer includes a hollow area opened along a second direction, and the second direction is arranged at an angle to the first direction.
3. The semiconductor product packaging fixture according to claim 2, characterized in that: The pin limiting layer includes a pin plug-in board and a socket. The pin plug-in board includes multiple functional areas arranged along the second direction. The functional areas are arranged opposite to the hollow area. The socket is opened in the functional area and penetrates the pin plug-in board along the first direction to form the pin channel.
4. The semiconductor product packaging fixture according to claim 3, characterized in that: The pin plug board further includes a first heat passage area arranged along the second direction, the first heat passage area is opened between adjacent functional areas, and the first heat passage area includes a first hollow hole penetrating the pin plug board along the first direction.
5. The semiconductor product packaging fixture according to claim 3, characterized in that: The functional area is avoided to form an opening area and a second heat passing area, the plug hole is opened in the opening area, and the second heat passing area includes a second hollow hole of the pin plug board penetrating along the first direction.
6. The semiconductor product packaging fixture according to claim 3, characterized in that: The pin plug boards of the multiple layers are detachably connected.
7. The semiconductor product packaging fixture according to claim 3, characterized in that: The pin mounting seat includes a first pin limiting layer and a second pin limiting layer arranged in a stacked manner. The first pin limiting layer includes a first pin plug-in board and multiple first mounting parts. The first mounting part is protruding on the side of the first pin plug-in board facing away from the second pin limiting layer. Multiple first mounting parts are arranged around the circumference of the functional area. The side of the first mounting part facing away from the second pin limiting layer includes a limiting groove for limiting the semiconductor product supported by the product mounting seat. Some of the first mounting parts are connected to the product mounting seat.
8. The semiconductor product packaging fixture according to claim 7, characterized in that: The second pin limiting layer includes a second pin plug-in board and a second mounting portion mounted on the second pin plug-in board, wherein the second mounting portion is connected to a portion of the first mounting portion.
9. The semiconductor product packaging fixture according to claim 3, characterized in that: The product mounting seat includes multiple mounting areas arranged along the second direction, and the mounting areas are arranged opposite to the functional areas for independently supporting the semiconductor product; the mounting area includes a third hollow hole passing through the product mounting seat along the first direction, and the size of the third hollow hole is smaller than the size of the semiconductor product.
10. The semiconductor product packaging fixture according to claim 9, wherein: The product mounting seat further includes a third heat passing area disposed between the mounting areas, and the third heat passing area includes a fourth hollow hole penetrating the product mounting seat along the first direction.