Temperature compensation circuit and chip

Abstract

The utility model discloses a temperature compensation circuit and a chip, the temperature compensation circuit comprises an error amplifier, a first resistor, a second resistor, a third resistor, a first triode and a second triode, and the error amplifier comprises a third triode and a fourth triode; the first end of the first resistor is connected with the first end of the second resistor and the base electrode of the third triode, the second end of the first resistor is connected with the base electrode of the second triode and the collector electrode of the second triode, and the first end of the third resistor is connected with the base electrode of the fourth triode, the collector electrode of the first triode and the base electrode of the first triode. And the second resistor generates a voltage compensation component for high-order temperature compensation based on the base current of the third triode. According to the temperature compensation circuit and the chip provided by the utility model, a voltage compensation component for high-order temperature compensation is generated on the second resistor through the base current on the third triode, so that compensation is directly realized, and no extra area is consumed.

Description

Technical Field

[0001] The utility model belongs to the technical field of integrated circuits, and in particular relates to a temperature compensation circuit and a chip. Background Art

[0002] like Figure 1 As shown, the core idea of ​​realizing bandgap reference high-order temperature coefficient compensation in the prior art solution is to compensate for the high-order temperature quantity remaining after the first-order temperature compensation by introducing a nonlinear compensation current having the same high-order temperature component as the emitter junction voltage VBE of the transistors Q1 and Q2. The size of the nonlinear current compensation term can be adjusted by changing the size of the series compensation resistors R4 and R5.

[0003] The disadvantage of the existing technical solution is that an additional BJT transistor Q3 and compensation resistors R4 and R5 are required to generate the required compensation current. In addition to increasing the area consumption, the mismatch between these devices and the bandgap reference main circuit transistors Q1, Q2 and resistors R1 and R0 causes the actual temperature coefficient of the reference voltage to degrade, weakening the effect of high-order temperature compensation.

[0004] The information disclosed in this background technology section is only intended to increase the understanding of the overall background of the present invention, and should not be regarded as an admission or any form of suggestion that the information constitutes the prior art already known to those skilled in the art. Utility Model Content

[0005] The purpose of the present utility model is to provide a temperature compensation circuit and chip, which can further reduce the temperature coefficient on the basis of first-order compensation, improve the stability of high-order temperature compensation compared with existing technical solutions, and at the same time achieve less area consumption (no additional transistors and compensation resistors are required).

[0006] In order to achieve the above object, a specific embodiment of the present utility model provides a temperature compensation circuit, including: an error amplifier, a first resistor, a second resistor, a third resistor, a first transistor and a second transistor, wherein the error amplifier includes a third transistor and a fourth transistor;

[0007] The first end of the first resistor is connected to the first end of the second resistor and the base of the third transistor, the second end of the first resistor is connected to the base of the second transistor and the collector of the second transistor, the first end of the third resistor is connected to the base of the fourth transistor, the collector of the first transistor, and the base of the first transistor, the second end of the second resistor is connected to the second end of the third resistor to output a reference voltage, and the second resistor generates a voltage compensation component for high-order temperature compensation based on the base current of the third transistor.

[0008] In one or more embodiments of the present invention, the ratio of the resistance value of the second resistor to the resistance value of the third resistor is [7.8-8.2]:1.

[0009] In one or more embodiments of the present invention, the ratio of the resistance value of the third resistor to the resistance value of the first resistor is 1:[0.7-1].

[0010] In one or more embodiments of the present invention, the ratio of the resistance value of the second resistor, the resistance value of the third resistor and the resistance value of the first resistor is [7.8-8.2]:1:[0.7-1].

[0011] In one or more embodiments of the present invention, the ratio of the resistance of the second resistor, the resistance of the third resistor, and the resistance of the first resistor is 8:1:1.

[0012] In one or more embodiments of the present invention, the second resistor is a resistor having a negative temperature characteristic.

[0013] In one or more embodiments of the present invention, the ratio of the emitter junction area or number of the first transistor and the second transistor is 1:1.

[0014] In one or more embodiments of the present invention, the error amplifier further includes a tail resistor, and the tail resistor is connected to the emitter of the third transistor and the emitter of the fourth transistor.

[0015] In one or more embodiments of the present invention, the error amplifier further includes a current mirror load unit, and the current mirror load unit is connected to the collector of the third transistor and the collector of the fourth transistor.

[0016] The utility model also discloses a chip, comprising the temperature compensation circuit.

[0017] Compared to the prior art, the temperature compensation circuit and chip of the present invention generates a voltage compensation component for high-order temperature compensation on a second resistor via the base current on the third transistor input to the error amplifier, thereby directly achieving high-order temperature compensation without consuming additional area. The temperature compensation circuit and chip of the present invention can adjust the base current on the third transistor by adjusting the tail resistor of the error amplifier, thereby reducing the complexity of reference voltage calibration under process offsets. The compensation scheme of the present invention introduces fewer mismatch sources and has lower matching requirements than the prior art scheme. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the embodiments or the description of the prior art. Obviously, the drawings described below are only some of the embodiments described in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without inventive efforts.

[0019] Figure 1 This is a circuit schematic diagram of a bandgap reference high-order temperature coefficient compensation circuit in the prior art.

[0020] Figure 2 FIG. 4 is a circuit schematic diagram of a temperature compensation circuit in one embodiment.

[0021] Figure 3 Schematic diagram of first-order and high-order temperature compensation curves of a temperature compensation circuit in one embodiment. DETAILED DESCRIPTION

[0022] In order to enable those skilled in the art to better understand the technical solutions of the present invention, the following will provide a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only a portion of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of the present invention.

[0023] The terms "coupled," "connected," or "connected" as used in this specification encompass both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as an electrically conductive medium, which may have parasitic inductance or capacitance. An indirect connection may also include a connection through other active or passive devices, such as switches, follower circuits, or other circuits or components, to achieve the same or similar functional objectives. Furthermore, in utility models, terms such as "first" and "second" are primarily used to distinguish one technical feature from another and do not necessarily require or imply a specific relationship, quantity, or order between these technical features.

[0024] In the detailed description of the specification, reference is made to the accompanying drawings forming a part thereof, wherein like reference numerals designate like parts throughout, and wherein exemplary embodiments that may be implemented are shown by way of example. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. Therefore, the following detailed description should not be construed in a limiting sense.

[0025] The various operations in the specification may be described as multiple discrete actions or operations in a manner that is most helpful in understanding the claimed subject matter. However, the order of description should not be interpreted as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in an order different from the described embodiments. Various additional operations may be performed and / or the described operations may be omitted in additional embodiments.

[0026] For the purposes of this disclosure, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of this disclosure, the phrase "A, B and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).

[0027] Various components and devices may be referred to or shown in the singular herein (e.g., "transistor," "transistor," "switch," etc.), but this is merely for ease of discussion, and any element referred to in the singular may include multiple such elements in accordance with the teachings herein.

[0028] The specification uses the phrases "in one embodiment," "in other embodiments," or "in some embodiments," which can each refer to one or more of the same or different embodiments. In addition, the terms "including," "comprising," "having," etc. used with respect to the embodiments of the present disclosure are synonymous.

[0029] like Figure 2 As shown, a temperature compensation circuit in an embodiment of the present invention includes: an error amplifier EA, a first resistor R1, a second resistor R2, a third resistor R3, a first transistor Q1 and a second transistor Q2, wherein the error amplifier EA includes a third transistor Q3, a fourth transistor Q4, a tail resistor RE and a current mirror load unit 10.

[0030] A first end of the first resistor R1 is connected to a first end of the second resistor R2 and a base of the third transistor Q3. A second end of the first resistor R1 is connected to the base of the second transistor Q2 and the collector of the second transistor Q2. A first end of the third resistor R3 is connected to the base of the fourth transistor Q4, the collector of the first transistor Q1, and the base of the first transistor Q1. A second end of the second resistor R2 is connected to a second end of the third resistor R3 to output a reference voltage VBG. The second resistor R2 generates a voltage compensation component for high-order temperature compensation based on the base current of the third transistor Q3.

[0031] A first end of the tail resistor RE is connected to the emitter of the third transistor Q3 and the emitter of the fourth transistor Q4, a second end of the tail resistor RE, the emitter of the first transistor Q1, and the emitter of the second transistor Q2 are connected to the ground voltage, and the current mirror load unit 10 is connected to the collector of the third transistor Q3 and the collector of the fourth transistor Q4.

[0032] In one embodiment, the ratio of the resistance values ​​of the second resistor R2, the third resistor R3, and the first resistor R1 is [7.8-8.2]:1:[0.7-1]. Preferably, the ratio of the resistance values ​​of the second resistor R2, the third resistor R3, and the first resistor R1 is 8:1:1. In other embodiments, the ratio of the resistance values ​​of the second resistor R2, the third resistor R3, and the first resistor R1 can be selected as needed.

[0033] In other embodiments, the ratio of the resistance value of the second resistor R2 to the resistance value of the first resistor R1 can be selected from [8-11]:1. In other embodiments, the ratio of the resistance value of the second resistor R2 to the resistance value of the third resistor R3 can be selected from [7.8-8.2]:1. In other embodiments, the ratio of the resistance value of the third resistor R3 to the resistance value of the first resistor R1 can be selected from 1:[0.7-1].

[0034] like Figure 2 As shown, the third transistor Q3 and the fourth transistor Q4 form an input differential pair of the error amplifier EA. First, the bias voltage VBE is used to bias the third transistor Q3 of the error amplifier EA. The base current IB of the third transistor Q3 has the same nonlinear negative temperature characteristic as the bias voltage VBE. Then the base current IB flows through the second resistor R2, thereby superimposing a nonlinear negative temperature characteristic voltage VCOMP proportional to the bias voltage VBE on the final reference voltage VBG. This voltage VCOMP can be used to offset the high-order temperature coefficient of the bias voltage VBE, thereby achieving curvature compensation of the reference voltage VBG. Under the condition that the temperature coefficient is consistent after compensation, smaller area consumption is achieved due to the simple compensation structure. The curve of each voltage component changing with temperature during the compensation process is shown as follows: Figure 3 shown.

[0035] Under the condition that the input offset voltage Vos of the error amplifier EA is ≈ 0, the reference voltage after curvature compensation is The bias voltage VBE is the emitter junction voltage of the first transistor Q1 or the second transistor Q2, the first resistor R1 and the second resistor R2 are negative temperature characteristic resistors, V T is the thermal voltage, N is the ratio of the emitter junction area of ​​the first transistor Q1 to the second transistor Q2, and IB is the base current of the third transistor Q3. The expression can be approximately expressed as Wherein β is the current gain coefficient of the third transistor Q3, rbe and re are the emitter junction resistance and emitter resistance of the third transistor Q3 respectively.

[0036] In the traditional circuit, a high current gain input transistor and a large resistance tail resistor RE are used to minimize the influence of the base current IB on the reference voltage VBG. However, this solution uses the influence of the base current IB to increase the second term in the expression of the reference voltage VBG by changing the proportional relationship between the second resistor R2, the third resistor R3 and the first resistor R1. And the size of the third IB*R2 component. The first two items lead to a stronger positive temperature coefficient after first-order temperature compensation, causing the reference voltage VBG to increase with temperature, such as Figure 3 (a). The third term can be introduced due to the increase of the second resistor R2 and the base current IB. Figure 3 The nonlinear voltage compensation component IB*R2 shown in (b) is compensated and finally the result is as follows Figure 3 (c) shows the high-order temperature compensation curve. At the same time, since the second resistor R2 is a negative temperature characteristic resistor, the nonlinear voltage compensation component can be made smaller at high temperatures, and the compensation effect in the high temperature section will be better.

[0037] Due to the unique proportional relationship between the second resistor R2, the third resistor R3, and the first resistor R1, the emitter junction area or number ratio of the first transistor Q1 and the second transistor Q2 can be 1:1. This greatly reduces the area of ​​the transistors, which occupy the vast majority of the bandgap reference, and reduces the overall area by nearly half. Furthermore, due to the large resistance of the second resistor R2, the base current IB can be compensated for by a moderate voltage across the second resistor R2 by simply adjusting the tail resistor RE, thereby reducing the power consumption of the error amplifier EA and the overall circuit. Furthermore, due to the easily adjustable tail resistor RE, the reference voltage VBG can be conveniently trimmed and calibrated by adjusting the value of the tail resistor RE.

[0038] The present application also discloses a chip including the above-mentioned temperature compensation circuit.

[0039] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the present invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be encompassed within the present invention. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

[0040] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A temperature compensation circuit, characterized in that: include: An error amplifier, a first resistor, a second resistor, a third resistor, a first transistor and a second transistor, wherein the error amplifier includes a third transistor and a fourth transistor; The first end of the first resistor is connected to the first end of the second resistor and the base of the third transistor, the second end of the first resistor is connected to the base of the second transistor and the collector of the second transistor, the first end of the third resistor is connected to the base of the fourth transistor, the collector of the first transistor, and the base of the first transistor, the second end of the second resistor is connected to the second end of the third resistor to output a reference voltage, and the second resistor generates a voltage compensation component for high-order temperature compensation based on the base current of the third transistor.

2. The temperature compensation circuit according to claim 1, wherein: The ratio of the resistance value of the second resistor to the resistance value of the third resistor is [7.8-8.2]:

1.

3. The temperature compensation circuit according to claim 1, wherein: The ratio of the resistance value of the third resistor to the resistance value of the first resistor is 1:[0.7-1].

4. The temperature compensation circuit according to claim 1, wherein: The ratio of the resistance value of the second resistor, the resistance value of the third resistor and the resistance value of the first resistor is [7.8-8.2]:1:[0.7-1].

5. The temperature compensation circuit according to claim 4, wherein: The ratio of the resistance value of the second resistor, the resistance value of the third resistor and the resistance value of the first resistor is 8:1:

1.

6. The temperature compensation circuit according to claim 1, wherein: The second resistor is a resistor having a negative temperature characteristic.

7. The temperature compensation circuit according to claim 1, wherein: The ratio of the emitter junction area or number of the first triode to the second triode is 1:

1.

8. The temperature compensation circuit according to claim 1, wherein: The error amplifier further includes a tail resistor connected to the emitter of the third transistor and the emitter of the fourth transistor.

9. The temperature compensation circuit according to claim 1, wherein: The error amplifier further includes a current mirror load unit, and the current mirror load unit is connected to the collector of the third transistor and the collector of the fourth transistor.

10. A chip, characterized in that: The device comprises a temperature compensation circuit as claimed in any one of claims 1 to 9.

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