Interface circuit board, circuit board assembly and camera testing device

Abstract

The utility model discloses an interface circuit board, a circuit board assembly and a camera testing device, the front surface is provided with a first connector installation area, two first lead wire areas and two interface areas, the two interface areas and the two first lead wire areas are located at two sides of the first connector installation area, the sensor installation area comprises a plurality of first pins, and the sensor installation area comprises a plurality of second pins. The interface area comprises a plurality of interfaces corresponding to each column of first pins, the first lead area comprises a plurality of first leads, each first lead is correspondingly connected with the first pins and the interfaces, and the interfaces are communicated with the front surface and the back surface of the interface circuit board; a second connector installation area and two second lead wire areas are arranged on the back face of the first connector installation area, the two second lead wire areas are located on the two sides of the second connector installation area, the second connector installation area comprises a plurality of second pins, the second lead wire areas comprise a plurality of second lead wires, and the second lead wires are correspondingly connected with the second pins and the interfaces. In this way, all signals can be collected, and the method is universal to various camera board cards.

Description

Technical Field

[0001] The present application relates to the field of camera board testing, and in particular to an interface circuit board, a circuit board assembly, and a camera testing device. Background Art

[0002] When performing electrical testing on signals between boards, the connector pins near the edge of the board can be touched with an oscilloscope probe. However, due to the small spacing between the connector pins, it is very easy for the oscilloscope probe to slide and cause a signal short circuit, resulting in test failure or even damage to the device. The connector pins far from the edge of the board cannot be touched by the oscilloscope probe at all, resulting in the inability to be tested.

[0003] The existing technology circumvents the difficulty of testing camera board interfaces by using the following solutions. One approach is to add test points for some signals during PCB design, but this method has the drawback of only testing some signals, resulting in incomplete signal data. Another approach is to design a test board sandwiched between the front and back boards to draw out the camera board signals for testing, so as to test each signal. However, because the signal definition of each camera is different and the impedance requirements are also different, a separate test board must be designed for each camera board, which increases cost and time. Utility Model Content

[0004] This application mainly provides a camera interface circuit, circuit board and testing device to solve the problem of lack of signal data and non-universality of camera board test board.

[0005] To solve the above technical problems, the present application adopts a technical solution: providing an interface circuit board, wherein a first connector mounting area, two first lead areas, and two interface areas are provided on the front side of the interface circuit board, the two interface areas and the two first lead areas are located on both sides of the first connector mounting area, and the first lead area is located between the sensor mounting area and the interface area, the sensor mounting area includes a plurality of first pins arranged in two columns, the interface area includes a plurality of interfaces corresponding to the first pins in each column, the first lead area includes a plurality of first leads arranged in columns, each first lead correspondingly connects the first pin and the interface, and the interface communicates with the front and back sides of the interface circuit board;

[0006] A second connector mounting area and two second lead areas are provided on the back of the interface circuit board. The two second lead areas are located on both sides of the second connector mounting area, and the second lead area is located between the second connector mounting area and the interface area. The second connector mounting area includes a plurality of second pins arranged in two columns, and the second lead area includes a plurality of second leads arranged in columns, each second lead correspondingly connecting the second pin and the interface.

[0007] Each of the first leads is provided with at least two first test points, each of the second leads is provided with at least two second test points, and each of the first leads is of equal length, and each of the second leads is of equal length.

[0008] In some embodiments, the first connector installation area is used to correspondingly install multiple types of first connectors, and each type of first connector is used to connect sensors of different models; the second connector installation area is used to correspondingly install multiple types of second connectors, and each type of second connector is used to connect serializers of different models.

[0009] In some embodiments, the front surface of the interface circuit board further includes a first grounding metal disposed on each of the first lead areas, wherein some of the plurality of first pins are configured as grounding pins, and the first test points on the corresponding first leads are electrically connected to the first grounding metal;

[0010] The back side of the interface circuit board also includes a second grounding metal arranged on each second lead area, wherein some of the second pins among the plurality of second pins are configured as grounding pins, and the corresponding second test points on the second leads are electrically connected to the second grounding metal.

[0011] In some embodiments, the front side of the interface circuit board further includes at least one first ground network interface area corresponding to the first ground metal, the first ground metal is electrically connected to the first ground network interface area, and the first ground network interface area is used to connect to the ground network on the sensor;

[0012] The back side of the interface circuit board further includes at least one second ground network interface area corresponding to the second ground metal, the second ground metal is electrically connected to the second ground network interface area, and the second ground network interface area is used to connect to the ground network on the serializer;

[0013] Wherein, the first network interface area is electrically connected to the second network interface area.

[0014] In some embodiments, the first ground network interface area includes a first leaky copper area, which is electrically connected to the first ground metal; the second ground network interface area includes a second leaky copper area, which is electrically connected to the second ground metal; the first leaky copper area and the second leaky copper area are electrically connected through a copper-plated through-hole.

[0015] In some embodiments, the interface area further includes a plurality of expansion interfaces, and the plurality of expansion interfaces are arranged in a column and side by side with the plurality of interfaces.

[0016] In some embodiments, the interface circuit board further includes a via hole penetrating the interface circuit board, the via hole being used for allowing a wire to pass through to connect the sensor and a high-current network on the serializer;

[0017] Alternatively, some of the multiple first leads are configured as first power lines, and the corresponding first test points on the first leads are short-circuited to the vias using wires, and some of the multiple second leads are configured as second power lines, and the corresponding second test points on the second leads are short-circuited to the vias using wires, so that the first power line and the second power line are electrically connected through the vias, and the impedance of the wire is less than the impedance of the first lead and the second lead.

[0018] In some embodiments, the impedance of each of the first leads is the same, and the impedance of each of the second leads is the same.

[0019] In order to solve the above technical problems, another technical solution adopted in the present application is: to provide an interface circuit board assembly, which includes the interface circuit board as mentioned above, a first connector and a second connector.

[0020] The present application also provides a camera testing device, which includes the interface circuit board assembly, camera sensor board and camera serializer board as described above.

[0021] The beneficial effects of the present application are as follows: Different from the prior art, the present application discloses an interface circuit board, a circuit board assembly, and a camera testing device. A first connector mounting area, two first lead areas, and two interface areas are provided on the front of the interface circuit board. The two interface areas and the two first lead areas are located on both sides of the first connector mounting area. The first leads of the first lead area connect the interfaces of the interface area to the corresponding first connector pins, leading out the functional pins of the camera module, ensuring that the signals of each pin can be tested. At the same time, a second connector mounting area and two first lead areas are provided on the back of the interface circuit board. The two second lead areas are located on both sides of the serializer mounting area, and the second lead area is located between the serializer mounting area and the interface area, leading out the serializer pin signals for testing. The serializer mounting area includes a plurality of second pins arranged in two columns. The second lead area includes a plurality of second leads arranged in columns. Each second lead is connected to a second pin and an interface, completing the connection between the serializer board and the sensor board, so that the interfaces of each interface area can test the signals of the camera board. Each first lead is provided with at least two first test points, and each second lead is provided with at least two second test points. In-board connection or signal testing can be performed at the test points. Reserving at least two test points can ensure that the signal of each pin can be detected by multiple signal detection circuits at the same time, thereby improving detection efficiency; and each first lead is of equal length, and each second lead is of equal length, thereby ensuring that the impedance on each lead is the same, which can avoid interference of the lead impedance on the signal test, and make the interface circuit board suitable for camera boards of different models. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:

[0023] Figure 1 This is a structural diagram of an embodiment of an interface circuit board provided by the present application;

[0024] Figure 2 Yes Figure 1 A structural diagram of an embodiment of an interface circuit board working circuit is shown;

[0025] Figure 3 This is a structural diagram of an embodiment of an interface circuit board assembly provided by the present application;

[0026] Figure 4 Yes Figure 1 A structural diagram of an embodiment of the first lead area and the second lead area of ​​the interface circuit board shown;

[0027] Figure 5 Yes Figure 1 The schematic structural diagram of an embodiment of the first interface area and the second interface area of ​​the interface circuit board shown;

[0028] Figure 6 Yes Figure 1 A schematic structural diagram of another embodiment of the interface circuit board shown;

[0029] Figure 7 It is a structural diagram of an embodiment of a camera testing device provided in this application. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0031] The terms "first", "second" and "third" in the embodiments of the present application are only used for descriptive purposes and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first", "second" and "third" may explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the listed steps or units, but may optionally also include steps or units that are not listed, or may optionally also include other steps or units inherent to these processes, methods, products or devices.

[0032] References to "embodiments" herein mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0033] See Figure 1 and Figure 2 , Figure 1 This is a schematic structural diagram of an embodiment of an interface circuit board 100 provided by the present application. Figure 2 Yes Figure 1The schematic diagram of the structure of an embodiment of the working circuit of the interface circuit board shown in the figure shows the circuit distribution on the front of the interface circuit board 100 on the right side and the circuit distribution on the back of the interface circuit board 100 on the left side. The front of the interface circuit board 100 is provided with a first connector mounting area 10, two first lead areas 20 and two interface areas 30. The two interface areas 30 and the two first lead areas 20 are both located on both sides of the first connector mounting area 10, and the first lead area 20 is located between the sensor mounting area 10 and the interface area 30. The sensor mounting area 10 includes two rows of The interface area 30 includes multiple first pins such as the first pin 1, the first pin 2, the first pin 3, the first pin 4, the first pin 5 or the first pin 6, etc., and the first lead area 20 includes multiple first leads arranged in a column such as the first pin 20-interface S20, the first pin 19-interface S19, etc., each first lead corresponds to a first pin and an interface, and the interface connects the front and back of the interface circuit board.

[0034] The back of the interface circuit board 100 is provided with a second connector mounting area 40 and two second lead areas 50. The two second lead areas 50 are located on both sides of the second connector mounting area 40, and the second lead area 50 is located between the second connector mounting area 40 and the interface area 30. The second connector mounting area 40 includes a plurality of second pins arranged in two rows, such as a second pin 23, a second pin 25, a second pin 27, a second pin 29, a second pin 31 or a second pin 32, etc. The second lead area includes a plurality of second leads arranged in a row, such as a second pin 2-interface S30, a second pin 4-interface S29 or a second pin 6-interface S28, etc., and each second lead is correspondingly connected to the second pin and the interface.

[0035] The first connector mounting area 10 and the second connector mounting area 20 are used to connect the installer to the circuit board. The first pin is a solderable pad provided on the circuit board. After the first connector is installed in the first connector mounting area, it ensures smooth signal transmission and current transfer. A stable connection. The pads serving as welding points should have good conductivity, low resistance and line impedance, while avoiding problems such as overheating or short circuits during current transmission. Optionally, the pin pads of the first connector mounting area 10 and the second connector mounting area 20 are made of copper or other conductive metals.

[0036] The first and second leads are disposed within the circuit board and are used to transmit current. The first and second leads respectively connect the first pin of the first connector mounting area 10 and the second pin of the second connector mounting area 20 to corresponding connectors. Optionally, the first and second leads are made of copper or other conductive metal.

[0037] For example, the first pin 30 is connected to the corresponding interface S30 through a first lead, and then S30 is connected to the corresponding second pin 2 through a second lead through the back of the circuit board.

[0038] For another example, the first pin 5 is connected to the corresponding interface S5 through a first lead, and then S5 passes through the back of the circuit board and is connected to the corresponding second pin 9 through a second lead.

[0039] Each first lead has at least two first test points such as T1 and T1', T4 and T4' or T5 and T5', and each second lead has at least two second test points. The first leads are of equal length, and the second leads are of equal length.

[0040] The first leads are made of the same material and are of equal length, which is beneficial for rationally arranging the interfaces and lead positions, so that the first pins, first leads and interfaces can be arranged in corresponding columns, saving circuit board layout space.

[0041] Furthermore, the impedances of the first leads are the same, and the impedances of the second leads are the same.

[0042] Since the first leads are made of the same material and are of equal length, and the second leads are of equal length, the impedances of the first leads and the second leads are made the same by adjusting the characteristic impedances of the first leads and the second leads.

[0043] When the impedances of each first lead and each second lead are respectively the same, the interface circuit board 100 can adapt to different types of camera boards or interfaces, avoiding the lead impedance interfering with signal acquisition, thereby increasing the scope of application of the interface circuit board 100. The interface circuit board 100 can be applied to various types of camera boards without the need for separate wiring and opening of boards, which is conducive to reducing production costs.

[0044] The interface circuit board 100 provided in this application is used between the double-layer boards of the camera, and is connected to the front and rear boards respectively during testing.

[0045] Specifically, see Figure 3 The first connector installation area 10 is used to install multiple types of first connectors 200, and each type of first connector 200 is used to connect sensors of different models; the second connector installation area 40 is used to install multiple types of second connectors 300, and each type of second connector 300 is used to connect serializers of different models.

[0046] A first connector 200 is soldered to the first pin pad of the first connector mounting area 10. The first connector 200 is connected to the upper sensor of the camera board. A second connector 300 is soldered to the first pin pad of the second connector mounting area 40. The second connector 300 is connected to the lower serializer of the camera board.

[0047] When the interface circuit board 100 is connected to the corresponding model of camera board sensor and serializer at the same time, the interface shape of the first connector 200 is consistent with the interface shape of the upper sensor and is the same as the shape of the lower serializer interface; the interface shape of the second connector 300 is consistent with the interface shape of the lower serializer and is the same as the shape of the upper sensor interface, that is, the interface shapes of the first connector 200 and the second connector 300 can be consistent.

[0048] Optionally, the first connector mounting area 10 on the front surface of the interface circuit board 100 is aligned with the center of the second connector mounting area 40 on the back surface.

[0049] By aligning the first connector mounting area 10 and the second connector mounting area 40 , it is ensured that the first leads and the second leads have the same length and the same impedance, so that different models of camera boards can be adapted.

[0050] Optionally, the front of the interface circuit board 100 also includes a first grounding metal D1 arranged on each first lead area 20, wherein some of the multiple first pins are configured as grounding pins, and the first test point on the corresponding first lead is electrically connected to the first grounding metal D1.

[0051] The back side of the interface circuit board 100 also includes a second grounding metal D2 arranged on each second lead area 50, wherein some of the plurality of second pins are configured as grounding pins, and the second test points on the corresponding second leads are electrically connected to the second grounding metal D2.

[0052] For example, if pin 1, pin 4, and pin 5 are defined as ground pins, the first lead test points T1 and T1', T4 and T4', and T5 and T5' corresponding to pin 1, pin 4, and pin 5 are all connected to the first ground metal D1. The connection method is wire connection or solder connection.

[0053] When the interface circuit board 100 matches a camera board with different pin definitions, it is only necessary to connect the corresponding ground pin to the first ground metal D1 or the second ground metal D2 to modify the ground network connection and complete the pin grounding. There is no need to connect the lines separately or redesign the circuit board, which helps save design time and design costs.

[0054] Optionally, the first grounding metal D1 and the second grounding metal D2 are copper foils.

[0055] By electrically connecting the test point on the lead corresponding to the ground pin to the ground metal, the ground impedance of the ground pin and the impedance of the related signal loop can be made low, which is conducive to accurate signal test results.

[0056] Optionally, the front of the interface circuit board 100 further includes at least one first ground network interface area L1 corresponding to the first ground metal D1. The first ground metal D1 is electrically connected to the first ground network interface area L1. The first ground network interface area L1 is used to connect to the ground network on the sensor.

[0057] The first ground network interface area L1 is disposed on the front surface of the interface circuit board 100 , corresponding to the first ground metal D1 . Each first ground metal D1 is connected to at least one first ground network interface area L1 when connected to the ground network.

[0058] Optionally, the first ground network interface region L1 is located near the first ground metal D1, specifically above or below the first ground metal D1, and is close to the first ground metal D1. The first ground metal D1 can be connected to the first ground network interface region L1 via solder or wires to form a large-area ground network, ensuring low impedance for the ground network and the signal loop.

[0059] Specifically, the first ground network interface region L1 includes a first copper leakage region C1 , and the first copper leakage region C1 is electrically connected to the first ground metal D1 .

[0060] The first ground network interface area L1 is provided with a first copper-leaking area C1, which is covered with copper metal. This first copper-leaking area C1 covers at least some of the through-holes in the first ground network interface area L1 and is electrically connected to the second ground network interface area L2 on the back side via copper-plated through-holes. When connected to the ground network, the first copper-leaking area C1 is connected to the first grounding metal D1 via wire or solder, forming a large-area connected ground network.

[0061] The back of the interface circuit board 100 further includes at least one second ground network interface area L2 corresponding to the second ground metal D2. The second ground metal D2 is electrically connected to the second ground network interface area L2. The second ground network interface L2 area is used to connect to the ground network on the serializer.

[0062] Optionally, the second ground network interface region L2 is located near the second ground metal D2, specifically above or below the second ground metal D2, and in close proximity to the second ground metal D2. The second ground metal D2 can be connected to the second ground network interface region L2 via solder or wires, forming a large-area ground network to ensure low impedance for the ground network and the signal loop.

[0063] Specifically, the second ground network interface region L2 includes a second copper leakage region C2 , and the second copper leakage region C2 is electrically connected to the second ground metal D2 .

[0064] The second ground network interface area L2 is provided with a second copper-leaking area C2 with exposed copper on the surface. When connected to the ground network, the second copper-leaking area C2 is connected to the second grounding metal D2 through a wire or solder to form a large-area connected ground network.

[0065] The first ground network interface area L1 and the second ground network interface area L2 are electrically connected.

[0066] The first ground network interface area L1 on the front is connected to the second ground network interface area L2 on the back through copper-plated vias. When accessing the ground network, the first ground network interface area L1 and the second ground network interface area L2 are electrically connected through the vias, forming the ground network grounding area of ​​the interface circuit board 100.

[0067] Specifically, the first copper leakage area C1 and the second copper leakage area C2 are electrically connected via a copper-plated through-hole.

[0068] The second ground network interface area L2 is provided with a second copper-leaking area C2, which is covered with copper metal. This second copper-leaking area C2 covers at least some of the through-holes in the second ground network interface area L2 and is electrically connected to the second ground network interface area L2 and the second copper-leaking area C2 on the back side via copper-plated through-holes. When connected to the ground network, the second copper-leaking area C2 is connected to the second ground metal D2 via wire or solder, forming a large-area connected ground network.

[0069] Optionally, see Figure 5 The interface area 30 also includes a plurality of expansion interfaces T, and the plurality of expansion interfaces T are arranged in a row and side by side with the plurality of interfaces.

[0070] The expansion interfaces T are arranged in a row on one side of the interface connected to the first lead or the second lead. When the number of interfaces cannot meet the test requirements, new available interface positions can be provided for testing by connecting the interface and the expansion interface T.

[0071] The expansion interface T is the same as the interface, and the pads on the front and back of the interface circuit board 100 are connected through the copper plating in the hole to achieve conductivity between the front and back of the board.

[0072] Optionally, see Figure 6 The interface circuit board 100 further includes conductive vias such as P1, P2, P3, and P4 that penetrate the interface circuit board 100. The conductive vias are used for allowing wires to pass through to connect the sensor and the high-current network on the serializer.

[0073] The conductive holes can be set at the edge of the interface circuit board 100 to facilitate the connection of wires between the camera front and rear boards, between the camera board and the interface circuit board 100, or within the interface circuit board 100.

[0074] The diameter of the via should be large enough to accommodate at least one thick wire passing through.

[0075] Alternatively, some of the multiple first leads are configured as first power lines, and the first test points on the corresponding first leads are short-circuited to the vias using wires, and some of the multiple second leads are configured as second power lines, and the second test points on the corresponding second leads are short-circuited to the vias using wires, so that the first power line and the second power line are electrically connected through the vias, and the impedance of the wires is less than the impedance of the first lead and the second lead.

[0076] The surface of the via hole has a copper pad, and the inside of the hole is copper-plated. The via hole can connect the front and back sides of the interface circuit board 100 through the copper-plated inside the hole.

[0077] The first lead corresponding to the first pin defined as the power pin is used as the first power line, and the test point on the first power line is short-circuited to the through hole through a thick wire, thereby shortening the power line path, reducing impedance, and effectively allowing large current to flow.

[0078] The second lead corresponding to the second pin defined as the power pin is used as the second power line, and the test point on the second power line is short-circuited to the through hole through a thick wire, thereby shortening the power line path, reducing impedance, and effectively allowing large current to flow.

[0079] To ensure that the wire lead-out path can short-circuit the conductive path originally formed by the first lead, the interface, and the second lead, the impedance of the wire should be smaller than the impedance of the first lead and the second lead.

[0080] Optionally, the wire is a low-impedance thick wire.

[0081] See Figure 3 The present application also provides an interface circuit board assembly Z1, which includes the interface circuit board 100, the first connector 200 and the second connector 300 as described above.

[0082] The first connector 200 and the second connector 300 are respectively soldered to the first connector mounting area 10 and the second connector mounting area 40 of the interface circuit board 100. The first connector 200 and the second connector 300 are aligned in center.

[0083] See Figure 7 The present application also provides a camera testing device K1, which includes the interface circuit board assembly Z1, the camera sensor board Z2 and the camera serializer board Z3 as described above.

[0084] The interface circuit board assembly Z1 is installed between the camera sensor board Z2 and the camera serializer board Z3, with the front side connected to the camera sensor board Z2 and the back side connected to the camera serializer board Z3.

[0085] Different from the prior art, the present application provides an interface circuit board, a circuit board assembly and a camera test device. The pin signal corresponding to the first connector installation area 10 is led out to the interface through the first lead, and a test point is set for testing, grounding or connecting to the power supply. The impedance of each first lead is the same, which is suitable for various camera boards. The pin signal corresponding to the second connector installation area 40 is led out to the interface through the second lead, and a test point is set for testing, grounding or connecting to the power supply. The impedance of each second lead is the same, which is suitable for various camera boards with different signal definitions. A large area of ​​first grounding metal D1 and second grounding metal D2 are set on the interface circuit board 100 to connect to the ground network, forming a large area of ​​grounding, ensuring low impedance of the ground network and low impedance of the signal loop; at the same time, for camera boards with different pin definitions, it is only necessary to change the test point connected to the ground metal to modify the ground network connection, avoiding redesigning the circuit board, which is conducive to reducing production costs.

[0086] The various embodiments in this specification are described in a progressive manner. Similar portions between the various embodiments can be referenced to each other. Each embodiment focuses on the differences between the other embodiments. In particular, the storage medium embodiment and the computer device embodiment are generally similar to the method embodiment, so their descriptions are relatively simple. For relevant portions, refer to the descriptions of the method embodiment.

[0087] The present application can be used in a variety of general-purpose or special-purpose computing system environments or configurations, such as personal computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, network PCs, minicomputers, and distributed computing environments that include any of the above systems or devices.

[0088] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative, and multiple units or components can be combined or integrated into another system, or some features can be omitted or not implemented.

[0089] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of this embodiment.

[0090] In addition, each functional unit in each embodiment of the present application may be integrated into a processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit. The above-mentioned integrated units may be implemented in the form of hardware or software functional units.

[0091] The above description is merely an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. An interface circuit board, characterized in that: The front side of the interface circuit board is provided with a first connector mounting area, two first lead areas, and two interface areas. The two interface areas and the two first lead areas are located on both sides of the first connector mounting area, and the first lead area is located between the sensor mounting area and the interface area. The sensor mounting area includes a plurality of first pins arranged in two columns. The interface area includes a plurality of interfaces corresponding to the first pins in each column. The first lead area includes a plurality of first leads arranged in columns. Each first lead is connected to the first pin and the interface, and the interface communicates with the front and back sides of the interface circuit board. A second connector mounting area and two second lead areas are provided on the back of the interface circuit board. The two second lead areas are located on both sides of the second connector mounting area, and the second lead area is located between the second connector mounting area and the interface area. The second connector mounting area includes a plurality of second pins arranged in two columns, and the second lead area includes a plurality of second leads arranged in columns, each second lead correspondingly connecting the second pin and the interface. Each of the first leads is provided with at least two first test points, each of the second leads is provided with at least two second test points, and each of the first leads is of equal length, and each of the second leads is of equal length.

2. The interface circuit board according to claim 1, wherein: The first connector installation area is used to install multiple types of first connectors, and each type of first connector is used to connect sensors of different models; the second connector installation area is used to install multiple types of second connectors, and each type of second connector is used to connect serializers of different models.

3. The interface circuit board according to claim 1, wherein: The front surface of the interface circuit board further includes a first grounding metal disposed on each of the first lead areas, wherein some of the plurality of first pins are configured as grounding pins, and the first test points on the corresponding first leads are electrically connected to the first grounding metal; The back side of the interface circuit board also includes a second grounding metal arranged on each second lead area, wherein some of the second pins among the plurality of second pins are configured as grounding pins, and the corresponding second test points on the second leads are electrically connected to the second grounding metal.

4. The interface circuit board according to claim 3, wherein: The front side of the interface circuit board further includes at least one first ground network interface area corresponding to the first ground metal, the first ground metal is electrically connected to the first ground network interface area, and the first ground network interface area is used to connect to the ground network on the sensor; The back side of the interface circuit board further includes at least one second ground network interface area corresponding to the second ground metal, the second ground metal is electrically connected to the second ground network interface area, and the second ground network interface area is used to connect to the ground network on the serializer; Wherein, the first network interface area is electrically connected to the second network interface area.

5. The interface circuit board according to claim 4, characterized in that: The first ground network interface area includes a first leaky copper area, which is electrically connected to the first grounding metal; the second ground network interface area includes a second leaky copper area, which is electrically connected to the second grounding metal; the first leaky copper area and the second leaky copper area are electrically connected through a copper-plated through-hole.

6. The interface circuit board according to claim 1, wherein: The interface area further includes a plurality of expansion interfaces, and the plurality of expansion interfaces are arranged in a row and side by side with the plurality of interfaces.

7. The interface circuit board according to any one of claims 1 to 6, characterized in that: The interface circuit board further includes a conductive hole penetrating the interface circuit board, wherein the conductive hole is used for a wire to pass through so as to connect the sensor and the high current network on the serializer; Alternatively, some of the multiple first leads are configured as first power lines, and the corresponding first test points on the first leads are short-circuited to the vias using wires, and some of the multiple second leads are configured as second power lines, and the corresponding second test points on the second leads are short-circuited to the vias using wires, so that the first power line and the second power line are electrically connected through the vias, and the impedance of the wire is less than the impedance of the first lead and the second lead.

8. The interface circuit board according to claim 7, wherein: The impedances of the first leads are the same, and the impedances of the second leads are the same.

9. An interface circuit board assembly, characterized in that: The interface circuit board assembly includes the interface circuit board according to any one of claims 1 to 8, a first connector and a second connector.

10. A camera testing device, characterized in that: The camera testing device includes the interface circuit board assembly as claimed in claim 9, a camera sensor board and a camera serializer board.

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