Superconducting quantum chip packaging body

Abstract

The utility model discloses a superconductive quantum chip packaging body. The cover, the inflatable baffle plate, the radio frequency connector socket and the printed circuit board are made of superconducting materials; the side shielding plate is made of superconducting materials; the bottom plate is made of a high-thermal-conductivity material and a plating layer in a combined manner; the base plate, the valve core, the valve core cover, the lead and the upper sealing ring are made of a high-thermal-conductivity material and a plating layer in a combined manner; the bottom shielding plate, the upper layer welding seam, the lower layer welding seam, the upper layer indium wire ring and the lower layer indium wire ring are made of superconducting materials. According to the superconducting quantum chip packaging body provided by the embodiment of the invention, the superconducting quantum chip is ensured to maintain low-temperature stable and efficient electromagnetic shielding in a test environment, and good isolation to an external environment is ensured.

Description

Technical Field

[0001] The present application relates to, but is not limited to, the field of quantum computing technology, and in particular to a superconducting quantum chip package. Background Art

[0002] Currently, the most common packaging method for superconducting quantum chips is to mount the chip within a cavity made of aluminum or other materials using low-temperature thermally conductive adhesive. The chip's pads are typically connected via wire bonding to a printed circuit board inside the cavity or to transmission lines extending into the cavity. However, regardless of whether the cavity is open to the outside air, the chip is exposed to the atmospheric pressure within the cavity for extended periods, making it susceptible to corrosion from impurities such as water vapor in the air.

[0003] Furthermore, while a base made of aluminum or other superconducting materials can shield external electromagnetic noise at extremely low temperatures using the Meissner effect, its thermal conductivity decreases significantly as the temperature drops. This reduced thermal conductivity affects the chip's heat dissipation efficiency, causing it to take longer to cool to operating temperature or shortening the decoherence time of the qubit due to inability to dissipate heat in a timely manner. This creates a technical dilemma between thermal conductivity and electromagnetic shielding.

[0004] An alternative approach is to use a non-superconducting material with high thermal conductivity, such as oxygen-free copper, as the chip base. This can effectively improve heat dissipation efficiency, help the chip cool to operating temperature more quickly, and prolong the stability time of the qubit. However, since oxygen-free copper cannot shield electromagnetic noise like superconducting materials, it will encounter greater challenges in terms of electromagnetic shielding. Utility Model Content

[0005] The present application provides a superconducting quantum chip package that can not only shield the superconducting quantum chip from electromagnetic noise while ensuring rapid heat conduction of the chip, but also prevent interference from the external environment on chip testing.

[0006] The embodiment of the utility model provides a superconducting quantum chip package, comprising: a cover (1) made of superconducting material, an air-filled baffle (2) made of superconducting material, a radio frequency connector socket (3), a printed circuit board (4), a side shielding plate (5) made of superconducting material, a bottom plate (6) made of a combination of high thermal conductivity material and a coating, a chassis (7) made of a combination of high thermal conductivity material and a coating, a valve core (8), a valve core cover (9), a lead (11), an upper sealing ring (12), a lower sealing ring (13), a bottom shielding plate (14) made of superconducting material, an upper welding seam (15), a lower welding seam (16), an upper indium wire ring (17), and a lower indium wire ring (18); wherein,

[0007] A vent hole is provided on the inner side of the cover (1) covering the superconducting quantum chip (10) for connecting the threaded hole on the outer side of the cover (1) with the interior of the cover (1);

[0008] An air-filled baffle (2) connected to the cover (1) is located directly above the superconducting quantum chip (10) and vertically blocks the vent hole of the cover (1);

[0009] The chassis 7 is adhered to the bottom of the superconducting quantum chip (10) through low-temperature thermal conductive glue;

[0010] A radio frequency connector socket (3) electrically connected to a printed circuit board (4) and used for inserting a radio frequency cable;

[0011] The printed circuit board (4) is bonded to the chassis (7) using a low-temperature heat-conducting adhesive and is welded to an upper sealing ring (12) and a lower sealing ring (13) at an upper welding seam (15) and a lower welding seam (16), respectively; the upper sealing ring (12) and the lower sealing ring (13) are respectively arranged above and below the printed circuit board (4), and provide sealing through plastically deformed upper indium wire rings (17) and lower indium wire rings (18);

[0012] The lead (11) is connected to the printed circuit board (4) and the pad of the superconducting quantum chip (10) by ultrasonic bonding, so as to realize the electrical connection between the printed circuit board (4) and the superconducting quantum chip (10);

[0013] A side shielding plate (5) is mounted on each side of the radio frequency connector socket (3), the side shielding plate (5) being connected to the chassis (7) and partially inserted into the interior of the chassis (7);

[0014] The bottom shielding plate (14) is attached to the bottom of the chassis (7) through low-temperature heat-conducting adhesive;

[0015] The bottom plate (6) is tightly attached to the bottom shielding plate (14) via low-temperature heat-conducting adhesive;

[0016] The valve core (8) is connected to the cover (1) through a threaded hole on the outside of the cover (1), and helium is filled into the superconducting quantum chip package or vacuum is drawn through the valve core (8); the valve core cover (9) is connected to the valve core (8) through a thread.

[0017] In an exemplary embodiment, a protruding platform is further provided on the chassis (7) for supporting the peripheral portion of the superconducting quantum chip (10), and the central portion of the chassis (7) surrounded by the protruding platform is hollowed out.

[0018] In an exemplary embodiment, vacuum sealing grease is applied to the threaded fitting of the valve core (8) and the threaded hole on the outer side of the cover (1); and / or,

[0019] Vacuum sealing grease is applied to the threaded engagement portion between the valve core cover (9) and the valve core (8).

[0020] In an exemplary embodiment, the radio frequency connector socket (3) is welded to the printed circuit board (4) at the periphery of the cover (1), or is fastened together with the printed circuit board (4) above the chassis (7) by screws penetrating the printed circuit board (4).

[0021] In an exemplary embodiment, the chassis (7) is further provided with slots or circular holes around its edges; the chassis (7) is assembled on a cold plate of a dilution refrigerator or a heat sink connected to the cold plate by screws or bolts using the slots or circular holes.

[0022] In an exemplary embodiment, the outer side of the cover (1) is further provided with a blind screw hole for connecting a protective cover, a thermometer resistor or other components.

[0023] In an exemplary embodiment, the inner surface of the cover (1) surrounding the superconducting quantum chip (10) is a slope.

[0024] In an exemplary embodiment, a groove array is further provided on the side of the air-filled baffle (2) facing the superconducting quantum chip (10) for applying and storing absorbing material and absorbing stray electromagnetic waves.

[0025] In an exemplary embodiment, a guide groove is further provided on the side of the inflation baffle (2) facing the cover (1) for guiding the air flow in and out of the vent hole of the cover (1).

[0026] In an exemplary embodiment, the upper sealing ring (12) and the lower sealing ring (13) are embedded in the through holes of the printed circuit board (4) via their protruding parts to achieve positioning.

[0027] The superconducting quantum chip package provided in the embodiment of the present application is connected to the vent hole of the lid through a valve core and is further supplemented by multiple sealing components (such as indium wire sealing rings, sealing rings, and vacuum sealing grease). Under the premise of ensuring the rapid conduction of heat from the superconducting quantum chip, in addition to shielding the superconducting quantum chip from electromagnetic noise, it also provides a vacuum environment or helium atmosphere for the superconducting quantum chip, which is conducive to avoiding interference from the external environment on the superconducting quantum chip testing and long-term storage of the chip. The superconducting quantum chip package provided in the embodiment of the present application ensures that the superconducting quantum chip maintains low temperature stability, efficient electromagnetic shielding, and good isolation from the external environment in the test environment.

[0028] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or understood by practicing the present invention. The objectives and other advantages of the present invention can be achieved and obtained through the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings are used to provide a further understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0030] FIG1( a ) is a front view of a superconducting quantum chip package according to an embodiment of the present application;

[0031] FIG1( b ) is a top view of a superconducting quantum chip package according to an embodiment of the present application;

[0032] FIG2( a ) is a partially enlarged view of the AA cross-sectional view of the superconducting quantum chip package according to an embodiment of the present application;

[0033] FIG2( b ) is an AA cross-sectional view of a superconducting quantum chip package according to an embodiment of the present application;

[0034] Figure 3 This is an axonometric view of the superconducting quantum chip package shown in FIG1 in an embodiment of the present application. DETAILED DESCRIPTION

[0035] To make the purpose, technical solutions and advantages of this application more clear, the embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be noted that, unless there is a conflict, the embodiments and features in the embodiments of this application can be combined with each other in any way.

[0036] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings provide embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0037] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0038] It is understood that the terms "first" and "second" used in this application are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of such features. In the description of this application, "plurality" means at least two, for example, two, three, etc., unless otherwise specifically defined.

[0039] It can be understood that the “connection” in the following embodiments should be understood as “electrical connection”, “communication connection”, etc. if there is transmission of electrical signals or data between the connected circuits, modules, units, etc.

[0040] As used herein, the singular forms "a," "an," and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include," "comprising," "having," and the like specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Furthermore, the term "and / or" as used in this specification includes any and all combinations of the relevant listed items.

[0041] If only oxygen-free copper and other materials with thermal conductivity that are non-superconducting and non-magnetic are used as the chip base, although the heat dissipation efficiency can be improved, since oxygen-free copper is a non-superconducting and non-magnetic material, it cannot provide effective electromagnetic shielding like superconducting materials such as aluminum. This means that the chip may be interfered with by external electromagnetic noise, which will face greater challenges in electromagnetic shielding on the back of the chip. To this end, the embodiment of the present application provides a superconducting quantum chip package that can, while ensuring the rapid conduction of chip heat, not only shield the superconducting quantum chip from electromagnetic noise, but also provide it with a vacuum environment or helium atmosphere, which is beneficial for avoiding interference from the external environment on chip testing and long-term storage of the chip.

[0042] 1(a), 1(b), 2(a) and 2(b), the superconducting quantum chip package provided in the embodiment of the present application includes: a cover 1, an inflatable baffle 2, an RF connector socket 3, a printed circuit board 4, a side shielding plate 5, a bottom plate 6, a chassis 7, a valve core 8, a valve core cover 9, a lead 11, an upper sealing ring 12, a lower sealing ring 13, a bottom shielding plate 14, an upper weld 15, a lower weld 16, an upper indium wire ring 17, and a lower indium wire ring 18; wherein,

[0043] The cover 1 is made of superconducting material such as aluminum and covers the superconducting quantum chip 10 . A vent is provided on the inner side of the cover 1 for connecting the threaded hole on the outer side of the cover 1 with the inner side of the cover 1 .

[0044] The inflatable baffle 2 is made of superconducting material such as aluminum and is connected to the cover 1. The inflatable baffle 2 is located directly above the superconducting quantum chip 10 and vertically blocks the vent hole of the cover 1. In one embodiment, the inflatable baffle 2 is connected to the cover 1 with screws.

[0045] Chassis 7 is manufactured using a combination of high-thermal conductivity materials and coatings, such as oxygen-free copper with a gold-plated surface. It is then attached to the underside of the superconducting quantum chip 10 using low-temperature thermal adhesive. This high-thermal conductivity material and coating combination not only provides excellent thermal conductivity, rapidly conducting heat generated by the superconducting quantum chip 10, but also provides a certain degree of electromagnetic shielding. The low-temperature thermal adhesive bonding between chassis 7 and superconducting quantum chip 10 ensures rapid heat transfer from the superconducting quantum chip 10 to chassis 7, and then to the cold plate of the dilution refrigerator, thereby maintaining the stability of the superconducting quantum chip 10 in low-temperature environments.

[0046] In one embodiment, a raised platform, i.e., a central step, is provided on the chassis 7 for supporting the outer portion of the superconducting quantum chip 10. The central portion of the chassis 7 surrounded by the step is hollowed out, i.e., the central region of the chassis 7 does not contact the superconducting quantum chip 10, thereby leaving the core portion of the superconducting quantum chip 10 suspended in the air. This reduces the thermal impact of the chassis 7 on the core region of the superconducting quantum chip 10 and also reduces mechanical contact with the outside world, thereby reducing the impact of physical factors such as vibration and interference on the quantum state, thereby helping to improve the stability and performance of the superconducting quantum chip 10.

[0047] The RF connector socket 3 is used to insert a plurality of RF cables and is electrically connected to the printed circuit board 4. In one embodiment, the RF connector socket 3 can be welded to the printed circuit board 4 on the periphery of the cover 1, or fastened to the chassis 7 together with the printed circuit board 4 by screws penetrating the printed circuit board 4.

[0048] The printed circuit board 4 is bonded to the chassis 7 using low-temperature thermally conductive adhesive and welded to the upper sealing ring 12 and lower sealing ring 13 at upper weld seams 15 and lower weld seams 16, respectively, to form a complete package. The upper sealing ring 12 and lower sealing ring 13 are positioned above and below the printed circuit board 4, respectively, and provide sealing via the plastically deformed upper and lower indium wire rings 17 and 18, respectively.

[0049] In one embodiment, the upper sealing ring 12 is made of a high thermal conductivity material such as oxygen-free copper and then gold-plated on the surface, and is welded above the printed circuit board 4. Together with the cover 1, the upper indium wire ring 17 is squeezed to plastic deformation.

[0050] In one embodiment, the lower sealing ring 13 is made of a high thermal conductivity material such as oxygen-free copper and then gold-plated on the surface, and is welded under the printed circuit board 4. Together with the chassis 7, the lower indium wire sealing ring 18 is squeezed to plastic deformation.

[0051] The lead 11 is connected to the pads of the printed circuit board 4 and the superconducting quantum chip 10 by ultrasonic bonding, thereby achieving electrical connection between the printed circuit board 4 and the superconducting quantum chip 10;

[0052] The side shielding plate 5 is made of a superconducting material such as aluminum and is installed on each side of the RF connector socket 3. The side shielding plate 5 is connected to the chassis 7, and the lower half of the side shielding plate 5 is inserted into the chassis 7. In one embodiment, the side shielding plate 5 is connected to the chassis 7 with screws.

[0053] The bottom shielding plate 14 is made of a superconducting material such as aluminum and is attached to the bottom of the chassis 7 via a low-temperature thermal conductive adhesive.

[0054] In the embodiment of the present application, the side shield plates 5 and bottom shield plate 14 are both made of superconducting materials, such as pure aluminum. They are located on the sides and bottom of the superconducting quantum chip package provided by the embodiment of the present application and fastened to the chassis 7 by screws, forming a physical protection and electromagnetic shielding layer for the superconducting quantum chip 10. In particular, the side shield plates 5 can shield external lateral electromagnetic interference, while the bottom shield plate 14 effectively prevents electromagnetic noise from below from interfering with the chip.

[0055] The bottom plate 6 is made of a combination of high thermal conductivity materials and coatings, such as oxygen-free copper with a gold-plated surface, and is tightly attached to the bottom of the bottom shielding plate 14 through low-temperature thermal conductive adhesive. In one embodiment, the bottom shielding plate 14 and the bottom plate 6 can be fastened together under the chassis 7 by screws passing through the bottom shielding plate 14.

[0056] Valve core 8 is connected to lid 1 through a threaded hole on the outside of lid 1. Helium is inflated into the superconducting quantum chip package or a vacuum is drawn through valve core 8. In one embodiment, the threaded mating area between valve core 8 and the threaded hole on the outside of lid 1 is coated with vacuum sealing grease to ensure airtightness. In one embodiment, valve core 8 can be a valve core for a bicycle or automobile tire.

[0057] The valve core cover 9 is connected to the valve core 8 by a thread. In one embodiment, the threaded joints between the valve core cover 9 and the valve core 8 are coated with vacuum sealing grease to ensure air tightness.

[0058] The superconducting quantum chip package provided in the embodiments of the present application maintains a controllable environment around the quantum chip through the mutual cooperation of its components, including helium filling for low-temperature superconducting applications, electromagnetic shielding, and precise docking and connection for radio frequency and other electronic signals.

[0059] In an exemplary embodiment, the valve core 8 and the valve core cover 9 are key components for filling with helium or evacuating a vacuum.

[0060] The valve core 8 is similar to a common bicycle or automobile tire valve and is connected to the cap 1 via threads. The threads are coated with vacuum sealing grease to ensure airtightness. This structure allows helium to be injected into the superconducting quantum chip package provided in the embodiments of the present application while preventing helium leakage. The valve core cap 9 is also threaded and coated with vacuum sealing grease, further enhancing airtightness.

[0061] The lid 1 is internally provided with a vent hole that connects the external valve core 8 channel to the interior of the superconducting quantum chip package provided by the present embodiment. This vent hole allows helium to be introduced into the superconducting quantum chip package provided by the present embodiment during helium inflation. After inflation, the valve core cover seals the channel to prevent helium leakage. This ensures that helium can be safely injected and maintained within the superconducting quantum chip package provided by the present embodiment, thereby meeting the requirements of the superconducting quantum chip in low-temperature environments.

[0062] The inflation baffle 2 is installed above the vent hole inside the cover 1, vertically blocking the air outlet of the vent hole. In this way, the space between the inflation hole and the superconducting quantum chip 10 can be effectively isolated to prevent helium from directly impacting the superconducting quantum chip 10, while ensuring the airtightness of the vent hole in a closed state.

[0063] Upper sealing ring 12 and lower sealing ring 13 are respectively disposed above and below printed circuit board 4, and provide a seal through plastically deformed indium wires, such as upper indium wire ring 17 and lower indium wire ring 18 in the figure. These sealing rings ensure that helium is completely enclosed within the superconducting quantum chip package provided in the embodiments of the present application, preventing leakage to the outside.

[0064] Vacuum sealing grease is applied to the threads of the valve core 8 and the valve core cover 9 to further enhance the airtightness and prevent helium from leaking through the thread gap.

[0065] In an exemplary embodiment, the superconducting quantum chip package provided by the embodiment of the present application can be evacuated without filling with helium to reduce the impact of the internal gas on the performance of the superconducting quantum chip.

[0066] The superconducting quantum chip package provided in the embodiment of the present application is connected to the vent hole of the lid 1 via a valve core 8 and is further supplemented by multiple sealing components (such as an indium wire sealing ring, a sealing ring, and a vacuum sealing grease). Under the premise of ensuring the rapid conduction of heat from the superconducting quantum chip, in addition to shielding the superconducting quantum chip from electromagnetic noise, it also provides a vacuum environment or helium atmosphere for the superconducting quantum chip, which is beneficial for avoiding interference from the external environment on the superconducting quantum chip testing and long-term storage of the chip. The superconducting quantum chip package provided in the embodiment of the present application ensures that the superconducting quantum chip maintains low temperature stability, efficient electromagnetic shielding, and good isolation from the external environment in the test environment.

[0067] In an exemplary embodiment, the chassis 7 is further provided with slots or round holes around its edges, which can be used to assemble the chassis 7 on the cold plate of the dilution refrigerator or the heat sink connected to the cold plate using screws or bolts.

[0068] In an exemplary embodiment, blind screw holes are further provided on the outside of the cover 1 for connecting a protective cover, a thermometer resistor or other components. The protective cover can further prevent the external environment from contaminating or damaging the superconducting quantum chip.

[0069] In one exemplary embodiment, the inner surface of the cover 1 surrounding the superconducting quantum chip 10 is designed with a bevel. The bevel changes the reflection path, directing the reflected electromagnetic waves to the absorbing material area or reducing their interference intensity, thereby optimizing the electromagnetic environment inside the superconducting quantum chip and further enhancing the signal stability and operational reliability of the superconducting quantum chip.

[0070] In an exemplary embodiment, a groove array is further provided on the side of the inflatable baffle 2 facing the superconducting quantum chip 10 for applying and storing absorbing material and absorbing stray electromagnetic waves, thereby better reducing the impact of electromagnetic interference on the superconducting quantum chip.

[0071] In an exemplary embodiment, a guide groove is further provided on the side of the inflatable baffle 2 facing the cover 1 to guide the airflow in and out of the vent hole of the cover 1, so that the gas flow is smoother and the direct airflow impact on the superconducting quantum chip 10 is reduced, thereby better controlling the gas environment inside the superconducting quantum chip package provided by the embodiment of the present application.

[0072] In one exemplary embodiment, the upper sealing ring 12 and the lower sealing ring 13 can be positioned by inserting their raised portions into the through-holes of the printed circuit board 4. This can better ensure the accurate positioning of the sealing rings, prevent the sealing rings from shifting during installation, ensure airtightness and packaging stability, and thus increase the stability of the overall structure and the sealing effect.

[0073] Although the embodiments disclosed in this application are as described above, the contents described are merely embodiments adopted to facilitate understanding of this application and are not intended to limit this application. Any person skilled in the art to which this application belongs may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed in this application. However, the scope of patent protection of this application shall still be based on the scope defined by the attached claims.

Claims

1. A superconducting quantum chip package, characterized in that: include: A cover (1) made of superconducting material, an air-filled baffle (2) made of superconducting material, a radio frequency connector socket (3), a printed circuit board (4), a side shielding plate (5) made of superconducting material, a bottom plate (6) made of a combination of a high thermal conductivity material and a coating, a chassis (7) made of a combination of a high thermal conductivity material and a coating, a valve core (8), a valve core cover (9), a lead (11), an upper sealing ring (12), a lower sealing ring (13), a bottom shielding plate (14) made of superconducting material, an upper welding seam (15), a lower welding seam (16), an upper indium wire ring (17), and a lower indium wire ring (18); wherein, A vent hole is provided on the inner side of the cover (1) covering the superconducting quantum chip (10) for connecting the threaded hole on the outer side of the cover (1) with the interior of the cover (1); An air-filled baffle (2) connected to the cover (1) is located directly above the superconducting quantum chip (10) and vertically blocks the air vent of the cover (1); The chassis (7) is adhered to the bottom of the superconducting quantum chip (10) through low-temperature thermal conductive adhesive; A radio frequency connector socket (3) electrically connected to a printed circuit board (4) and used for inserting a radio frequency cable; The printed circuit board (4) is bonded to the chassis (7) using a low-temperature heat-conducting adhesive and is welded to an upper sealing ring (12) and a lower sealing ring (13) at an upper welding seam (15) and a lower welding seam (16), respectively; the upper sealing ring (12) and the lower sealing ring (13) are respectively arranged above and below the printed circuit board (4), and provide sealing through plastically deformed upper indium wire rings (17) and lower indium wire rings (18); The lead (11) is connected to the printed circuit board (4) and the pad of the superconducting quantum chip (10) by ultrasonic bonding, so as to realize the electrical connection between the printed circuit board (4) and the superconducting quantum chip (10); A side shielding plate (5) is mounted on each side of the radio frequency connector socket (3), the side shielding plate (5) being connected to the chassis (7) and partially inserted into the interior of the chassis (7); The bottom shielding plate (14) is attached to the bottom of the chassis (7) through low-temperature heat-conducting adhesive; The bottom plate (6) is tightly attached to the bottom shielding plate (14) via low-temperature heat-conducting adhesive; The valve core (8) is connected to the cover (1) through a threaded hole on the outside of the cover (1), and helium is filled into the superconducting quantum chip package or vacuum is drawn through the valve core (8); the valve core cover (9) is connected to the valve core (8) through a thread.

2. The superconducting quantum chip package according to claim 1, wherein: The chassis (7) is also provided with a protruding platform for supporting the peripheral portion of the superconducting quantum chip (10), and the central portion of the chassis (7) surrounded by the protruding platform is hollowed out.

3. The superconducting quantum chip package according to claim 1, wherein: Vacuum sealing grease is applied to the threaded fitting of the valve core (8) and the threaded hole on the outer side of the cover (1); and / or, Vacuum sealing grease is applied to the threaded engagement portion between the valve core cover (9) and the valve core (8).

4. The superconducting quantum chip package according to claim 1, wherein: The radio frequency connector socket (3) is welded to the printed circuit board (4) on the periphery of the cover (1), or is fastened together with the printed circuit board (4) above the chassis (7) by screws penetrating the printed circuit board (4).

5. The superconducting quantum chip package according to any one of claims 1 to 4, wherein: The chassis (7) is further provided with slots or round holes around its edges; the slots or round holes are utilized to assemble the chassis (7) on a cold plate of a dilution refrigerator or a heat sink plate connected to the cold plate using screws or bolts.

6. The superconducting quantum chip package according to any one of claims 1 to 4, wherein: The outer side of the cover (1) is also provided with a blind screw hole for connecting a protective cover, a thermometer resistor or other components.

7. The superconducting quantum chip package according to any one of claims 1 to 4, wherein: The inner surface of the cover (1) surrounding the superconducting quantum chip (10) is a slope.

8. The superconducting quantum chip package according to any one of claims 1 to 4, wherein: A groove array is also provided on the side of the inflatable baffle (2) facing the superconducting quantum chip (10) for applying and storing absorbing material and absorbing stray electromagnetic waves.

9. The superconducting quantum chip package according to any one of claims 1 to 4, wherein: A guide groove is also provided on the side of the inflation baffle (2) facing the cover (1) for guiding the airflow in and out of the vent hole of the cover (1).

10. The superconducting quantum chip package according to any one of claims 1 to 4, wherein: The upper sealing ring (12) and the lower sealing ring (13) are embedded in the through holes of the printed circuit board (4) via their raised parts to achieve positioning.

Images