Double-layer printed circuit board

Abstract

The utility model relates to the field of printed circuit boards, and discloses a double-layer printed circuit board, which comprises a bottom mounting area, a first top mounting area and a second top mounting area, the first top mounting area and the second top mounting area are detachably erected and fixed on the bottom mounting area, the bottom mounting area is provided with a chip placing part, and the chip placing part is arranged on the bottom mounting area. And the chip placement part is located between projection areas, perpendicular to the bottom mounting area, of the first top mounting area and the second top mounting area. The double-layer circuit board has the effect that part of circuit board devices of the double-layer circuit board can be conveniently disassembled in the maintenance process.

Description

Technical Field

[0001] The present application relates to the field of printed circuit boards, and in particular to a double-layer printed circuit board. Background Art

[0002] Circuit boards are used as a medium for connecting electronic components. As electronic devices become increasingly sophisticated, the requirements for circuit board quality are also getting higher and higher. In particular, when electronic components are small in number and densely packed, single-layer circuit boards can no longer meet people's requirements, so double-layer circuit boards came into being.

[0003] However, existing circuit boards have certain drawbacks when in use. In actual layout and routing projects, some circuit board components in the double-layer circuit board need to be maintained and repaired during use, making assembly and disassembly inconvenient. There is room for improvement. Summary of the Invention

[0004] In order to facilitate the disassembly of some circuit board components of a double-layer circuit board during maintenance, the present application provides a double-layer printed circuit board.

[0005] This application provides a double-layer printed circuit board, which adopts the following technical solution:

[0006] A double-layer printed circuit board includes a bottom mounting area, a first top mounting area, and a second top mounting area. The first top mounting area and the second top mounting area are both detachably mounted and fixed on the bottom mounting area. A chip placement portion is provided on the bottom mounting area. The chip placement portion is located between the first top mounting area and the second top mounting area perpendicular to the projection area of ​​the bottom mounting area.

[0007] By adopting the above technical solution, the first top mounting area and the second top mounting area can be detachably fixed on the bottom mounting area, which facilitates the disassembly of the first top mounting area and the second top mounting area. In addition, the chip placement portion is arranged on the bottom mounting area in a limited area, and the first top mounting area and the second top mounting area share the chip placement portion, thereby saving space on the double-layer printed circuit board.

[0008] Optionally, a signal receiving module and a signal processing module are provided on both the first top mounting area and the second top mounting area, a signal output module is also provided on the second top mounting area, and a signal transmission module is provided on the chip placement portion; wherein, the signal to be processed is processed by the signal receiving module and the signal processing module and then output to an external device by the signal transmission module.

[0009] Optionally, the signal receiving module includes a signal access socket, the signal processing module includes a signal processing unit and a transformer unit, the signal access socket is used to access the signal to be processed and input it into the signal processing unit, and the signal processing unit inputs the processed signal to be processed into the transformer unit.

[0010] Optionally, the signal processing unit includes an EMERALD chip and a PHY chip.

[0011] Optionally, the voltage transformation unit includes at least one transformer, and the transformer is located above the PHY chip.

[0012] By adopting the above technical solution, the transformer is placed above the PHY chip, and the distance between the PHY and the transformer must be ≥25mm, so as to effectively isolate the PHY and the transformer and reduce EMI interference.

[0013] Optionally, the signal transmission module includes an FPGA chip, a POWER chip and an MCU chip are provided on the chip placement portion, and the FPGA chip is located between the POWER chip and the MCU chip.

[0014] Optionally, the signal output module includes a signal output PHY chip, a signal output transformer group and a signal output socket, the signal output transformer group is located above the signal output PHY chip, and the signal output socket is located above the signal output PHY chip and the signal output transformer group.

[0015] Optionally, mounting holes and mounting screws are provided around the first top mounting area and the second top mounting area, and a fixing hole is provided on the bottom mounting area. The mounting screws pass through the mounting holes and the fixing holes in sequence and fix the first top mounting area and the second top mounting area to the bottom mounting area.

[0016] By adopting the above technical solution, the first top mounting area and the second top mounting area are fixed to the bottom mounting area using mounting screws, thereby improving the convenience of mounting and dismounting the first top mounting area and the second top mounting area.

[0017] In summary, this application includes at least one of the following beneficial technical effects:

[0018] 1. The first and second top mounting areas are detachably fixed to the bottom mounting area, facilitating removal of the first and second top mounting areas. Furthermore, the chip placement portion is disposed on the bottom mounting area within a limited area, and the first and second top mounting areas share the chip placement portion, saving space on a double-layer printed circuit board.

[0019] 2. Use mounting screws to fix the first top mounting area and the second top mounting area to the bottom mounting area, thereby improving the convenience of installing and removing the first top mounting area and the second top mounting area. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a schematic diagram of a double-layer printed circuit board structure mainly embodied in an embodiment of the present application.

[0021] Figure markings: 1. Bottom mounting area; 2. First top mounting area; 3. Second top mounting area; 4. Chip placement portion; 5. Signal receiving module; 6. Signal processing module; 61. Signal processing unit; 62. Transformer unit; 7. Signal transmission module; 8. Signal output module; 81. Signal output PHY chip; 82. Signal output transformer group; 83. Signal output socket; 9. Mounting hole; 10. Mounting screw. DETAILED DESCRIPTION

[0022] The following describes the embodiments of the present application in detail, and examples of the embodiments are shown in the attached Figure 1 Shown in.

[0023] Throughout this specification, reference to the terms "certain embodiments," "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0024] The present application discloses a double-layer printed circuit board. Figure 1 , including a bottom mounting area 1, a first top mounting area 2, and a second top mounting area 3. The first top mounting area 2 and the second top mounting area 3 are detachably mounted on the bottom mounting area 1 at intervals. Specifically, mounting holes 9 and mounting screws 10 are provided around the first top mounting area 2 and the second top mounting area 3. The bottom mounting area 1 is provided with fixing holes. The mounting screws 10 pass through the mounting holes 9 and the fixing holes in sequence to fix the first top mounting area 2 and the second top mounting area 3 to the bottom mounting area 1.

[0025] Among them, a chip placement portion 4 is provided on the bottom mounting area 1, and the circuit components of the first top mounting area 2 and the second top mounting area 3 share the chip placement portion 4. Therefore, the chip placement portion 4 is located between the projection areas of the first top mounting area 2 and the second top mounting area 3 perpendicular to the bottom mounting area 1, thereby effectively reducing the routing distance of the circuit components and reducing the volume of the printed circuit board.

[0026] A signal receiving module 5 and a signal processing module 6 are provided on both the first top mounting area 2 and the second top mounting area 3. The signal receiving module 5 includes a signal access socket, which, when connected to an external data transmission line or interface, receives the transmitted signal to be processed. The signal processing module 6 includes a signal processing unit 61 and a voltage conversion unit 62. The signal access socket is used to receive the signal to be processed and input it to the signal processing unit 61. The signal processing unit 61 then inputs the processed signal to the voltage conversion unit 62.

[0027] In this embodiment of the present application, the signal processing unit 61 includes an EMERALD chip and a PHY chip. The voltage transformation unit 62 includes at least one transformer, preferably two in this application, both located above the PHY chip. To ensure effective isolation between the PHY and the transformer and reduce EMI interference, the distance between the PHY and the transformer must be ≥ 25 mm.

[0028] A signal output module 8 is also provided on the second top mounting area 3, and a signal transmission module 7 is provided on the chip placement portion 4. The signal to be processed is processed by the signal receiving module 5 and the signal processing module 6, and then output to an external device by the signal transmission module 7. The signal transmission module 7 includes an FPGA chip. A POWER chip and an MCU chip are provided on the chip placement portion 4, with the FPGA chip located between the POWER chip and the MCU chip. The signal output module 8 includes a signal output PHY chip 81 and a signal output transformer assembly 82, which is located above the signal output PHY chip 81. A signal output socket 83 is provided on the bottom mounting area 1.

[0029] The signal output module 8 includes a signal output PHY chip 81 , a signal output transformer group 82 and a signal output socket 83 . The signal output transformer group 82 is located above the signal output PHY chip 81 , and the signal output socket 83 is located above the signal output PHY chip 81 and the signal output transformer group 82 .

[0030] The first top mounting area 2 and the second top mounting area 3 in the present application are both equipped with signal access sockets. When the signal access socket on the first top mounting area 2 receives a first signal, the first signal is input to the EMERALD chip after passing through the PHY chip and the transformer, and then transmitted to the signal output PHY chip 81 and the signal output transformer group 82 through the FPGA chip and output by the signal output socket 83;

[0031] When the signal access socket on the second top mounting area 3 receives the second signal, the second signal is input into the EMERALD chip after passing through the PHY chip and the transformer, and then transmitted to the signal output PHY chip 81 and the signal output transformer group 82 through the FPGA chip and output by the signal output socket 83.

[0032] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A double-layer printed circuit board, characterized in that: The invention comprises a bottom mounting area (1), a first top mounting area (2) and a second top mounting area (3); the first top mounting area (2) and the second top mounting area (3) are both detachably mounted and fixed on the bottom mounting area (1); a chip placement portion (4) is provided on the bottom mounting area (1); the chip placement portion (4) is located between the projection areas of the first top mounting area (2) and the second top mounting area (3) perpendicular to the bottom mounting area (1).

2. The double-layer printed circuit board according to claim 1, wherein: A signal receiving module (5) and a signal processing module (6) are both provided on the first top mounting area (2) and the second top mounting area (3), a signal output module (8) is also provided on the second top mounting area (3), and a signal transmission module (7) is provided on the chip placement portion (4); wherein the signal to be processed is processed by the signal receiving module (5) and the signal processing module (6) and then output to an external device by the signal transmission module (7).

3. The double-layer printed circuit board according to claim 2, wherein: The signal receiving module (5) includes a signal access socket, and the signal processing module (6) includes a signal processing unit (61) and a voltage conversion unit (62). The signal access socket is used to access the signal to be processed and input it into the signal processing unit (61), and the signal processing unit (61) inputs the processed signal to be processed into the voltage conversion unit (62).

4. The double-layer printed circuit board according to claim 3, wherein: The signal processing unit (61) includes an EMERALD chip and a PHY chip.

5. The double-layer printed circuit board according to claim 4, characterized in that: The voltage transformation unit (62) includes at least one transformer, and the transformer is located above the PHY chip.

6. The double-layer printed circuit board according to claim 2, wherein: The signal transmission module (7) includes an FPGA chip, a POWER chip and an MCU chip are arranged on the chip placement portion (4), and the FPGA chip is located between the POWER chip and the MCU chip.

7. The double-layer printed circuit board according to claim 2, wherein: The signal output module (8) comprises a signal output PHY chip (81), a signal output transformer group (82) and a signal output socket (83); the signal output transformer group (82) is located above the signal output PHY chip (81); and the signal output socket (83) is located above the signal output PHY chip (81) and the signal output transformer group (82).

8. The double-layer printed circuit board according to claim 1, wherein: The first top mounting area (2) and the second top mounting area (3) are each provided with mounting holes (9) and mounting screws (10) on their four sides, and the bottom mounting area (1) is provided with fixing holes, and the mounting screws (10) pass through the mounting holes (9) and the fixing holes in sequence and fix the first top mounting area (2) and the second top mounting area (3) on the bottom mounting area (1).

Images