Multi-tube parallel drive circuit of new energy low-voltage controller

Abstract

The utility model discloses a multi-tube parallel drive circuit of a new energy low-voltage controller, which relates to the technical field of low-voltage large-current inverters, and comprises a filtering unit, a control unit, a power supply unit and a power supply unit, the power supply unit is used for supplying power to the chip U1; the negative voltage unit is used for determining effective turn-off of the MOS tube; the negative voltage unit comprises a capacitor C8 which is connected in parallel with a sixteenth pin and a fourteenth pin of the U1, a resistor R8 is connected in series with a connecting line for connecting the capacitor C8 with the power supply unit, the capacitor C8 is connected with the power supply unit through the connecting line, a capacitor C7 is connected in series with a fifteenth pin of the U1, and a diode D1 is connected in parallel with the capacitor C7. The driving reliability can be improved, the positive level of the driving is reduced, the driving loss is effectively reduced, the conduction loss of the MOSFET is reduced, and the efficiency is improved; the peripheral circuit of the circuit is simplified, and the PCB space and cost are saved.

Description

TECHNICAL FIELD

[0001] The utility model relates to low pressure large current inverter technical field, concretely is a new energy low pressure controller multichannel parallel drive circuit. BACKGROUND

[0002] In the case of new energy low pressure controller multichannel parallel, in order to effectively drive multiple MOS tubes, a powerful drive circuit is needed. The common circuit is to use push-pull circuit to increase the driving ability, and the peripheral circuit of this circuit is more, and has certain requirement to the space of PCB.

[0003] In the prior art, the peripheral circuit has more requirements, and has certain requirement to the space of PCB, and there is the condition of false opening, therefore we propose a new energy low pressure controller multichannel parallel drive circuit to solve the above problems. SUMMARY

[0004] The utility model discloses a new energy low pressure controller multichannel parallel drive circuit to solve the problems in the background art.

[0005] To achieve the above object, the utility model provides the following technical scheme: a new energy low pressure controller multichannel parallel drive circuit, including:

[0006] Filter unit, the filter unit is connected with chip U1, and after filtering, enters chip U1;

[0007] Power unit, the power unit is used to power supply for chip U1;

[0008] Negative pressure unit, the negative pressure unit is used to determine MOS tube effective shutdown;

[0009] The negative pressure unit includes parallel U1 No. 16 pin and the capacitor C8 on No. 14 pin, the capacitor C8 is connected with the connecting line of power unit and is connected with the connecting line of power unit, the C8 is connected with the capacitor C7 on U1 No. 15 pin, the C7 is connected with diode D1 in parallel, the capacitor C7 is connected with UHG, the chip U1 is connected with capacitor C10 and is grounded in parallel, the C10 connecting line is connected with resistor R9 and is connected into power unit, the U1 is connected with capacitor C9 and is connected into ULG in parallel, and the C9 is connected with diode D2 in parallel.

[0010] Preferably, the filter unit comprises PU+ and PU-, the PU- is connected with resistor R1 in series, the PU+ is connected with resistor R2 in series, the resistor R2 is connected with capacitor C1, the capacitor C1 is connected with resistor R4, capacitor C2, capacitor C3, resistor R6, capacitor C4, resistor R7, capacitor C5 and capacitor C6 in parallel in sequence, the capacitor C1 is connected with resistor R3 in parallel, and the R4 is connected with R1 through a connecting line.

[0011] Preferably, the power supply unit comprises +5V, UH+, UH-, +12V2, the +5V is connected with resistor R5 and capacitor C3 in series in sequence and connected with GND, the UH+ is connected with R8, the UH- is connected with C8, and the +12V2 is connected with R9.

[0012] Preferably, the R5, R8 and R9 are used for current limiting protection chip U1.

[0013] Preferably, the R3 and R4 are used for limiting the mis-conduction of the MOS tube, the R4 is connected with C2 in series, and one end of the R4 is connected with the connecting line of R1 and U1.

[0014] Preferably, the C3 and C6 are used for filtering the output voltage of R5, and one end of the C3 is connected with the connecting line of C2 and U1.

[0015] Preferably, the C5 is used for filtering the 6th pin of chip U1, and the C6 is used for filtering the +5V input to the chip.

[0016] Preferably, the C7 and C9 are direct-current capacitors.

[0017] Compared with the prior art, the utility model has the beneficial effects that:

[0018] 1. Not only can the reliability of driving be improved, but also the positive level of driving is reduced, the driving loss is effectively reduced, the conduction loss of MOSFET is reduced, and the efficiency is improved.

[0019] 2. The peripheral circuit of the circuit is simplified, and the PCB space and cost are saved. BRIEF DESCRIPTION OF DRAWINGS

[0020] Fig. 1 It is the driving circuit schematic view of the new energy low-voltage controller multiple-tube parallel connection in the utility model

[0021] Fig. 2 It is the MOS tube circuit schematic view in the utility model DETAILED DESCRIPTION

[0022] Clearly, the described embodiments are merely a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments of the present application, all the other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0023] Please refer to Figs. 1-2 A new energy low-voltage controller multi-tube parallel driving circuit, comprising:

[0024] The filter unit is connected with the chip U1, and after filtering, enters the chip U1; the filter unit comprises PU+ and PU-, a resistor R1 is connected in series on the PU-, a resistor R2 is connected in series on the PU+, a capacitor C1 is connected on the connection line of the chip U1 connected with the R2, resistors R4, capacitors C2, C3, R6, C4, R7, C5 and C6 are connected in parallel on the connection line of the capacitor C1 in sequence, a resistor R3 is connected in parallel on the C1, and the R4 is connected with the R1 through a connection line; the C3 and C6 are used for filtering the output voltage of the R5, one end of the C3 is connected with the connection line of the C2 and the U1, the C5 is used as a bypass capacitor and filters the 6-pin of the chip U1, and high-frequency noise in the input signal of the chip is filtered out; the C6 filters the +5V input to the chip, and the R3 and R4 are used for limiting the mis-conduction of the MOS tube, the R4 is connected in series with the C2, and one end of the R4 is connected with the connection line of the R1 and the U1.

[0025] The power supply unit is used for supplying power to the chip U1; the power supply unit comprises +5V, UH+, UH-, +12V2, the +5V is connected with the resistor R5 and the capacitor C3 in sequence and connected with the GND, the UH+ is connected with the R8, the UH- is connected with the C8, the +12V2 is connected with the R9, and the R5, R8 and R9 are used for current limiting protection of the chip U1.

[0026] The negative voltage unit is used for determining the effective turn-off of the MOS tube; the negative voltage unit comprises the capacitor C8 connected in parallel on the 16th pin and the 14th pin of the U1, the resistor R8 connected in series on the connection line of the power supply unit connected with the C8, the C8 connected with the power supply unit through a connection line, the capacitor C7 connected in series on the 15th pin of the U1, the diode D1 connected in parallel on the C7, the capacitor C7 connected with the UHG (the driving pole of the MOS tube), the capacitor C10 connected in parallel on the U1 and grounded, the resistor R9 connected on the connection line of the C10 and connected with the power supply unit, the capacitor C9 connected in series on the U1 and connected with the ULG (the source pole of the MOS tube), the diode D2 connected in parallel with the C9, and the C7 and C9 are direct-current blocking capacitors.

[0027] When PU- is high level, the 15-pin output of the chip is high level, the power supply charges the MOS tube GS through C7, and the capacitor C7 also accumulates the electric charge, and a left positive and right negative voltage is formed at the two ends of C7, since UHG and UH- connect the G and S ends of the MOS tube, and the resistors R11 and R16 are connected in parallel at the G and S ends of the MOS tube, during the high level of PU-, the positive charging is continued, since the switching frequency is high, with the extension of the working time, the voltage at the two ends of C7 gradually increases, in order to obtain a continuous negative voltage, a Zener diode D1 is connected in parallel, when the voltage of D1 reaches 3.3V, D1 starts to clamp C7 to 3.3V, at this time, the voltage applied to the two ends of the MOS tube is UH+ minus 3.3V. When PU- is low level, the junction capacitor Cgs in the MOS tube discharges to charge C7 reversely, and a negative voltage of about 3.3V-0.7V=2.6V is generated at the turn-off time, which ensures the effective turn-off of the upper bridge arm MOS; similarly, when PU+ is high level, the 10-pin output of the chip is high level, a left positive and right negative voltage is formed at the two ends of C9, and C9 is clamped to 3.3V by D2; when PU+ is low level, the junction capacitor Cgs in the MOS tube discharges to charge C9 reversely, and a negative voltage is generated at the turn-off time, which ensures the effective turn-off of the lower bridge arm MOS.

[0028] Although the embodiments of the utility model have been shown and described, it can be understood by those skilled in the art that various changes, modifications, replacements and variations can be made to these embodiments without departing from the principles and spirits of the utility model, the scope of the utility model is defined by the appended claims and their equivalents.

Claims

1. A new energy low-voltage controller multi-tube parallel driving circuit, characterized in that: include: The filtering unit is connected to the chip U1 and enters the chip U1 after filtering; A power supply unit, which is used to supply power to the chip U1; A negative pressure unit, connected to the MOS tube and used to determine whether the MOS tube is effectively shut down; The negative pressure unit includes a capacitor C8 connected in parallel on the 16th and 14th pins of U1, a resistor R8 is connected in series on the connecting line of the capacitor C8 connected to the power supply unit, and the C8 is connected to the power supply unit through a connecting line. A capacitor C7 is connected in series on the 15th pin of U1, a diode D1 is connected in parallel to C7, and the capacitor C7 is connected to UHG. A capacitor C10 is connected in parallel to the chip U1 and is grounded. A resistor R9 is connected to the C10 connecting line and is connected to the power supply unit. A capacitor C9 is connected in series on U1 and is connected to ULG, and a diode D2 is connected in parallel to C9.

2. The multi-tube parallel drive circuit of the new energy low-voltage controller according to claim 1 is characterized in that: The filtering unit includes PU+ and PU-, a resistor R1 is connected in series to the PU-, a resistor R2 is connected in series to the PU+, a capacitor C1 is connected to the connecting line of the R2 connecting chip U1, a resistor R4, a capacitor C2, a capacitor C3, a resistor R6, a capacitor C4, a resistor R7, a capacitor C5, and a capacitor C6 are connected in parallel on the connecting line of the capacitor C1, a resistor R3 is connected in parallel to C1, and R4 is connected to R1 through a connecting line.

3. The multi-tube parallel drive circuit of the new energy low-voltage controller according to claim 1 is characterized in that: The power supply unit includes +5V, UH+, UH-, and +12V2. The +5V is connected in series with a resistor R5 and a capacitor C3 and connected to GND. The UH+ is connected to R8, the UH- is connected to C8, and the +12V2 is connected to R9.

4. The multi-tube parallel drive circuit of the new energy low-voltage controller according to claim 3 is characterized by: The R5, R8 and R9 are used for current limiting protection chip U1.

5. The multi-tube parallel drive circuit of the new energy low-voltage controller according to claim 2 is characterized in that: The R3 and R4 are used to limit the MOS tube from mis-conducting. The R4 is connected in series with C2. One end of the R4 is connected to the connection line between R1 and U1.

6. The multi-tube parallel drive circuit of the new energy low-voltage controller according to claim 2 is characterized in that: The C3 and C6 are used to filter the output voltage of R5, and one end of the C3 is connected to the connection line between C2 and U1.

7. The multi-tube parallel drive circuit of the new energy low-voltage controller according to claim 2 is characterized in that: The C5 is used to filter the pin 6 of the chip U1, and the C6 is used to filter the +5V input to the chip.

8. The multi-tube parallel drive circuit of the new energy low-voltage controller according to claim 1 is characterized in that: The C7 and C9 are DC blocking capacitors, and the UHG and UH- are connected to the G and S terminals of the MOS tube respectively.

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