Back contact solar cell, cell string, cell module and photovoltaic system

Abstract

The utility model discloses a back contact solar cell, a cell string, a cell assembly and a photovoltaic system, and relates to the field of silicon solar cells. The back contact solar cell comprises a silicon substrate, a first doping layer, a second doping layer, a positive electrode grid line, a negative electrode grid line and a first PAD part. The first doping layers and the second doping layers are alternately arranged along a first direction; the first doped layer comprises a first sub-doped layer, and the second doped layer comprises a second sub-doped layer adjacent to the first sub-doped layer; the second doping sub-layer and the first doping sub-layer form an electric leakage composite contact structure at a preset position; the positive grid line comprises a first sub-positive grid line arranged on the first sub-doping layer, and the negative grid line comprises a first sub-negative grid line arranged on the second sub-doping layer; each group of first PAD parts comprises a first PAD point and a second PAD point, the first PAD point is electrically connected with the first sub positive grid line, and the second PAD point is electrically connected with the first sub negative grid line. According to the utility model, the hot spot effect can be accurately represented at the battery end.

Description

Technical Field

[0001] This utility model relates to the field of silicon solar cells, and in particular to a back-contact solar cell, a cell string, a cell module and a photovoltaic system. Background Technology

[0002] When one or more solar cells (or segments) in a photovoltaic module are partially or completely shaded, the shaded solar cells (segments) exhibit reverse voltage bias, becoming a load that consumes the power generated by the normal solar cells, thus generating a large amount of heat and causing the temperature of the solar cell to be higher than normal. This is the so-called hot spot effect. In existing technologies, to solve the hot spot problem, a diode is typically connected in anti-parallel across the two ends of the string unit to reduce the current of the shaded solar cell and weaken the hot spot effect. However, this parallel diode introduces power loss. To address this issue, a feasible approach is to directly form a leakage composite contact structure on the solar cell (see CN117976743B). This involves forming partial contacts between doped layers of different polarities during the solar cell fabrication process, effectively reducing the reverse voltage across the shaded solar cell, decreasing heat generation, and weakening the hot spot effect. Using this method, the control of the hot spot effect can be shifted forward to the solar cell end. Therefore, how to evaluate the hot spot effect at the solar cell end has become a technical problem that needs to be solved by those skilled in the art.

[0003] Conventional hot spot effect testing typically involves shading one or more solar cells (or segments) within a solar module, while the other solar cells (or segments) are exposed to sunlight. After a certain period, the temperature of the shaded solar cell segment is measured to characterize the hot spot effect. This method is clearly unsuitable for testing the hot spot effect at the solar cell end.

[0004] Furthermore, conventional testing equipment for solar cells, such as probes and PCBs for conventional IV testing, cannot perform reverse voltage characteristic testing due to the difficulty in aligning the fine grids, making it difficult to further characterize the heat spot resistance of the cells. Utility Model Content

[0005] The technical problem to be solved by this utility model is to provide a back-contact solar cell, a cell string, a cell module and a photovoltaic system, which can realize the quantitative evaluation of hot spot effect at the cell end.

[0006] To address the aforementioned problems, this utility model discloses a back-contact solar cell, comprising:

[0007] A silicon substrate, comprising a light-receiving surface and a back-lighting surface disposed opposite to each other;

[0008] Multiple first doped layers and multiple second doped layers are disposed on the backlight surface, the multiple first doped layers and multiple second doped layers are alternately arranged along a first direction and extend along a second direction; the first doped layer includes at least one first sub-doped layer, and the second doped layer includes a second sub-doped layer disposed adjacent to the first sub-doped layer; the second sub-doped layer and the first sub-doped layer form a leakage current composite contact structure at a preset position;

[0009] Multiple positive gate lines and multiple negative gate lines are provided, wherein the positive gate lines are disposed on the first doped layer and the negative gate lines are disposed on the second doped layer; the positive gate lines include a first sub-positive gate line disposed on the first sub-doped layer and the negative gate lines include a first sub-negative gate line disposed on the second sub-doped layer.

[0010] At least one set of first PAD sections, each set of first PAD sections includes a first PAD point and a second PAD point, the first PAD point is electrically connected to the first sub-positive grid line, and the second PAD point is electrically connected to the first sub-negative grid line.

[0011] As an improvement to the above technical solution, the silicon substrate has a first edge and a second edge disposed opposite to each other in a first direction; along the direction from the first edge toward the second edge, the backlight surface includes a first edge region, a middle region, and a second edge region;

[0012] The first PAD is located within the first edge region and the second edge region; or

[0013] The first PAD is located within the intermediate region; or

[0014] The first PAD is located in the first edge region, the middle region, and the second edge region.

[0015] As an improvement to the above technical solution, the first PAD portion is only located in the first edge region and the second edge region.

[0016] As an improvement to the above technical solution, a second PAD portion is further provided in the first edge region and / or the second edge region;

[0017] The second PAD portion includes a third PAD point and a fourth PAD point. The third PAD point is electrically connected to the positive grid line, and the fourth PAD point is electrically connected to the negative grid line.

[0018] As an improvement to the above technical solution, the silicon substrate has a third edge and a fourth edge that are disposed opposite to each other in the second direction;

[0019] A first PAD point located in the first edge region and the second edge region of the first PAD portion is positioned near the third edge, and a second PAD point located in the first edge region and the second edge region of the first PAD portion is positioned near the fourth edge;

[0020] No third or fourth PAD point is provided between the first PAD point and the third edge;

[0021] No third or fourth PAD point is provided between the second PAD point and the fourth edge.

[0022] As an improvement to the above technical solution, the first PAD point of the first PAD portion in the intermediate region is disposed near the third edge, and the second PAD point of the first PAD portion in the intermediate region is disposed near the fourth edge.

[0023] As an improvement to the above technical solution, the first doped layer includes 5 to 20 first sub-doped layers, each of which is provided with a first sub-positive gate line, and each first sub-positive gate line is connected to a first PAD point.

[0024] The second doped layer includes 5 to 20 second sub-doped layers, each of which has a first sub-negative gate line, and each first sub-negative gate line is connected to a second PAD point.

[0025] As an improvement to the above technical solution, the first doped layer includes 5 to 20 first sub-doped layers, and the multiple first sub-doped layers are distributed along the first direction; each first sub-doped layer is provided with a first sub-positive gate line, and a first PAD point is provided every other first sub-positive gate line;

[0026] The second doped layer includes 5 to 40 second sub-doped layers, which are distributed along the first direction. Each second sub-doped layer is provided with a first sub-negative gate line, and a second PAD point is provided every other first sub-negative gate line.

[0027] As an improvement to the above technical solution, the width of the first sub-positive gate line is greater than the width of the other positive gate lines.

[0028] As an improvement to the above technical solution, it includes 1 to 12 groups of first PAD sections.

[0029] As an improvement to the above technical solution, it also includes:

[0030] A first shunt gate line and a second shunt gate line, wherein the first shunt gate line is electrically connected to a plurality of positive gate lines and the second shunt gate line is electrically connected to a plurality of negative gate lines;

[0031] The first shunt gate line is electrically connected to the first PAD point, and the second shunt gate line is electrically connected to the second PAD point.

[0032] As an improvement to the above technical solution, it also includes:

[0033] The first shunt gate line and the second shunt gate line are electrically connected. The first shunt gate line electrically connects all the positive gate lines located on the backlight surface, and the second shunt gate line electrically connects all the negative gate lines located on the backlight surface.

[0034] The first shunt gate line is electrically connected to the first PAD point, and the second shunt gate line is electrically connected to the second PAD point.

[0035] As an improvement to the above technical solution, the silicon substrate has a third edge and a fourth edge that are disposed opposite to each other in the second direction;

[0036] The first shunt gate line is disposed near the third edge, and the second shunt gate line is disposed near the fourth edge.

[0037] As an improvement to the above technical solution, the positive and negative gate lines are disposed on the side of the first shunt gate line facing the fourth edge;

[0038] The positive and negative grid lines are located on the side of the second shunt grid line facing the third edge.

[0039] As an improvement to the above technical solution, the distance between the first PAD point and the third edge is greater than the distance between the first shunt grid line and the third edge;

[0040] The distance between the second PAD point and the fourth edge is greater than the distance between the second shunt grid line and the fourth edge.

[0041] As an improvement to the above technical solution, the distance between the first PAD point and the third edge is 3mm to 5mm; the distance between the second PAD point and the fourth edge is 3mm to 5mm.

[0042] The distance between the first shunt grid line and the third edge is 0.2mm to 2mm, and the distance between the second shunt grid line and the fourth edge is 0.2mm to 2mm.

[0043] As an improvement to the above technical solution, the first PAD point is electrically connected to the first shunt grid line through the first connecting grid line;

[0044] The second PAD point is electrically connected to the second shunt grid line through the second connecting grid line.

[0045] As an improvement to the above technical solution, the first connecting gate line is located on the extension line of the first sub-positive gate line to the third edge;

[0046] The second connecting gate line is located on the extension line of the first sub-negative gate line to the fourth edge.

[0047] As an improvement to the above technical solution, the first PAD point is located at the end of the first sub-positive grid line and is electrically connected to the first sub-positive grid line.

[0048] The second PAD point is located at the end of the first sub-negative grid line and is electrically connected to the first sub-negative grid line.

[0049] As an improvement to the above technical solution, the positive grid line further includes a second sub-positive grid line disposed close to the first sub-positive grid line; the first PAD point is connected to the first sub-positive grid line and at least two second sub-positive grid lines.

[0050] The negative grid line also includes a second sub-negative grid line located close to the first sub-negative grid line; the second PAD point is electrically connected to the first sub-negative grid line and at least two second sub-negative grid lines.

[0051] As an improvement to the above technical solution, the first connecting gate line is further provided with a third sub-negative gate line extending along the second direction on at least one side in the first direction. The third sub-negative gate line is electrically connected to at least one negative gate line close to the first PAD point and is insulated from the first PAD point.

[0052] The second connecting grid line is further provided with a third sub-positive grid line extending along the second direction on at least one side in the first direction. The third sub-positive grid line is electrically connected to at least one positive grid line near the second PAD point and is insulated from the second PAD point.

[0053] As an improvement to the above technical solution, the third sub-negative gate line is located on the extension line of the first sub-negative gate line connected to the second PAD point towards the third edge; and / or

[0054] The third sub-positive grid line is located on the extension line of the first sub-positive grid line connected to the first PAD point to the fourth edge.

[0055] As an improvement to the above technical solution, the first PAD point and the second PAD point are square, circular, triangular or irregular in shape.

[0056] As an improvement to the above technical solution, the first PAD point and the second PAD point are square, with a width of 0.1mm to 1mm.

[0057] As an improvement to the above technical solution, the second PAD part includes a plurality of third PAD points and a plurality of fourth PAD points, which are arranged alternately along the second direction.

[0058] As an improvement to the above technical solution, a second PAD portion is further provided in the first edge region and / or the second edge region; the second PAD portion includes a third PAD point and a fourth PAD point, the third PAD point being electrically connected to the positive gate line, and the fourth PAD point being electrically connected to the negative gate line;

[0059] The first PAD point and the second PAD point located within the first edge area are arranged in a row with the third PAD point and the fourth PAD point located within the first edge area;

[0060] The first PAD point and the second PAD point located within the second edge region are arranged in a row with the third PAD point and the fourth PAD point located within the second edge region.

[0061] Accordingly, this utility model also discloses a battery string, which includes the aforementioned back-contact solar cell.

[0062] Accordingly, this utility model also discloses a battery assembly, which includes the aforementioned back-contact solar cell or the aforementioned battery string.

[0063] Accordingly, this utility model also discloses a photovoltaic system, which includes the aforementioned battery components.

[0064] The present invention has the following beneficial effects:

[0065] In this back-contact solar cell, a first sub-doped layer and a second sub-doped layer are formed on the back side of a silicon substrate, creating a leakage composite contact structure at a predetermined location to mitigate the hot spot effect. Furthermore, a first PAD point and a second PAD point are electrically connected to the first sub-positive gate line corresponding to the first sub-doped layer and the first sub-negative gate line corresponding to the second sub-doped layer, respectively. Based on this embodiment, a reverse current can be passed into the back-contact solar cell through the first sub-PAD point and the second PAD point, thereby testing the reverse breakdown voltage of the back-contact solar cell, providing a good foundation for characterizing the hot spot effect at the cell end. Attached Figure Description

[0066] Figure 1 This is a schematic diagram of the back structure of a back-contact solar cell in one embodiment of this utility model;

[0067] Figure 2 This is a schematic diagram of the back structure of a back-contact solar cell in one embodiment of this utility model;

[0068] Figure 3 This is a cross-sectional structural diagram of a back-contact solar cell in one embodiment of the present invention;

[0069] Figure 4 This is a schematic diagram of the structure of the first doped layer and the second doped layer in one embodiment of the present invention;

[0070] Figure 5 This is a schematic diagram of the back structure of a back-contact solar cell in one embodiment of this utility model;

[0071] Figure 6 This is a schematic diagram of the back structure of a back-contact solar cell in one embodiment of this utility model;

[0072] Figure 7 This is a schematic diagram of the back structure of a back-contact solar cell in one embodiment of this utility model;

[0073] Figure 8 This is a schematic diagram of the structure of a back-contact solar cell string in one embodiment of this utility model;

[0074] Figure 9 This is a schematic diagram of the structure of a back-contact solar cell string in another embodiment of the present invention;

[0075] Figure 10 This is a schematic diagram of the structure of a back-contact solar cell assembly in one embodiment of the present invention;

[0076] Figure 11 This is a schematic diagram of the composition of a photovoltaic system in one embodiment of the present invention. Detailed Implementation

[0077] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. Furthermore, it should be understood that the specific embodiments described herein are merely for explaining this application and are not intended to limit this application.

[0078] In the description of this application, it should be understood that the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0079] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0080] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0081] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0082] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0083] Example 1

[0084] refer to Figures 1-4 In this embodiment, the back contact solar cell 200 includes a silicon substrate 1, multiple first doped layers 21, multiple second doped layers 22, multiple positive grid lines 31, and multiple negative grid lines 32.

[0085] The silicon substrate 1 can be P-type monocrystalline silicon, N-type monocrystalline silicon, P-type polycrystalline silicon, or N-type polycrystalline silicon, but is not limited thereto; N-type monocrystalline silicon is preferred. In terms of thickness, the silicon substrate 1 includes a light-receiving surface 11 and a back-lighting surface 12 disposed opposite to each other. The light-receiving surface 11 generally refers to the side that receives light, and its surface may also be provided with passivation layers, anti-reflection layers, etc., commonly found in the art, but is not limited thereto. The back-lighting surface 12 mainly houses electrode structures and may also be provided with passivation layers, etc., but is not limited thereto. It should be noted that in some embodiments, the back-lighting surface 12 can also absorb light incident through the back-lighting surface 12, thereby generating photocurrent.

[0086] The silicon substrate 1 can be circular, hexagonal, octagonal, or rectangular, but is not limited to these forms. Preferably, in one embodiment, the silicon substrate 1 is rectangular, and its four corners may be chamfered. When the silicon substrate 1 is rectangular, it has a first edge 13 and a second edge 14 disposed opposite each other in a first direction, and a third edge 15 and a fourth edge 16 disposed opposite each other in a second direction. The first and second directions intersect. In one embodiment, the first direction can be a horizontal direction, and the second direction can be a vertical direction, wherein the first and second directions are perpendicular to each other. It is understood that in other embodiments, the first and second directions may not be perpendicular, and the first and second directions may be any other directions, such as the diagonal direction of the rectangular silicon substrate 1, but are not limited to these forms.

[0087] The first doped layer 21 and the second doped layer 22 are disposed on the backlight surface 12. Specifically, the first doped layer 21 and the second doped layer 22 are alternately arranged along a first direction and extend along a second direction. A gap region 23 is provided between the first doped layer 21 and the second doped layer 22 to achieve insulation between the first doped layer 21 and the second doped layer 22. The first doped layer 21 may be one or more of a P-type doped polycrystalline silicon layer, a P-type doped amorphous silicon layer, or a P-type doped microcrystalline silicon layer, but is not limited thereto. Preferably, the first doped layer 21 is a P-type polycrystalline silicon layer; the P-type dopant element in the first doped layer 21 may be B, Al, or Ga, but is not limited thereto, with B being preferred. The second doped layer 22 may be an N-type doped polycrystalline silicon layer, an N-type doped amorphous silicon layer, or an N-type doped microcrystalline silicon layer, but is not limited thereto. Preferably, it is an N-type doped polycrystalline silicon layer. The N-type dopant element in the second doped layer 22 may be P, As, or Sb, but is not limited thereto. P is preferred.

[0088] The positive electrode gate line 31 can be a silver gate line, an aluminum gate line, a copper gate line, a silver-clad copper gate line, or a copper-clad silver gate line, but is not limited to these. The positive electrode gate line 31 can be formed by screen printing, electroplating, or stacking, but is not limited to these methods. The positive electrode gate line 31 is disposed above and in contact with the first doped layer 21. Preferably, [reference needed]. Figure 3In one embodiment, an insulating layer 40 is provided between the positive gate line 31 and the first doped layer 21. The positive gate line 31 contacts the first doped layer 21 through a first hole 41 provided on the insulating layer 40. The first hole 41 can be formed by laser process, etching process, or paste burn-through process, but is not limited thereto.

[0089] The negative electrode grid line 32 can be a silver grid line, aluminum grid line, copper grid line, silver-clad copper grid line, or copper-clad silver grid line, but is not limited to these. The negative electrode grid line 32 can be formed by screen printing, electroplating, or stacking, but is not limited to these methods. Preferably, see reference... Figure 3 In one embodiment, an insulating layer 40 is provided between the negative gate line 32 and the second doped layer 22. The negative gate line 32 contacts the second doped layer 22 through a second hole 42 provided on the insulating layer 40. The second hole 42 can be formed by laser process, etching process, or paste burn-through process, but is not limited thereto.

[0090] For details, please refer to Figure 4 The first doped layer 21 includes at least one first sub-doped layer 211, and the second doped layer 22 includes at least one second sub-doped layer 221. The first sub-doped layer 211 and the second sub-doped layer 221 form a leakage current composite contact structure 24 at a predetermined location. Based on this leakage current composite contact structure 24, the reverse voltage across the back contact solar cell 200 under peak current can be reduced, the heat generation power can be reduced, the probability of hot spot occurrence can be reduced, and the temperature of the hot spot region can be reduced when hot spot occurs.

[0091] Specifically, in one embodiment, at a predetermined location, the first sub-doped layer 211 or the second sub-doped layer 221 can be extended to a doped layer of another polarity (such as the second sub-doped layer 221 or the first sub-doped layer 211), so that the two come into contact to form a leakage composite contact structure 24. In another embodiment, a conductive functional layer is formed at a predetermined location, so that the first sub-doped layer 211 and the second sub-doped layer 221 come into contact to form a leakage composite contact structure 24. In yet another embodiment, the leakage composite contact structure 24 can be formed by stacking the first sub-doped layer 211 and the second sub-doped layer 221. Specifically, the second sub-doped layer 221 can be stacked on the first sub-doped layer 211, or the first sub-doped layer 211 can be stacked on the second sub-doped layer 221. It should be noted that when a stacked structure is used, a dielectric layer can also be provided between the first sub-doped layer 211 and the second sub-doped layer 221. The dielectric layer can be a tunneling film layer, such as a silicon oxide tunneling passivation layer, but is not limited to this. Preferably, a second sub-doped layer 221 is stacked on the first sub-doped layer 211 at a predetermined location to form a leakage current composite contact structure 24. Based on this structure, the leakage current composite contact structure 24 can be formed by etching the second sub-doped layer 221, which is simple and reliable.

[0092] Specifically, the first doped layer 21 includes 5 to 20 first sub-doped layers 211, which are evenly or non-uniformly distributed on the back surface 12 along a first direction. By controlling the number of first sub-doped layers 211, the hot spot effect can be better controlled. Preferably, in one embodiment, the first doped layer 21 includes 5 to 20 first sub-doped layers 211, which are evenly distributed along the first direction. It should be noted that in the back contact solar cell 200, multiple spaced first doped layers 21 and second doped layers 22 are provided on its back side, wherein each first doped layer 21 / second doped layer 22 forms a PN unit with the silicon substrate 1, and the multiple PN units are connected in parallel. By controlling the uniform distribution of the spacing of the first sub-doped layers 211, a leakage recombination contact structure 24 can be uniformly introduced between the multiple PN units, thereby effectively reducing the probability of hot spot occurrence and reducing the temperature of the hot spot region when hot spot occurs.

[0093] Specifically, to prevent the first sub-positive gate line 311 disposed on the first sub-doped layer 211 from contacting the second sub-doped layer 221 and forming a short circuit, the width of the first sub-doped layer 211 is set to be greater than the width of the second sub-doped layer 221, or the first sub-doped layer 211 is widened only at a preset position. Specifically, the width of the first sub-doped layer 211 or the width of its widened portion (in the first direction) is 0.8mm to 1.5mm, and the width of the other parts of the first doped layer 21 (in the first direction) is 0.6mm to 1mm.

[0094] Optionally, after increasing the width of the first sub-doped layer 211, in order to improve the carrier collection efficiency, the width of the first sub-positive gate line 311 is controlled to be greater than the width of the other positive gate lines 31. Specifically, the width of the first sub-positive gate line 311 is 50μm to 200μm, and the width of the other positive gate lines 31 is 30μm to 200μm.

[0095] Accordingly, refer to Figure 1 and Figure 2In this embodiment, the back contact solar cell 200 includes at least one set of first PAD sections. Each set of first PAD sections includes a first PAD point 51 and a second PAD point 52. The first PAD point 51 is electrically connected to the first sub-positive grid line 311, and the second PAD point 52 is electrically connected to the first sub-negative grid line 321. Reverse current is injected into the back contact solar cell 200 through the first PAD point 51 and the second PAD point 52, flowing through the leakage current composite contact structure 24. The reverse breakdown voltage of the back contact solar cell 200 is measured, providing a good basis for characterizing the hot spot effect at the cell end. It should be noted that conventional hot spot testing is generally performed at the module 600 end, that is, any one or more solar cells in the solar cell module 600 are shaded, while other solar cells (or sections) are exposed to sunlight. After a certain period of time, the temperature of the shaded solar cells (or sections) is measured to characterize the hot spot effect. Existing technologies make it difficult to accurately quantify the hot spot effect at the cell end. In this embodiment, after introducing the leakage current composite contact structure 24, its reverse breakdown voltage is measured, which fully expresses the influence of the leakage current composite contact structure 24 on the reverse breakdown voltage. Furthermore, the hot spot effect is characterized by quantitative analysis of the reverse breakdown voltage, providing a good foundation for the control of the hot spot effect of the module 600.

[0096] It is understood that the first PAD point 51 and the second PAD point 52 do not contact the first doped layer 21 and the second doped layer 22 below them to prevent leakage. That is, an insulating layer 40 is provided between the first PAD point 51 and the second PAD point 52 and the first doped layer 21 and the second doped layer 22. The insulating layer 40 may include one or more of the following: an aluminum oxide layer, an amorphous silicon layer, a silicon oxide layer, and a silicon nitride layer.

[0097] The first PAD point 51 and the second PAD point 52 can be square, circular, triangular, or irregular in shape, but are not limited to these. Preferably, in one embodiment, the first PAD point 51 and the second PAD point 52 are square, with a width of 0.1 mm to 1 mm. Based on this width, the first PAD point 51 and the second PAD point 52 can form good contact with the test probe of the test device. The test probe refers to the probe used for injecting current in the test equipment.

[0098] For details, please refer to Figure 1 and Figure 2In this embodiment, along the direction from the first edge 13 of the silicon substrate 1 towards the second edge 14, the backlight surface 12 includes a first edge region 110, a middle region 120, and a second edge region 130, with a first PAD portion disposed within the middle region 120. More specifically, based on this embodiment, a second PAD portion is also disposed within the first edge region 110 and the second edge region 130. The second PAD portion includes a third PAD point 53 and a fourth PAD point 54. The third PAD point 53 is electrically connected to the positive gate line 31, and the fourth PAD point 54 is electrically connected to the negative gate line 32. The second PAD portion can be used for soldering later.

[0099] Specifically, in this embodiment, the first PAD point 51 of the first PAD portion located within the intermediate region 120 is positioned close to the third edge 15, and the second PAD point 52 is positioned close to the fourth edge 16. Based on this embodiment, problems such as printing cracks caused by the first PAD portion being too close to the edge can be avoided. Specifically, the distance between the first PAD point 51 and the third edge 15 is 1mm to 10mm, exemplarily 1.5mm, 3mm, 4.5mm, 6mm, 7.5mm, or 9mm, but not limited to these. The distance between the second PAD point 52 and the fourth edge 16 is 1mm to 9mm, exemplarily 1.5mm, 3mm, 4.5mm, 6mm, 7.5mm, or 9mm, but not limited to these. Specifically, the distance between the first PAD point 51 and the third edge 15 refers to the distance between the geometric center of the first PAD point 51 and the third edge 15. The distance between the second PAD point 52 and the fourth edge 16 refers to the distance between the geometric center of the second PAD point 52 and the fourth edge 16.

[0100] Specifically, in one embodiment, refer to Figure 1 The first doped layer 21 includes 5 to 20 first sub-doped layers 211, each of which has a first sub-positive gate line 311. Each first sub-positive gate line 311 is in contact with the first sub-doped layer 211 and is insulated from the second sub-doped layer 221. Correspondingly, a first PAD point 51 is connected to each first sub-positive gate line 311. The second doped layer 22 includes 5 to 20 second sub-doped layers 221, each of which has a first sub-negative gate line 321. Each first sub-negative gate line 321 is connected to a second PAD point 52. That is, in this embodiment, each PN unit with a leakage current composite contact structure 24 has a first PAD portion, which can effectively improve the test accuracy.

[0101] In another embodiment, the first doped layer 21 includes 5 to 20 first sub-doped layers 211, each of which has a first sub-positive gate line 311. Each first sub-positive gate line 311 is in contact with the first sub-doped layer 211 and is insulated from the second sub-doped layer 221. Correspondingly, a first PAD point 51 is connected to each first sub-positive gate line 311. The second doped layer 22 includes 10 to 40 second sub-doped layers 221, that is, a second sub-doped layer 221 is provided on each side of each first sub-doped layer 211. Each second sub-doped layer 221 has a first sub-negative gate line 321, each of which is in contact with the second sub-doped layer 221 and is insulated from the first sub-doped layer 211. That is, in this embodiment, a first sub-negative gate line 321 is provided on each side of each first sub-positive gate line 311. Based on this embodiment, for each first sub-negative grid line 321 corresponding to the first sub-positive grid line 311, the second PAD point 52 can be connected to either side of the first sub-negative grid line 321, or both first sub-negative grid lines 321 can be connected to the same second PAD point 52. In this embodiment, each PN unit with a leakage current composite contact structure 24 is provided with a first PAD portion, which can effectively improve the test accuracy.

[0102] It should be noted that while increasing the number of first PADs improves the accuracy of test results, it also occupies grid space, reduces carrier collection, and consequently decreases the conversion efficiency of the back-contact solar cell 200. Therefore, refer to... Figure 2 In one embodiment, a first PAD point 51 is provided for every other first sub-positive grid line 311, and correspondingly, a second PAD point 52 is provided for every other first sub-negative grid line 321. Based on the above embodiment, conversion efficiency can be improved while ensuring the most accurate test results possible.

[0103] Furthermore, taking into account conversion efficiency and test accuracy, the number of first PAD units is set to 1 to 12 groups, with examples of 1, 3, 5, 7, or 9 groups, but not limited to these. Preferably, it is 1 to 4 groups.

[0104] The following further explains the impact of the number of first PAD sections on the reverse breakdown voltage test results:

[0105] For an ideal diode, its current can be calculated using the following formula:

[0106]

[0107] Where, I DD I is the current flowing from the positive terminal to the negative terminal in an ideal diode. sν is the reverse saturation current of the ideal diode; n is the emission coefficient, with a value of 1 to 2; k is the Boltzmann constant; T is the temperature; q is the space electron charge; and V is the voltage across the positive and negative terminals of the ideal diode.

[0108] After introducing the leakage current composite contact structure 24, the current of the diode with leakage current can be calculated by the following formula:

[0109]

[0110] Among them, I D I is the output current of a diode with leakage current. DD I is the current flowing from the positive terminal to the negative terminal in an ideal diode. S Let be the reverse saturation current of an ideal diode, n be the emission coefficient (1-2), k be the Boltzmann constant, T be the temperature, q be the space electron charge, V be the voltage across the diode's positive and negative terminals, and I be the voltage across the diode's negative terminals. S,R n is the reverse saturation current of a diode with leakage current. R Let n be the leakage emission coefficient. R ≥2.

[0111] Under non-ideal conditions, a diode can be reverse-biased, with a reverse breakdown current I. D,BR It can be represented as:

[0112]

[0113] Among them, I BR The breakdown inflection point current; V is the voltage across the positive and negative terminals of the diode, V BR n is the reverse breakdown voltage. BR The breakdown emission coefficient ranges from 0.95 to 1.02.

[0114] Therefore, without considering the series resistance (i.e., the grid line resistance and the contact resistance between the grid line and the doped layer), the current in the back contact solar cell 200 in this embodiment can be calculated by the following formula:

[0115]

[0116] In actual testing, due to the voltage division caused by the series resistance (gate line resistance, contact resistance between the gate line and the doped layer), when the applied voltage is V... W Let R be the line resistance of the gate line transmission of a pitch (PN cell). s Let x be the number of pitches through which the current flows, and assuming good contact between the gate line and the doped layer with minimal contact resistance, then the voltage division across the smallest unit diode is V = V0. w -xI D R s .

[0117] Therefore, taking into account the series resistance, the current of a single PN cell in the back contact battery in this embodiment can be calculated by the following formula:

[0118]

[0119] In the formula, V W For the applied voltage, R s The line resistance of the gate line transmission for a pitch (PN cell), where x is a variable characterizing the number of pitches between the positive gate line 31 and the first PAD point 51, is given by... Figure 7 For example, there are 6 first doped layers 21 and 6 second doped layers 22 between adjacent first PAD point 51 and second PAD point 52, totaling 6 PN units, then x = 6 ÷ 2 = 3.

[0120] It should be noted that in this embodiment, multiple first doped layers 21 and second doped layers 22 are provided on the back side of the back contact battery, which together with the silicon substrate 11 form multiple PN units, which can be approximated as being connected in parallel.

[0121] Therefore, when only one set of first PAD sections is provided on the back-contact solar cell 200 with z PN units (pitches), the measured current and voltage can be calculated by the following formula:

[0122]

[0123] Among them, I D2 The current measured when setting up a first set of PADs, V C2 The voltage measured when setting up a first set of PADs.

[0124] If four sets of first PAD sections are set, the measured current and voltage can be calculated using the following formula:

[0125]

[0126] Among them, I D5 The current measured when setting up the first PAD section of the four groups, V C5 The voltage measured when setting up the first PAD section of the four groups.

[0127] From the above two equations, it can be unequivocally found that: I D5 >I D2 Therefore, for the same back-contact solar cell 200 under test, V C5 <V C2That is, increasing the number of first PAD sections results in more accurate reverse breakdown voltage test results. Furthermore, increasing the number of test points can reduce test errors caused by broken grids such as the first shunt gate line 61 / second shunt gate line 62. However, as mentioned above, increasing the number of first test points is detrimental to improving conversion efficiency. Therefore, based on the above analysis, the inventors conducted extensive testing and proposed a specific correction method. Specifically, after testing with any group of first PAD sections, the following formula can be used for conversion:

[0128]

[0129] Among them, U rev U is the reverse breakdown voltage of the back contact solar cell 200. rev0 The reverse breakdown voltage of the back contact solar cell 200 is used for testing. x is the total number of positive grid lines 31 and negative grid lines 32. x0 is a variable representing the first PAD section. x1 is the number of first PAD points 51. x2 is the number of second PAD points 52. A is a constant with a value range of 0.1 to 3.3. B is a constant with a value range of 2 to 50.

[0130] Based on the above relationship, the test results can be corrected to obtain an accurate reverse breakdown voltage when setting any group of first PAD sections. Specifically, research has found that when setting 1 to 4 groups of first PAD sections, the test error is ≤5%; when setting 4 to 6 groups, the test error is ≤3.5%; and when setting 8 to 10 groups, the test error is ≤1.5%.

[0131] In one embodiment, reference is made to Figure 4 The back contact solar cell 200 also includes a first shunt grid line 61 and a second shunt grid line 62. The first shunt grid line 61 is electrically connected to a plurality of positive grid lines 31, and the second shunt grid line 62 is electrically connected to a plurality of negative grid lines 32. The first shunt grid line 61 is electrically connected to a first PAD point 51, and the second shunt grid line 62 is electrically connected to a second PAD point 52. Based on the above embodiment, the reverse current from the second PAD point 52 is shunted to a plurality of negative grid lines 32 via the second shunt grid line 62, and then flows through a plurality of positive grid lines 31 before being collected at the first PAD point 51 via the first shunt grid line 61. This achieves the effect of better characterizing the influence of grid line resistance voltage division and contact resistance voltage division on the accuracy of reverse breakdown voltage test. In addition, it should be noted that when the number of first PAD points 51 is small, the number of PN cells passing through will also decrease accordingly. Although this test value can characterize the hot spot effect of the back contact solar cell 200 to a certain extent, it is not accurate enough. By introducing the first shunt grid line 61 and the second shunt grid line 62, the reverse current can flow through more PN cells, thereby effectively improving the accuracy of the test.

[0132] The first shunt grid line 61 and the second shunt grid line 62 can be straight or curved, and can be arranged parallel to the first direction or at an angle to the first direction, but are not limited thereto. Preferably, in one embodiment, the first shunt grid line 61 and the second shunt grid line 62 are straight and extend along the first direction, that is, they are parallel to the first direction. This reduces the length of the first shunt grid line 61 and the second shunt grid line 62 between the positive grid line 31 to be connected or the negative grid line 32 to be connected, and simplifies the grid line arrangement.

[0133] Preferably, in one embodiment, the width of the first shunt gate line 61 is greater than the width of the positive gate line 31, and the width of the second shunt gate line 62 is greater than the width of the negative gate line 32, in order to reduce the current loss of the first shunt gate line 61 and the second shunt gate line 62, thereby improving the test accuracy. More preferably, the width of the first shunt gate line 61 is 1.5 to 3 times the width of the positive gate line 31, and the width of the second shunt gate line 62 is 1.5 to 3 times the width of the negative gate line 32.

[0134] In one embodiment, the first shunt gate line 61 is positioned near the third edge 15, and the second shunt gate line 62 is positioned near the fourth edge 16. This configuration simplifies the gate structure and improves carrier collection efficiency and conversion efficiency. Since the first shunt gate line 61 / second shunt gate line 62 connects multiple positive gate lines 31 / negative gate lines 32 extending in the second direction, if the first shunt gate line 61 / second shunt gate line 62 were positioned in the center, multiple discontinuous insulation structures or other types of insulation structures would be required in the gate line regions with different polarities. This would complicate the gate structure, reduce the arrangement area of ​​the positive gate line 31 and the negative gate line 32, and decrease carrier collection.

[0135] Specifically, the distance between the first shunt grid line 61 and the third edge 15 is 0.1mm to 3mm, exemplarily 0.5mm, 1mm, 1.5mm, 2mm, or 2.5mm, but not limited thereto. Specifically, the distance between the first shunt grid line 61 and the third edge 15 refers to the distance between the centerline of the first shunt grid line 61 and the third edge 15. The distance between the second shunt grid line 62 and the fourth edge 16 is 0.1mm to 3mm, exemplarily 0.5mm, 1mm, 1.5mm, 2mm, or 2.5mm, but not limited thereto. Specifically, the distance between the second shunt grid line 62 and the fourth edge 16 refers to the distance between the centerline of the second shunt grid line 62 and the fourth edge 16.

[0136] Preferably, in one embodiment, the first shunt grid line 61 is disposed at the end of the positive grid line 31 near the third edge 15, that is, the positive grid line 31 and the negative grid line 32 are disposed on the side of the first shunt grid line 61 facing the fourth edge 16; and no other grid lines are disposed between the first shunt grid line 61 and the third edge 15. Based on the above configuration, the carrier collection area can be widened, and the conversion efficiency of the back contact solar cell 200 can be improved. In addition, the accuracy of the reverse breakdown voltage can also be improved.

[0137] Accordingly, in one embodiment, the second shunt grid line 62 is disposed at the end of the negative grid line 32 near the fourth edge 16, that is, the positive grid line 31 and the negative grid line 32 are disposed on the side of the second shunt grid line 62 facing the third edge 15, and no other grid lines are disposed between the second shunt grid line 62 and the fourth edge 16, so as to improve conversion efficiency and test accuracy.

[0138] It is foreseeable that the first shunt gate line 61 and the second shunt gate line 62 do not contact the doped layer. Since the first shunt gate line 61 and the second shunt gate line 62 extend along the first direction, while the positive gate line 31 and the negative gate line 32 extend along the second direction, they are perpendicular to each other. If holes were made at the locations of the first shunt gate line 61 and the second shunt gate line 62, it would affect the laser drilling efficiency. Therefore, the areas of the first shunt gate line 61 and the second shunt gate line 62 do not have holes to contact the doped layer; they only serve the function of shunt / combination. At the same time, it is understandable that by increasing the number of first PAD points 51 and second PAD points 52, the impact of broken gates in the first shunt gate line 61 / second shunt gate line 62 on the test results can also be reduced.

[0139] Specifically, in one embodiment, when both the first PAD point 51 and the first shunt gate line 61 are positioned close to the third edge 15, the distance between the first PAD point 51 and the third edge 15 is controlled to be greater than the distance between the first shunt gate line 61 and the third edge 15. Since the first PAD point 51 is relatively large, excessive proximity to the third edge 15 can easily cause defects such as microcracks during printing. Furthermore, by controlling the first shunt gate line 61 to be closer to the third edge 15, a gap is formed between the first shunt gate line 61 and the first PAD point 51. A gate line can be positioned within this gap, further improving carrier collection efficiency and conversion efficiency. Specifically, based on this embodiment, the distance between the first PAD point 51 and the third edge 15 is controlled to be 3mm to 8mm, and the distance between the first shunt gate line 61 and the third edge 15 is controlled to be 0.2mm to 5mm.

[0140] Specifically, when a gap is formed between the first shunt gate line 61 and the first PAD point 51, the first shunt gate line 61 and the first PAD point 51 can be electrically connected through the first connecting gate line 71. Preferably, in one embodiment, the first connecting gate line 71 is located on the extension line of the first sub-positive gate line 311 to the third edge 15; that is, the first connecting gate line 71 is disposed above the first sub-doped layer 211 corresponding to the first sub-positive gate line 311, and then the first connecting gate line 71 can be connected to the first sub-doped layer 211 through the first hole 41, so that the first connecting gate line 71 can also collect carriers and improve the conversion efficiency.

[0141] Accordingly, in one embodiment, when both the second PAD point 52 and the second shunt gate line 62 are positioned close to the fourth edge 16, the distance between the second PAD point 52 and the fourth edge 16 is controlled to be greater than the distance between the second shunt gate line 62 and the fourth edge 16. Since the second PAD point 52 is relatively large, excessive proximity to the fourth edge 16 can easily cause defects such as microcracks during printing. Furthermore, by controlling the second shunt gate line 62 to be closer to the fourth edge 16, a gap is formed between the second shunt gate line 62 and the second PAD point 52. A gate line can be positioned within this gap, further improving carrier collection efficiency and conversion efficiency. Specifically, based on this embodiment, the distance between the second PAD point 52 and the fourth edge 16 is controlled to be 3mm to 8mm, and the distance between the second shunt gate line 62 and the fourth edge 16 is controlled to be 0.2mm to 5mm.

[0142] Specifically, when a gap is formed between the second shunt gate line 62 and the second PAD point 52, the second shunt gate line 62 and the second PAD point 52 can be electrically connected through the second connecting gate line 72. Preferably, in one embodiment, the second connecting gate line 72 is located on the extension line of the first sub-negative gate line 321 to the fourth edge 16; that is, the second connecting gate line 72 is disposed above the second sub-doped layer 221 corresponding to the first sub-negative gate line 321, and then the second connecting gate line 72 can be connected to the second sub-doped layer 221 through the second hole 42, so that the second connecting gate line 72 can also collect carriers and improve the conversion efficiency.

[0143] Specifically, in one embodiment, the positive gate line 31 further includes a second sub-positive gate line 312 disposed near the first sub-positive gate line 311; the first PAD point 51 is connected to the first sub-positive gate line 311 and at least two second sub-positive gate lines 312; the negative gate line 32 further includes a second sub-negative gate line 322 disposed near the first sub-negative gate line 321; the second PAD point 52 is electrically connected to the first sub-negative gate line 321 and at least two second sub-negative gate lines 322. Although the first PAD point 51 / second PAD point 52 can distribute the reverse current through the first shunt gate line 61 / second shunt gate line 62, the first shunt gate line 61 / second shunt gate line 62 is relatively narrow, resulting in high power consumption when the current density is too high. Therefore, the first PAD point 51 / second PAD point 52 is connected to at least three positive gate lines 31 / negative gate lines 32 to optimize the current distribution and improve the test accuracy. More preferably, the first PAD point 51 is electrically connected to one first sub-positive grid line 311 and two second sub-positive grid lines 312; the second PAD point 52 is electrically connected to one first sub-negative grid line 321 and two second sub-negative grid lines 322. When the number of grid lines connected is too large, the size of the first PAD point 51 and the second PAD point 52 is too large, occupying a large area of ​​the grid lines for collecting charge carriers, which is not conducive to improving the conversion efficiency.

[0144] Preferably, in one embodiment, a third sub-negative gate line 323 extending along a second direction is provided on at least one side of the first connecting gate line 71 in the first direction. The third sub-negative gate line 323 is electrically connected to at least one negative gate line 32 close to the first PAD point 51 and is insulated from the first PAD point 51. Through the third sub-negative gate line 323, charge carriers in the gap region between the first shunt gate line 61 and the first test PAD point can be collected, thereby improving the conversion efficiency. More preferably, in order to collect more charge carriers, the third sub-negative gate line 323 is disposed on the extension line of the first sub-negative gate line 321 or the second sub-negative gate line 322 connected to the second PAD point 52 towards the third edge 15; that is, the third sub-negative gate line 323 is disposed above the second doped layer 22 corresponding to the first sub-negative gate line 321 or the second sub-negative gate line 322, and then the third sub-negative gate line 323 is connected to the second doped layer 22 through the second hole 42, so that the third sub-negative gate line 323 collects more charge carriers and improves the conversion efficiency.

[0145] Accordingly, in one embodiment, a third sub-positive gate line 313 extending along the second direction is further provided on at least one side of the second connecting gate line 72 in the first direction. The third sub-positive gate line 313 is electrically connected to at least one positive gate line 31 near the second PAD point 52 and is insulated from the second PAD point 52. Through the third sub-positive gate line 313, charge carriers in the gap region between the second shunt gate line 62 and the second test PAD point can be collected, thereby improving the conversion efficiency. More preferably, in order to collect more charge carriers, the third sub-positive gate line 313 is disposed on the extension line of the first sub-positive gate line 311 or the second sub-positive gate line 312 connected to the first PAD point 51 toward the fourth edge 16; that is, the third sub-positive gate line 313 is disposed above the first doped layer 21 corresponding to the first sub-positive gate line 311 or the second sub-positive gate line 312, and then the third sub-positive gate line 313 is connected to the first doped layer 21 through the first hole 41 to collect more charge carriers and improve conversion efficiency.

[0146] Specifically, in this embodiment, each group of second PAD sections includes a third PAD point 53 and a fourth PAD point 54. The third PAD point 53 is electrically connected to at least one positive gate line 31 and is insulated from the negative gate line 32. The fourth PAD point 54 is electrically connected to at least one negative gate line and is insulated from the positive gate line 31. That is, the third PAD point 53 is used to connect the positive solder strip 300, while the fourth PAD point 54 is used to form the negative solder strip 300.

[0147] Specifically, in this embodiment, each group of second PADs may include 1 to 20 third PAD points 53 and 1 to 20 fourth PAD points 54. Preferably, the number of third PAD points 53 is 8 to 20, more preferably 12 to 20. Preferably, the number of fourth PAD points 54 is 8 to 20, more preferably 12 to 20.

[0148] Specifically, when a group of second PADs includes multiple third PAD points 53 and multiple fourth PAD points 54, the third PAD points 53 and fourth PAD points 54 are arranged alternately along the second direction. Based on this arrangement, the current transmission distance can be further optimized, losses reduced, and power increased. Furthermore, to simplify the electrode pattern and reduce printing stress, the multiple third PAD points 53 and fourth PAD points 54 in the same group are arranged in a row along the second direction.

[0149] The third PAD point 53 and the fourth PAD point 54 can be square, circular, triangular, or irregular in shape, but are not limited to these. Preferably, in one embodiment, the third PAD point 53 and the fourth PAD point 54 are square, with a width of 0.1mm to 1mm. This width ensures appropriate welding pull force and improves reliability.

[0150] Example 2

[0151] This embodiment provides a back-contact solar cell, see [link / reference] Figure 5 The difference between it and Example 1 is that:

[0152] The first PAD portion is only located within the first edge region 110 and / or the second edge region 130. The first PAD portion includes a first PAD point 51 and a second PAD point 52.

[0153] Specifically, a first sub-doped layer 211 and a second sub-doped layer 221 may be disposed in the first edge region 110 / second edge region 130. A first sub-positive gate line 311 is disposed above the first sub-doped layer 211, and a second sub-positive gate line 312 is disposed above the second sub-doped layer 221. Then, a first PAD point 51 is connected to the end of the first sub-positive gate line 311 near the third edge 15, and a second PAD point 52 is connected to the end of the first sub-negative gate line 321 near the fourth edge 16.

[0154] Specifically, based on this embodiment, a second PAD portion is further provided within the first edge region 110 and / or the second edge region 130. The second PAD portion includes a plurality of third PAD points 53 and a plurality of fourth PAD points 54. The third PAD points 53 and fourth PAD points 54 are arranged alternately along a second direction.

[0155] Furthermore, based on this embodiment, the first PAD point 51, the second PAD point 52, the third PAD point 53, and the fourth PAD point 54 located in the first edge region 110 / second edge region 130 can be arranged in a row, that is, the first PAD point 51 and the second PAD point 52 can be used for welding, thereby increasing the welding pull force and further reducing the influence of the first PAD part on carrier collection, thereby improving the conversion efficiency.

[0156] Furthermore, based on this embodiment, to further optimize test accuracy, the remaining plurality of first sub-positive gate lines 311 are electrically connected to the first PAD point 51 via the first shunt gate line 61, and the remaining plurality of first sub-negative gate lines 321 are electrically connected to the second PAD point 52 via the second shunt gate line 62. More preferably, all positive gate lines 31 can be electrically connected via the first shunt gate line 61, and all negative gate lines 32 can be electrically connected via the second shunt gate line 62.

[0157] Example 3

[0158] This embodiment provides a back-contact solar cell, see [link / reference] Figure 6 The difference between it and Example 1 is that:

[0159] The first PAD portion is only located within the first edge region 110 and / or the second edge region 130. The first PAD portion includes a first PAD point 51 and a second PAD point 52.

[0160] Specifically, in this embodiment, no first sub-doped layer 211 and second sub-doped layer 221 are disposed within the first edge region 110 / second edge region 130, that is, no first sub-positive gate line 311 and first sub-negative gate line 321 are disposed within the first edge region 110 / second edge region 130. Based on this implementation, the first PAD point 51 can be disposed at the end of the positive gate line 31 disposed within the first edge region 110 / second edge region 130 near the third edge 15, and it is electrically connected to the first sub-positive gate line 311 via the first shunt gate line 61. Similarly, the second PAD point 52 can be disposed at the end of the negative gate line 32 disposed within the first edge region 110 / second edge region 130 near the fourth edge 16, and it is electrically connected to the second sub-negative gate line 322 via the second shunt gate line 62. More preferably, in this embodiment, all the positive gate lines 31 can be electrically connected by the first shunt gate line 61, and all the negative gate lines 32 can be electrically connected by the second shunt gate line 62.

[0161] Specifically, based on this embodiment, a second PAD portion is also provided in the first edge region 110 and / or the second edge region 130. The second PAD portion includes a plurality of third PAD points 53 and a plurality of fourth PAD points 54. The third PAD points 53 and fourth PAD points 54 are arranged alternately along the second direction. It should be noted that since a large number of third PAD points 53 and fourth PAD points 54 are provided in the first edge region 110 / second edge region 130, and the third PAD points 53 need to contact the positive gate line, if the first sub-positive gate line 311 is provided in the first edge region 110 / second edge region 130, due to the existence of a composite leakage contact structure, the third PAD point 53 is more likely to contact the second doped layer 22, which may lead to leakage. Therefore, the first sub-positive gate line 311 and the second sub-negative gate line 322 are not provided in this region. In addition, since the area near the edge often produces more defects than the central area during the back contact battery manufacturing process, the leakage composite contact structure 24 is also prone to overall failure when placed in this area, and it is difficult to play a role in weakening the hot spot effect for a long time.

[0162] Furthermore, based on this embodiment, the first PAD point 51, the second PAD point 52, the third PAD point 53, and the fourth PAD point 54 located in the first edge region 110 / second edge region 130 can be arranged in a row, that is, the first PAD point 51 and the second PAD point 52 can be used for welding, thereby increasing the welding pull force and further reducing the influence of the first PAD part on carrier collection, thereby improving the conversion efficiency.

[0163] Example 4

[0164] This embodiment provides a back-contact solar cell 200, referenced... Figure 7 The difference between this embodiment and the first embodiment is that a first PAD portion is also provided in the first edge region 110 / second edge region 130, and the first PAD portion also includes a first PAD point 51 and a second PAD point 52.

[0165] Specifically, in one embodiment, a first sub-doped layer 211 and a second sub-doped layer 221 may be disposed in the first edge region 110 / second edge region 130. A first sub-positive gate line 311 is disposed above the first sub-doped layer 211, and a second sub-positive gate line 312 is disposed above the second sub-doped layer 221. A first PAD point 51 is then connected to the end of the first sub-positive gate line 311 near the third edge 15, and a second PAD point 52 is connected to the end of the first sub-negative gate line 321 near the fourth edge 16. Furthermore, based on this embodiment, to further optimize test accuracy, the remaining multiple first sub-positive gate lines 311 are electrically connected to the first PAD point 51 via a first shunt gate line 61, and the remaining multiple first sub-negative gate lines 321 are electrically connected to the second PAD point 52 via a second shunt gate line 62. More preferably, all the positive grid lines 31 can be electrically connected by the first shunt grid line 61, and all the negative grid lines 32 can be electrically connected by the second shunt grid line 62.

[0166] Specifically, in another embodiment, no first sub-doped layer 211 and second sub-doped layer 221 are disposed within the first edge region 110 / second edge region 130, that is, no first sub-positive gate line 311 and first sub-negative gate line 321 are disposed within the first edge region 110 / second edge region 130. Based on this embodiment, the first PAD point 51 can be disposed at the end of the positive gate line 31 disposed within the first edge region 110 / second edge region 130 near the third edge 15, and it is electrically connected to the first sub-positive gate line 311 via the first shunt gate line 61. Similarly, the second PAD point 52 can be disposed at the end of the negative gate line 32 disposed within the first edge region 110 / second edge region 130 near the fourth edge 16, and it is electrically connected to the second sub-negative gate line 322 via the second shunt gate line 62. More preferably, in this embodiment, all the positive gate lines 31 can be electrically connected by the first shunt gate line 61, and all the negative gate lines 32 can be electrically connected by the second shunt gate line 62.

[0167] Example 5

[0168] refer to Figure 8 and Figure 9This embodiment provides a battery string 400, which includes multiple back-contact solar cells 200 as described in Embodiments 1 to 4 of this utility model, or segments formed by cutting back-contact solar cells 200.

[0169] Specifically, in one embodiment, reference is made to... Figure 8 Adjacent back-contact solar cells 200 (or their segments) can be stacked to form a cell string 400, and connected in series or parallel via solder ribbon 300 or conductive adhesive, but are not limited thereto.

[0170] In another embodiment, reference Figure 9 Adjacent back-contact solar cells 200 (or their segments) can be connected in series or parallel using solder ribbons 300 and conductive adhesive, but are not limited to this. Correspondingly, since positive grid lines 31 and negative grid lines 32 are provided on the back of the back-contact solar cells, insulating adhesive or insulating blocks are needed to prevent the solder ribbons 300 from short-circuiting them, but are not limited to this. To secure the solder ribbons 300, adhesives (e.g., UV adhesive), solder paste, etc., are also needed. To secure the back-contact solar cells 200 of the cell string 400, adhesives, etc., are also introduced, but are not limited to this.

[0171] Example 6

[0172] refer to Figure 10 This embodiment provides a battery assembly 600, which includes at least one battery string 400 as in Embodiment 5 or at least one back-contact solar cell 200 as in Embodiments 1 to 4. Preferably, in one embodiment, the battery assembly 600 is composed of multiple battery strings 400 as described above, exemplarily 2 strings, 4 strings, 6 strings, or 12 strings, but not limited thereto. Multiple battery strings 400 can be connected in series or parallel via busbars 500, solder strips 300, or other conductive media to form the battery assembly 600. In addition, for the mechanical connection of multiple battery strings 400, and other usage requirements of the assembly 600 (such as the electrical connection of multiple battery assemblies 600, weather resistance, etc.), it is necessary to introduce components such as insulating adhesive, junction boxes, frames, backplates, films, and glass, but not limited thereto.

[0173] Example 7

[0174] refer to Figure 11 This embodiment provides a photovoltaic system, which includes the battery module 600 described in Embodiment Six. Multiple battery modules 600 can be connected in series or in parallel through a junction box to form a photovoltaic system. This photovoltaic system can be used in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants, and can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings, but is not limited thereto.

[0175] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with the described embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0176] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.

Claims

1. A back-contact solar cell, characterized in that, include: A silicon substrate, comprising a light-receiving surface and a back-lighting surface disposed opposite to each other; Multiple first doped layers and multiple second doped layers are disposed on the backlight surface, the multiple first doped layers and multiple second doped layers are alternately arranged along a first direction and extend along a second direction; the first doped layer includes at least one first sub-doped layer, and the second doped layer includes a second sub-doped layer disposed adjacent to the first sub-doped layer; the second sub-doped layer and the first sub-doped layer form a leakage current composite contact structure at a preset position; Multiple positive gate lines and multiple negative gate lines are provided, wherein the positive gate lines are disposed on the first doped layer and the negative gate lines are disposed on the second doped layer; the positive gate lines include a first sub-positive gate line disposed on the first sub-doped layer and the negative gate lines include a first sub-negative gate line disposed on the second sub-doped layer. At least one set of first PAD sections, each set of first PAD sections includes a first PAD point and a second PAD point, the first PAD point is electrically connected to the first sub-positive grid line, and the second PAD point is electrically connected to the first sub-negative grid line.

2. The back-contact solar cell as described in claim 1, characterized in that, The silicon substrate has a first edge and a second edge disposed opposite to each other in a first direction; along the direction from the first edge toward the second edge, the backlight surface includes a first edge region, a middle region, and a second edge region; The first PAD is located within the first edge region and the second edge region; or The first PAD is located within the intermediate region; or The first PAD is located in the first edge region, the middle region, and the second edge region.

3. The back-contact solar cell as described in claim 2, characterized in that, The first PAD portion is only located in the first edge region and the second edge region.

4. The back-contact solar cell as described in claim 2 or 3, characterized in that, A second PAD portion is also provided in the first edge region and / or the second edge region; The second PAD portion includes a third PAD point and a fourth PAD point. The third PAD point is electrically connected to the positive grid line, and the fourth PAD point is electrically connected to the negative grid line.

5. The back-contact solar cell as described in claim 4, characterized in that, The silicon substrate has a third edge and a fourth edge that are disposed opposite to each other in a second direction; A first PAD point located in the first edge region and the second edge region of the first PAD portion is positioned near the third edge, and a second PAD point located in the first edge region and the second edge region of the first PAD portion is positioned near the fourth edge; No third or fourth PAD point is provided between the first PAD point and the third edge; No third or fourth PAD point is provided between the second PAD point and the fourth edge.

6. The back-contact solar cell as described in claim 5, characterized in that, A first PAD point located in the first PAD portion within the intermediate region is positioned near the third edge, and a second PAD point located in the first PAD portion within the intermediate region is positioned near the fourth edge.

7. The back-contact solar cell as described in claim 1, characterized in that, The first doped layer includes 5 to 20 first sub-doped layers, each of which has a first sub-positive gate line and each first sub-positive gate line is connected to a first PAD point; The second doped layer includes 5 to 20 second sub-doped layers, each of which has a first sub-negative gate line, and each first sub-negative gate line is connected to a second PAD point.

8. The back-contact solar cell as described in claim 1, characterized in that, The first doped layer includes 5 to 20 first sub-doped layers, which are distributed along a first direction; each first sub-doped layer is provided with a first sub-positive gate line, and a first PAD point is provided every other first sub-positive gate line; The second doped layer includes 5 to 40 second sub-doped layers, which are distributed along the first direction. Each second sub-doped layer is provided with a first sub-negative gate line, and a second PAD point is provided every other first sub-negative gate line.

9. The back-contact solar cell as described in claim 1, characterized in that, The width of the first sub-positive gate line is greater than the width of the other positive gate lines.

10. The back-contact solar cell as described in claim 1, characterized in that, Includes the first PAD section of groups 1 to 12.

11. The back-contact solar cell as described in claim 1, characterized in that, Also includes: A first shunt gate line and a second shunt gate line, wherein the first shunt gate line is electrically connected to a plurality of positive gate lines and the second shunt gate line is electrically connected to a plurality of negative gate lines; The first shunt gate line is electrically connected to the first PAD point, and the second shunt gate line is electrically connected to the second PAD point.

12. The back-contact solar cell as described in claim 3, characterized in that, Also includes: The first shunt gate line and the second shunt gate line are electrically connected. The first shunt gate line electrically connects all the positive gate lines located on the backlight surface, and the second shunt gate line electrically connects all the negative gate lines located on the backlight surface. The first shunt gate line is electrically connected to the first PAD point, and the second shunt gate line is electrically connected to the second PAD point.

13. The back-contact solar cell as described in claim 11 or 12, characterized in that, The silicon substrate has a third edge and a fourth edge that are disposed opposite to each other in a second direction; The first shunt gate line is disposed near the third edge, and the second shunt gate line is disposed near the fourth edge.

14. The back-contact solar cell as described in claim 13, characterized in that, The positive and negative grid lines are located on the side of the first shunt grid line facing the fourth edge; The positive and negative grid lines are located on the side of the second shunt grid line facing the third edge.

15. The back-contact solar cell as described in claim 13, characterized in that, The distance between the first PAD point and the third edge is greater than the distance between the first shunt grid line and the third edge; The distance between the second PAD point and the fourth edge is greater than the distance between the second shunt grid line and the fourth edge.

16. The back-contact solar cell as described in claim 13, characterized in that, The distance between the first PAD point and the third edge is 3mm to 5mm; the distance between the second PAD point and the fourth edge is 3mm to 5mm; The distance between the first shunt grid line and the third edge is 0.2mm to 2mm, and the distance between the second shunt grid line and the fourth edge is 0.2mm to 2mm.

17. The back-contact solar cell as described in claim 13, characterized in that, The first PAD point is electrically connected to the first shunt grid line through the first connecting grid line; The second PAD point is electrically connected to the second shunt grid line through the second connecting grid line.

18. The back-contact solar cell as described in claim 17, characterized in that, The first connecting gate line is located on the extension line of the first sub-positive gate line to the third edge; The second connecting gate line is located on the extension line of the first sub-negative gate line to the fourth edge.

19. The back-contact solar cell as described in claim 1, characterized in that, The first PAD point is located at the end of the first sub-positive grid line and is electrically connected to the first sub-positive grid line. The second PAD point is located at the end of the first sub-negative grid line and is electrically connected to the first sub-negative grid line.

20. The back-contact solar cell as described in claim 17, characterized in that, The positive electrode grid line also includes a second sub-positive electrode grid line disposed close to the first sub-positive electrode grid line; the first PAD point is connected to the first sub-positive electrode grid line and at least two second sub-positive electrode grid lines; The negative grid line also includes a second sub-negative grid line located close to the first sub-negative grid line; the second PAD point is electrically connected to the first sub-negative grid line and at least two second sub-negative grid lines.

21. The back-contact solar cell as described in claim 20, characterized in that, The first connecting gate line is further provided with a third sub-negative gate line extending in the second direction on at least one side in the first direction. The third sub-negative gate line is electrically connected to at least one negative gate line close to the first PAD point and is insulated from the first PAD point. The second connecting grid line is further provided with a third sub-positive grid line extending along the second direction on at least one side in the first direction. The third sub-positive grid line is electrically connected to at least one positive grid line near the second PAD point and is insulated from the second PAD point.

22. The back-contact solar cell as described in claim 21, characterized in that, The third sub-negative grid line is located on the extension line of the first sub-negative grid line connected to the second PAD point towards the third edge; and / or The third sub-positive grid line is located on the extension line of the first sub-positive grid line connected to the first PAD point to the fourth edge.

23. The back-contact solar cell as described in claim 1, characterized in that, The first PAD point and the second PAD point are square, circular, triangular or irregular in shape.

24. The back-contact solar cell as described in claim 1, characterized in that, The first PAD point and the second PAD point are square, with a width of 0.1mm to 1mm.

25. The back-contact solar cell as described in claim 4, characterized in that, The second PAD portion includes multiple third PAD points and multiple fourth PAD points, which are arranged alternately along the second direction.

26. The back-contact solar cell as described in claim 3, characterized in that, A second PAD portion is further provided in the first edge region and / or the second edge region; the second PAD portion includes a third PAD point and a fourth PAD point, the third PAD point being electrically connected to the positive grid line, and the fourth PAD point being electrically connected to the negative grid line; The first PAD point and the second PAD point located within the first edge area are arranged in a row with the third PAD point and the fourth PAD point located within the first edge area; The first PAD point and the second PAD point located within the second edge region are arranged in a row with the third PAD point and the fourth PAD point located within the second edge region.

27. A battery string, characterized in that, Including the back-contact solar cell as described in any one of claims 1 to 26.

28. A battery assembly, characterized in that, Includes the back-contact solar cell as described in any one of claims 1 to 26 or the battery string as described in claim 27.

29. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 28.

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