Voltage reference chip control post-stage load power supply circuit

Abstract

The utility model relates to the technical field of battery packs, in particular to a voltage reference chip control post-stage load power supply circuit. The device is characterized by comprising a voltage reference chip U1, a controllable end of the voltage reference chip U1 is adaptively connected with a battery pack positive electrode B + and a battery pack negative electrode GND, the voltage reference chip U1 is used for collecting voltage information of a battery pack, and when the voltage of the battery pack is larger than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is switched on; the positive electrode B + of the battery pack is adaptively connected with the power supply port P + of the rear-stage load, the power supply port P-of the rear-stage load is connected with the negative electrode GND of the battery pack through the switch module, the voltage reference chip U1 is adaptively connected with the switch module, and after the voltage reference chip U1 is switched on, the switch module is switched on. The circuit is high in precision and low in cost.

Description

Technical Field

[0001] This utility model relates to the field of battery pack technology, specifically to a voltage reference chip controlling a downstream load power supply circuit. Background Technology

[0002] To control the power supply to downstream loads and effectively address the issue of battery pack over-discharge, existing technologies typically employ a microcontroller to detect voltage signals and use an AD port to shut off the load power supply. However, this method, implemented through microcontroller software, suffers from response delays and increases the overall circuit cost. Utility Model Content

[0003] The technical problem to be solved by this utility model is to provide a voltage reference chip control circuit for the subsequent load power supply circuit, which has high accuracy and low cost.

[0004] To solve the above problems, the following technical solutions are provided:

[0005] The voltage reference chip controlling the power supply circuit of the downstream load of this utility model is characterized by including a voltage reference chip U1. The controllable terminal of the voltage reference chip U1 is adapted to be connected to the positive terminal B+ and the negative terminal GND of the battery pack, and is used to collect the voltage information of the battery pack. When the voltage of the battery pack is greater than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is turned on. The positive terminal B+ of the battery pack is adapted to be connected to the downstream load power supply port P+, and the downstream load power supply port P- is connected to the negative terminal GND of the battery pack through a switching module. The voltage reference chip U1 is adapted to be connected to the switching module. When the voltage reference chip U1 is turned on, the switching module is turned on.

[0006] The controllable terminal of the voltage reference chip U1 is connected to one end of resistor R2 and one end of resistor R5, respectively. The other end of resistor R2 is connected to the cathode of diode D1, and the anode of diode D1 is connected to the positive terminal B+ of the battery pack. The other end of resistor R5 is connected to the negative terminal GND of the battery pack.

[0007] The switching module includes a transistor Q1 and an NMOS transistor Q2. The emitter of transistor Q1 is connected to the cathode of diode D1. The base of transistor Q1 is connected to one end of resistors R1 and R3, respectively. The other end of resistor R1 is connected to the cathode of diode D1. The other end of resistor R3 is connected to the cathode of voltage reference chip U1. The anode of voltage reference chip U1 is connected to the negative terminal GND of the battery pack. The collector of transistor Q1 is connected to one end of resistor R4. The other end of resistor R4 is connected to the gate of NMOS transistor Q2 and one end of resistor R6, respectively. The other end of resistor R6 is connected to the negative terminal GND of the battery pack. The source of NMOS transistor Q2 is connected to the negative terminal GND of the battery pack. The drain of NMOS transistor Q2 is connected to the load power supply port P-.

[0008] The load power supply port P+ is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is connected to the load power supply port P-.

[0009] The voltage reference chip U1 is model CJ431.

[0010] The above approach has the following advantages:

[0011] Because the controllable terminal of the voltage reference chip U1 in this invention's voltage reference chip control downstream load power supply circuit is adapted to connect to the positive terminal B+ and the negative terminal GND of the battery pack, and the positive terminal B+ of the battery pack is adapted to connect to the downstream load power supply port P+, and the downstream load power supply port P- is connected to the negative terminal GND of the battery pack through a switching module, and the voltage reference chip U1 is adapted to connect to the switching module, when the voltage reference chip U1 is turned on, the switching module is turned on. In use, when the battery pack voltage is greater than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is turned on, the switching module is turned on, the negative terminal GND of the battery pack is connected to the downstream load power supply port P-, and the downstream load power supply P+ and P- have voltage output, thus achieving load power supply. When the battery pack voltage is less than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is closed, the switching module is closed, and the downstream load power supply P+ and P- have no voltage output. Using this power supply circuit ensures that the battery pack voltage will not fall significantly below the reference voltage of the voltage reference chip U1, thereby avoiding over-discharge problems. Meanwhile, control using voltage reference chips offers high precision and good reliability, and voltage reference chips are cheaper than microcontrollers, thus reducing costs. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the voltage reference chip controlling the power supply circuit of the subsequent load in this utility model. Detailed Implementation

[0013] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0014] like Figure 1 As shown, the voltage reference chip controlling the power supply circuit of the downstream load in this utility model includes a voltage reference chip U1, model number CJ431. The controllable terminal of the voltage reference chip U1 is adapted and connected to the positive terminal B+ and the negative terminal GND of the battery pack, used to collect the voltage information of the battery pack. When the voltage of the battery pack is greater than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is turned on. The positive terminal B+ of the battery pack is adapted and connected to the downstream load power supply port P+, and the downstream load power supply port P- is connected to the negative terminal GND of the battery pack through a switching module. The voltage reference chip U1 is adapted and connected to the switching module. When the voltage reference chip U1 is turned on, the switching module is turned on.

[0015] In this embodiment, as Figure 1 As shown, the controllable terminal of voltage reference chip U1 is connected to one end of resistor R2 and one end of resistor R5, respectively. The other end of resistor R2 is connected to the cathode of diode D1, and the anode of diode D1 is connected to the positive terminal B+ of the battery pack. The other end of resistor R5 is connected to the negative terminal GND of the battery pack. The switching module includes transistor Q1 and NMOS transistor Q2. The emitter of transistor Q1 is connected to the cathode of diode D1. The base of transistor Q1 is connected to one end of resistor R1 and one end of resistor R3, respectively. The other end of resistor R1 is connected to the cathode of diode D1. The other end of resistor R3 is connected to the cathode of voltage reference chip U1, and the anode of voltage reference chip U1 is connected to the negative terminal GND of the battery pack. The collector of transistor Q1 is connected to one end of resistor R4. The other end of resistor R4 is connected to the gate of NMOS transistor Q2 and one end of resistor R6, respectively. The other end of resistor R6 is connected to the negative terminal GND of the battery pack. The source of NMOS transistor Q2 is connected to the negative terminal GND of the battery pack, and the drain of NMOS transistor Q2 is connected to the load power supply port P-.

[0016] In this embodiment, as Figure 1 As shown, the load power supply port P+ is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is connected to the load power supply port P-. Reverse connection protection is achieved using diode D2.

[0017] In this embodiment, resistors R2 and R5 form a voltage divider resistor. When in use, when the voltage of the battery pack is greater than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is turned on, that is, U1 works. A circuit is formed from the positive terminal B+ of the battery pack, diode D1, resistor R1, resistor R3, voltage reference chip U1 to the negative terminal B- of the battery pack. The base voltage of transistor Q1 is pulled low, and transistor Q1 is turned on. A circuit is formed from the positive terminal B+ of the battery pack, diode D1, transistor Q1, resistor R4, resistor R6 to the negative terminal B- of the battery pack. The gate of NMOS transistor Q2 is pulled high, and NMOS transistor Q2 is turned on. The negative terminal GND of the battery pack is connected to P-, and the downstream load is powered by P+, and P- has a voltage output. When the voltage of the battery pack is less than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is closed, the base of transistor Q1 is pulled high, transistor Q1 is closed, the gate of NMOS transistor Q2 is pulled low, NMOS transistor Q2 is closed, the negative terminal GND of the battery pack is not disconnected from P-, the power supply P+ of the subsequent load has no voltage output, thus achieving overvoltage protection.

[0018] This invention utilizes a voltage reference chip to control the power supply circuit of the subsequent load, achieving precise and reliable voltage control through pure hardware. This improves system stability, timeliness, and reduces costs. Simultaneously, the voltage reference chip consumes significantly less power than a microcontroller, thereby reducing battery pack power consumption and saving energy.

Claims

1. A voltage reference chip control circuit for power supply to a downstream load, characterized in that, The system includes a voltage reference chip U1, whose controllable terminal is adapted to connect to the positive terminal B+ and the negative terminal GND of the battery pack for collecting battery pack voltage information. When the battery pack voltage is greater than the reference voltage of the voltage reference chip U1, the voltage reference chip U1 is turned on. The positive terminal B+ of the battery pack is adapted to connect to the downstream load power supply port P+, and the downstream load power supply port P- is connected to the negative terminal GND of the battery pack through a switching module. The voltage reference chip U1 is adapted to connect to the switching module. When the voltage reference chip U1 is turned on, the switching module is turned on.

2. The voltage reference chip control downstream load power supply circuit as described in claim 1, characterized in that, The controllable terminal of the voltage reference chip U1 is connected to one end of resistor R2 and one end of resistor R5, respectively. The other end of resistor R2 is connected to the cathode of diode D1, and the anode of diode D1 is connected to the positive terminal B+ of the battery pack. The other end of resistor R5 is connected to the negative terminal GND of the battery pack.

3. The voltage reference chip control downstream load power supply circuit as described in claim 2, characterized in that, The switching module includes a transistor Q1 and an NMOS transistor Q2. The emitter of transistor Q1 is connected to the cathode of diode D1. The base of transistor Q1 is connected to one end of resistors R1 and R3, respectively. The other end of resistor R1 is connected to the cathode of diode D1. The other end of resistor R3 is connected to the cathode of voltage reference chip U1. The anode of voltage reference chip U1 is connected to the negative terminal GND of the battery pack. The collector of transistor Q1 is connected to one end of resistor R4. The other end of resistor R4 is connected to the gate of NMOS transistor Q2 and one end of resistor R6, respectively. The other end of resistor R6 is connected to the negative terminal GND of the battery pack. The source of NMOS transistor Q2 is connected to the negative terminal GND of the battery pack. The drain of NMOS transistor Q2 is connected to the load power supply port P-.

4. The voltage reference chip control downstream load power supply circuit as described in claim 2, characterized in that, The load power supply port P+ is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is connected to the load power supply port P-.

5. The voltage reference chip control downstream load power supply circuit as described in claim 1, characterized in that, The voltage reference chip U1 is model CJ431.

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