Testing device for radar detection

Abstract

The utility model relates to a testing device for radar detection, belongs to the technical field of radar testing, and solves the problems of complexity and low testing efficiency of a testing device in the prior art. The device comprises an upper computer, a radar, a radar receiver, a signal processor and a target detection unit, the upper computer is electrically connected with the radar; the radar is electrically connected with the radar receiver; the radar receiver is electrically connected with the signal processor, and the signal processor is electrically connected with the target detection unit; the signal processor and the target detection unit are electrically connected with the upper computer. And convenient and efficient radar detection test is realized.

Description

Technical Field

[0001] This utility model relates to the field of radar testing technology, and in particular to a testing device for radar detection. Background Technology

[0002] Radar detection technology plays an increasingly important role in both military and civilian fields. With the diversification of targets and the increasing complexity of environments, higher demands are being placed on the resolution and accuracy of radar detection systems.

[0003] Existing radar detection and testing equipment has a complex structure, low efficiency in processing radar echo signals, and low data processing capabilities, making it difficult to achieve real-time target detection, tracking, and identification.

[0004] Moreover, before testing can begin, specific parameter values ​​need to be manually set into the radar system, and professionals are required to understand the meaning of these parameters in order for the radar to operate as expected. This not only increases testing time but also raises labor costs. Utility Model Content

[0005] Based on the above analysis, the present invention aims to provide a testing device for radar detection, in order to solve the problems of complexity and low testing efficiency of existing radar testing devices.

[0006] The objective of this utility model is mainly achieved through the following technical solutions:

[0007] A testing device for radar detection includes: a host computer, a radar, a radar receiver, a signal processor, and a target detection unit; the host computer is electrically connected to the radar; the radar is electrically connected to the radar receiver; the radar receiver is electrically connected to the signal processor, and the signal processor is electrically connected to the target detection unit; both the signal processor and the target detection unit are electrically connected to the host computer.

[0008] Based on the further improvement of the above scheme, the host computer integrates a 1553B bus interface board, which communicates with the radar's main control board.

[0009] Based on the above scheme, a further improvement is made to the signal processor, which is a PCB board that integrates an A / D converter, a matched filter, and a Doppler filter bank.

[0010] Based on further improvements to the above scheme, an A / D converter is used to convert analog signals into digital signals; a matched filter is used to generate pulse compression; and a Doppler filter bank is used to separate signals with different Doppler frequencies.

[0011] Based on the further improvement of the above scheme, the target detection unit includes an FPGA chip and a Flash memory chip; the FPGA chip is connected to the Flash memory chip through an SPI interface.

[0012] Based on the further improvements to the above scheme, the target detection unit is connected to the host computer via a UART interface.

[0013] Based on further improvements to the above scheme, the radar receiver includes multiple interfaces: a CAN bus interface, a discrete quantity interface, and an asynchronous bus interface.

[0014] Based on further improvements to the above scheme, the host computer includes a data display component for displaying the results fed back by the signal processor and the target detection unit; the signal processor and the target detection unit are connected to the data display component.

[0015] Based on further improvements to the above scheme, the host computer includes a binding parameter import component and a binding parameter sending component.

[0016] Based on the above scheme, a further improvement is made to the binding parameter import component, which is used to import an Excel spreadsheet and obtain the binding parameters therein; and the binding parameter sending component is used to send the binding parameters to the radar.

[0017] Compared with the prior art, this utility model can achieve at least one of the following beneficial effects: it proposes an integrated testing device for radar detection, which simplifies the device architecture and makes operation convenient; it allows for quick and flexible setting of radar status through components in the host computer, resulting in high testing efficiency and easy adjustment; it improves the accuracy of target signal processing by utilizing a signal processor and performs real-time target identification by utilizing a target detection unit, making it suitable for test scenarios with dynamically changing targets and improving the stability and reliability of the testing device.

[0018] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages will become apparent from the description or be learned by practicing this invention. The objectives and other advantages of this invention can be realized and obtained from the details specifically pointed out in the text and accompanying drawings. Attached Figure Description

[0019] The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0020] Figure 1 This is a schematic diagram of a test device for radar detection according to an embodiment of the present invention. Detailed Implementation

[0021] The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which constitute a part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0022] A specific embodiment of this utility model discloses a testing device for radar detection, such as... Figure 1 As shown, it includes:

[0023] The system includes a host computer, radar, radar receiver, signal processor, and target detection unit. The host computer is electrically connected to the radar. The radar is electrically connected to the radar receiver. The radar receiver is electrically connected to the signal processor, and the signal processor is electrically connected to the target detection unit. Both the signal processor and the target detection unit are electrically connected to the host computer.

[0024] Specifically, the host computer integrates a 1553B bus interface board, which communicates with the radar's main control board.

[0025] Furthermore, the host computer includes a binding parameter import component and a binding parameter sending component.

[0026] Specifically, the binding parameter import component is used to import an Excel spreadsheet and retrieve the binding parameters from it, storing them in memory. The Excel spreadsheet has eight columns: Description, Value, Valid Range, Data Precision, Scale, Remarks 1, Remarks 2, and Serial Number. The first column, "Description," describes the name of the parameter to be bound; the second column, "Value," describes the actual value of the parameter; the third column, "Valid Range," describes the upper and lower limits of the parameter; the fourth column, "Data Precision," describes the data type of the parameter, such as "signed 8-bit" or "signed 16-bit"; the fifth column, "Scale," describes the conversion scale for converting the parameter into machine code, which is the value sent to the radar; the sixth column, "Remarks 1," and the seventh column, "Remarks 2," describe and explain the parameter, respectively; and the eighth column, "Serial Number," identifies the order in which the parameter is located.

[0027] The binding parameter sending component is used to retrieve binding parameters from memory and send them to the radar; the radar is set according to the binding parameters and begins to detect targets, and the radar receiver is electrically connected to the radar.

[0028] Specifically, the radar receiver receives radar echo signals, which are then processed by a low-noise amplifier, multiple anti-aliasing filters, a mixer, an intermediate frequency (IF) amplifier filter, and an automatic gain control circuit before outputting a stable IF signal to the signal processor. The radar receiver also includes multiple interfaces: a CAN bus interface, a discrete input interface, and an asynchronous bus interface.

[0029] The signal processor is a PCB board that integrates an A / D converter, a matched filter, and a Doppler filter bank. The A / D converter converts analog signals to digital signals; the matched filter generates pulse compression to improve the signal-to-noise ratio and enhance the radar's range resolution; and the Doppler filter bank separates signals at different Doppler frequencies to extract velocity information. This information is crucial for radar target detection and tracking.

[0030] It should be noted that the host computer also includes a data display component. The signal processor is connected to the data display component and sends the processed signal to the host computer. The key information is then extracted and displayed in the data display component.

[0031] Furthermore, the signal processor is electrically connected to the target detection unit, which includes an FPGA chip and a Flash memory chip; the FPGA chip is connected to the Flash memory chip via an SPI interface.

[0032] Specifically, the FPGA chip integrates a target detection program based on a deep learning network, which is used to detect targets using the deep learning network based on the received signals. The Flash memory chip is used to store each received signal and the corresponding detection result.

[0033] Preferably, the target detection unit is connected to the data display component of the host computer via a UART interface, and after sending the detection results to the data display component, they are displayed in the data display component.

[0034] Compared with existing technologies, the radar detection test device provided in this embodiment is an integrated test device that simplifies the device architecture and makes operation convenient. The radar status can be quickly and flexibly set through the components in the host computer, resulting in high testing efficiency and easy adjustment. The signal processor improves the accuracy of target signal processing, and the target detection unit performs real-time target identification, making it suitable for test scenarios with dynamically changing targets and improving the stability and reliability of the test device.

[0035] Those skilled in the art will understand that the programs / software involved in the target detection in the binding parameter import component, binding parameter sending component, data display component, and target detection unit in the above embodiments are common methods in the prior art, and this utility model does not involve any software improvements. This utility model only requires connecting the various devices with corresponding functions through the connection relationships given in the embodiments of this utility model, which does not involve any program or software improvements. As for the connection methods between the various hardware devices with corresponding functions, they can all be implemented by those skilled in the art using existing technology, and will not be described in detail here.

[0036] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present utility model should be included within the protection scope of the present utility model.

Claims

1. A testing device for radar detection, characterized in that, include: The system includes a host computer, a radar, a radar receiver, a signal processor, and a target detection unit; the host computer is electrically connected to the radar; the radar is electrically connected to the radar receiver. The radar receiver is electrically connected to the signal processor, and the signal processor is electrically connected to the target detection unit; both the signal processor and the target detection unit are electrically connected to the host computer.

2. The testing apparatus for radar detection according to claim 1, characterized in that, The host computer integrates a 1553B bus interface board, which communicates with the radar's main control board.

3. The testing apparatus for radar detection according to claim 1, characterized in that, The signal processor is a PCB board that integrates an A / D converter, a matched filter, and a Doppler filter bank.

4. The testing apparatus for radar detection according to claim 3, characterized in that, The A / D converter is used to convert analog signals into digital signals; the matched filter is used to generate pulse compression; and the Doppler filter bank is used to separate signals with different Doppler frequencies.

5. The testing apparatus for radar detection according to claim 1, characterized in that, The target detection unit includes an FPGA chip and a Flash memory chip; the FPGA chip is connected to the Flash memory chip via an SPI interface.

6. The testing apparatus for radar detection according to claim 4, characterized in that, The target detection unit is connected to the host computer via a UART interface.

7. The testing apparatus for radar detection according to claim 1, characterized in that, The radar receiver includes multiple interfaces: a CAN bus interface, a discrete quantity interface, and an asynchronous bus interface.

8. The testing apparatus for radar detection according to claim 7, characterized in that, The host computer includes a data display component for displaying the results fed back by the signal processor and the target detection unit; the signal processor and the target detection unit are connected to the data display component.

9. The testing apparatus for radar detection according to claim 7, characterized in that, The host computer includes a binding parameter import component and a binding parameter sending component.

10. The testing apparatus for radar detection according to claim 9, characterized in that, The binding parameter import component is used to import an Excel spreadsheet and obtain the binding parameters therein; the binding parameter sending component is used to send the binding parameters to the radar.

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