Explosion-proof system for electrolytic capacitor

Abstract

The utility model relates to the technical field of power supply protection, and discloses an electrolytic capacitor explosion-proof system, which comprises a voltage acquisition module respectively connected with a midpoint end, a positive end and a negative end of an electrolytic capacitor plate, and used for acquiring and outputting an upper half input voltage and a lower half input voltage of the electrolytic capacitor plate; the detection module is connected with the voltage acquisition module, receives the upper half input voltage and the lower half input voltage, respectively judges whether the upper half input voltage and the lower half input voltage are greater than a preset voltage value or not, obtains a detection result, and outputs an explosion-proof signal of the detection result; the driving module is connected with the detection module, receives the explosion-proof signal and outputs a driving signal of the explosion-proof signal; and the relay is connected between the midpoint end of the electrolytic capacitor plate and the midpoint end of the power plate, is connected with the driving module, and is used for receiving the driving signal and disconnecting the driving signal so as to disconnect the midpoint end of the electrolytic capacitor plate for explosion-proof protection. The problem that explosion and fire are caused when the capacitor voltage is too high is solved.

Description

Technical Field

[0001] This utility model relates to the field of power supply protection technology, specifically to an explosion-proof system for electrolytic capacitors. Background Technology

[0002] A photovoltaic inverter is an inverter that converts the variable DC voltage generated by photovoltaic (PV) solar panels into AC power at the mains frequency.

[0003] When a short circuit occurs in the upper half of the photovoltaic inverter (the bus in the power system) or the lower half of the inverter, the voltage of the other half of the inverter rises beyond the range, or when the inverter malfunctions and causes the output voltage to flow back, the capacitor voltage becomes too high, leading to an explosion and fire. Utility Model Content

[0004] In view of this, the present invention provides an explosion-proof system for electrolytic capacitors to solve the problem of explosion and fire caused by excessively high capacitor voltage in the prior art.

[0005] In a first aspect, this utility model provides an explosion-proof system for electrolytic capacitors, the system comprising:

[0006] The voltage acquisition module is connected to the midpoint, positive terminal, and negative terminal of the electrolytic capacitor plate, respectively, and is used to acquire and output the upper half input voltage and lower half input voltage of the electrolytic capacitor plate.

[0007] The detection module is connected to the voltage acquisition module and is used to receive the upper half input voltage and the lower half input voltage. When it is determined that the upper half input voltage and / or the lower half input voltage is greater than the preset voltage value, an explosion-proof signal is output.

[0008] The drive module is connected to the detection module and is used to receive explosion-proof signals and output drive signals for explosion-proof signals.

[0009] A relay is connected between the midpoint of the electrolytic capacitor board and the midpoint of the power board. The first and second control terminals of the relay are connected to the drive module. The relay is used to receive drive signals and disconnect to disconnect the midpoint of the electrolytic capacitor board for explosion-proof protection.

[0010] The electrolytic capacitor explosion-proof system provided in this embodiment has a voltage acquisition module that acquires the upper half input voltage and the lower half input voltage respectively. When the detection module detects that the upper half input voltage and / or the lower half input voltage is higher than the preset voltage value, it controls the drive module to disconnect the relay, thereby disconnecting the midpoint input of the electrolytic capacitor plate, so that the upper half BUS and the lower half BUS bear the voltage together, thus playing a protective role.

[0011] In one alternative implementation, the system further includes:

[0012] A fuse is connected in parallel with a relay to blow the circuit after the relay is disconnected. The fuse clamps the voltage across the relay to ensure that the relay achieves zero-voltage shutdown regulation.

[0013] In one optional implementation, the voltage acquisition module includes:

[0014] The upper half voltage acquisition unit has its first input terminal connected to the positive terminal of the electrolytic capacitor plate, its second input terminal connected to the midpoint of the electrolytic capacitor plate, and its output terminal connected to the detection module. It is used to acquire the upper half input voltage and output the upper half input voltage to the detection module.

[0015] The lower half voltage acquisition unit has its first input terminal connected to the midpoint of the electrolytic capacitor plate, its second input terminal connected to the negative terminal of the electrolytic capacitor plate, and its output terminal connected to the detection module. It is used to acquire the lower half input voltage and output the lower half input voltage to the detection module.

[0016] In one optional embodiment, the upper half-voltage acquisition unit and the lower half-voltage acquisition unit each include:

[0017] The first resistor, the first end of the first resistor is the first input terminal of the upper half voltage acquisition unit, or the first end of the first resistor is the first input terminal of the lower half voltage acquisition unit;

[0018] The second resistor has its first end serving as the second input terminal of the upper half-voltage acquisition unit, or its first end serving as the second input terminal of the lower half-voltage acquisition unit.

[0019] An operational amplifier, the first input terminal of which is connected to the second terminal of the first resistor, the second input terminal of which is connected to the second terminal of the second resistor, and the output terminal of which is connected to the detection module.

[0020] The third resistor has its first end connected to the first input terminal of the operational amplifier, and its second end grounded.

[0021] The fourth resistor has its first end connected to the second input terminal of the operational amplifier and its second end connected to the output terminal of the operational amplifier.

[0022] The first capacitor has its first terminal connected to the first terminal of the third resistor, and its second terminal is connected to the second terminal of the third resistor.

[0023] The second capacitor has its first terminal connected to the first terminal of the fourth resistor, and its second terminal connected to the second terminal of the fourth resistor.

[0024] In one optional implementation, the detection module includes:

[0025] The first detection unit has its first input terminal connected to the first output terminal of the voltage acquisition module and its second input terminal connected to the first preset reference voltage terminal. It is used to receive the upper half input voltage, detect whether the upper half input voltage is greater than the preset voltage value, and output the upper half input voltage detection result.

[0026] The second detection unit has its first input terminal connected to the second output terminal of the voltage acquisition module and its second input terminal connected to the first preset reference voltage terminal. It is used to receive the lower half input voltage, detect whether the lower half input voltage is greater than the preset voltage value, and output the lower half input voltage detection result.

[0027] The logic operation unit is connected to the output terminals of the first detection unit, the second detection unit, and the driving module, respectively. It is used to receive the upper half input voltage detection results and the lower half input voltage detection results, perform logic operations on the upper half input voltage detection results and the lower half input voltage detection results to obtain the logic operation result, and output an explosion-proof signal when the logic operation result is the preset detection result.

[0028] In one optional implementation, each of the first detection unit and the second detection unit includes:

[0029] The fifth resistor has its first end serving as the first input terminal of the first detection unit, or the first end of the fifth resistor serving as the first input terminal of the second detection unit.

[0030] The comparator's first input terminal is connected to the second terminal of the fifth resistor;

[0031] The sixth resistor has its first terminal connected to the second input terminal of the comparator, and its second terminal grounded.

[0032] The seventh resistor has its first end connected to the second input terminal of the comparator and its second end connected to the first preset reference voltage terminal.

[0033] The eighth resistor has its first terminal connected to the second input terminal of the comparator and its second terminal connected to the output terminal of the comparator.

[0034] The ninth resistor has its first end connected to the output of the comparator and its second end connected to the first preset reference voltage.

[0035] The tenth resistor has its first end connected to the output of the comparator and its second end connected to the logic operation unit.

[0036] In one optional implementation, the logic operation unit includes:

[0037] The first AND gate device has its first input terminal connected to the output terminal of the first detection unit, its second input terminal connected to the output terminal of the second detection unit, and its output terminal connected to the drive module.

[0038] In one optional implementation, the logic operation unit further includes:

[0039] The second AND gate device has its first terminal connected to the output terminal of the first AND gate device, its second terminal connected to the first control terminal of the host computer, and its output terminal connected to the drive module. The first control terminal of the host computer is used to output a fault signal when the device malfunctions.

[0040] In one alternative implementation, the driving module includes:

[0041] The eleventh resistor, with its first end connected to the detection module;

[0042] The first switching transistor has its control terminal connected to the second terminal of the eleventh resistor, its first terminal connected to the first control terminal of the relay, and its second terminal grounded.

[0043] The twelfth resistor has its first end connected to the control terminal of the first switching transistor, and its second end grounded.

[0044] The third capacitor has its first terminal connected to the control terminal of the first switching transistor, and its second terminal grounded.

[0045] The first diode has its first terminal connected to the second preset reference voltage terminal, and its second terminal connected to the second control terminal of the relay.

[0046] In one optional embodiment, the drive module further includes a release unit connected to the relay, wherein the release unit is used to release the voltage across the relay to improve the relay's operating speed.

[0047] In one alternative implementation, the release unit includes:

[0048] The second diode has its first terminal connected to the first control terminal of the relay.

[0049] A Zener diode, the first terminal of which is connected to the second terminal of a second diode, and the second terminal of the Zener diode is connected to the second control terminal of a relay.

[0050] In one optional embodiment, the drive module further includes a voltage regulator unit connected to the relay, wherein the voltage regulator unit is used to regulate the voltage of the relay to prevent overheating.

[0051] In one optional implementation, the voltage regulator unit includes:

[0052] The thirteenth resistor has its first end connected to the second control terminal of the host computer.

[0053] The control terminal of the second switch is connected to the second terminal of the thirteenth resistor, and the first terminal of the second switch is grounded.

[0054] The fourteenth resistor, the first end of which is connected to the second end of the second switching transistor;

[0055] The third switch transistor has its control terminal connected to the second terminal of the fourteenth resistor, and its first terminal is connected to the second control terminal of the relay. The second terminal of the third switch transistor is connected to the third preset reference voltage terminal.

[0056] The fifteenth resistor has its first end connected to the control terminal of the third switching transistor, and its second end connected to the second terminal of the third switching transistor. The second control terminal of the host computer is used to output a regulated signal when the relay is energized. Attached Figure Description

[0057] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0058] Figure 1 This is a structural diagram of an electrolytic capacitor explosion-proof system according to an embodiment of the present utility model;

[0059] Figure 2 This is a structural diagram of a voltage acquisition module in an explosion-proof electrolytic capacitor system according to an embodiment of the present invention;

[0060] Figure 3 This is a structural diagram of a detection module in an explosion-proof electrolytic capacitor system according to an embodiment of the present invention;

[0061] Figure 4 This is a structural diagram of a drive module in an explosion-proof electrolytic capacitor system according to an embodiment of the present invention. Detailed Implementation

[0062] The technical solution of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0063] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0064] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can also refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0065] Furthermore, the technical features involved in the different embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.

[0066] In response, this embodiment provides an explosion-proof system for electrolytic capacitors, such as... Figure 1 As shown, the system includes:

[0067] Voltage acquisition module 10 is connected to the midpoint terminal BUS_MID, the positive terminal BUS+, and the negative terminal BUS- of the electrolytic capacitor plate, respectively, and is used to acquire and output the upper half input voltage and lower half input voltage of the electrolytic capacitor plate.

[0068] Specifically, the power board and the electrolytic capacitor board are connected in parallel. The electrical energy generated by the photovoltaic panel is transmitted to the power board and then from the power board to the electrolytic capacitor board. The midpoint terminal BUS_MID of the electrolytic capacitor board is the midpoint terminal of the film capacitor on the power board. The voltage acquisition module 10 acquires the voltage between the midpoint terminal BUS_MID and the positive terminal BUS+ of the electrolytic capacitor board and uses it as the upper half input voltage output of the electrolytic capacitor board. The voltage acquisition module 10 also acquires the voltage between the midpoint terminal BUS_MID and the negative terminal BUS- of the electrolytic capacitor board and uses it as the lower half input voltage output of the electrolytic capacitor board. Optionally, the voltage acquisition module 10 can be a voltmeter or operational amplifier that acquires the voltage values ​​at both ends, or it can be a circuit that acquires the voltage values ​​at both ends, adjusts them, and then outputs them.

[0069] The detection module 20 is connected to the voltage acquisition module 10 and is used to receive the upper half input voltage and the lower half input voltage. When it is determined that the upper half input voltage and / or the lower half input voltage is greater than the preset voltage value, an explosion-proof signal is output.

[0070] Specifically, the detection module 20 receives the upper half input voltage and the lower half input voltage respectively. When it detects that the upper half input voltage is greater than a preset voltage value, or that the lower half input voltage is greater than a preset voltage value, or that both the upper and lower half input voltages are greater than the preset voltage values ​​simultaneously, it outputs an explosion-proof signal. The preset voltage values ​​may specifically include a first preset voltage value and a second preset voltage value. The first and second preset voltage values ​​may be the same or different. The detection module 20 detects whether the upper half input voltage is greater than the first preset voltage value and whether the lower half input voltage is greater than the second preset voltage value. Therefore, when it detects that the upper half input voltage is greater than the first preset voltage value, or that the lower half input voltage is greater than the second preset voltage value, or that both the upper and lower half input voltages are greater than the first and second preset voltage values, it outputs an explosion-proof signal. Optionally, the detection module 20 can be a comparison circuit and a logic judgment circuit.

[0071] The drive module 30 is connected to the detection module 20 and is used to receive the explosion-proof signal and output the drive signal for the explosion-proof signal.

[0072] Specifically, after receiving the explosion-proof signal, the drive module 30 outputs a drive signal. Optionally, the drive module 30 can be a circuit that drives the switching transistor or a conduction control circuit.

[0073] Relay J1 is connected between the midpoint BUS_MID of the electrolytic capacitor board and the midpoint of the power board. The first and second control terminals of relay J1 are connected to the drive module 30. Relay J1 is used to receive drive signals and disconnect to disconnect the midpoint BUS_MID of the electrolytic capacitor board for explosion protection.

[0074] refer to Figure 1 The positive terminal of the power board is connected to the positive terminal BUS+ of the electrolytic capacitor board, and the negative terminal of the power board is connected to the positive terminal BUS- of the electrolytic capacitor board.

[0075] Specifically, the switching component of relay J1 is connected between the midpoint of the power board and the midpoint of the electrolytic capacitor board, BUS_MID. The first and second control terminals of relay J1 are connected to the drive module 30. After receiving the drive signal, the first and second control terminals of relay J1 control the switching component to disconnect, thereby disconnecting the input line to the midpoint of the electrolytic capacitor board, BUS_MID. Furthermore, when the upper half input voltage and / or the lower half input voltage are in an overvoltage state, the input to the midpoint of the electrolytic capacitor board, BUS_MID, is disconnected, and the voltage is borne by the entire electrolytic capacitor board, preventing the electrolytic capacitor board from exploding and catching fire.

[0076] The electrolytic capacitor explosion-proof system provided in this embodiment has a voltage acquisition module that acquires the upper half input voltage and the lower half input voltage respectively. When the detection module detects that the upper half input voltage and / or the lower half input voltage is higher than the preset voltage value, it controls the drive module to disconnect the relay, thereby disconnecting the midpoint input of the electrolytic capacitor board, so that the upper half BUS and the lower half BUS share the voltage, thus playing a protective role.

[0077] In some alternative implementations, such as Figure 1 As shown, the system also includes:

[0078] Fuse B1 is connected in parallel with relay J1 to blow after relay J1 is disconnected. Fuse B1 clamps the voltage across relay J1 to ensure that relay J1 achieves zero-voltage shutdown.

[0079] During machine startup, before relay J1 is closed, fuse B1 is used to provide a circuit for the midpoint BUS_MID of the electrolytic capacitor plate to conduct. During normal operation, fuse B1 is used to share the current of relay J1. When the relay executes the explosion-proof protection logic to shut down, fuse B1 blows after relay J1 is opened. Fuse B1 clamps the voltage across relay J1 to ensure that the relay achieves zero-voltage shutdown.

[0080] Specifically, when the switching component of relay J1 is disconnected, the voltage across relay J1 is applied to the terminals of fuse B1. When the voltage across fuse B1 exceeds a preset value, the heat generated by fuse B1 causes it to melt, thus breaking the circuit and achieving explosion-proof protection. Simultaneously, when the relay is disconnected and fuse B1 melts, the detection module 20 detects the voltage difference across the terminals and stops conducting, improving the stability of the explosion-proof protection. Furthermore, fuse B1 is easy to replace after melting, improving maintenance convenience. Optionally, fuse B1 can be a fusible link.

[0081] It should be noted that when the equipment is not in operation, relay J1 is in the open state. When the equipment is powered on, the BUS capacitor is charged, but relay J1 is still open. When the equipment's SPS (Server Power Supplies) starts up, relay J1 engages. If no fuse is installed, there will be a voltage difference across the relay contacts when the relay engages. Installing a fuse eliminates this voltage difference. Furthermore, by using a fuse, there is no voltage difference when relay J1 opens after an anomaly is detected, and a voltage difference only exists across the relay J1 contacts after the fuse blows. The relay achieves zero-voltage turn-on and zero-voltage turn-off, thus greatly improving the reliability of relay J1's operation.

[0082] Furthermore, existing technology connects a varistor in parallel across relay J1. When overvoltage or overcurrent occurs in the circuit, the varistor can protect the circuit by adjusting its resistance. However, although the resistance is increased, the two ends of the varistor are still connected together, leading to arcing in the relay and potential burnout of the relay contacts. Additionally, overvoltage can cause the relay to fail to operate due to the contacts sticking together. Fuse B1 solves these problems, ensuring that the voltage across the relay contacts is zero when the relay is on or off. In other words, fuse B1 eliminates the voltage difference problem across the relay.

[0083] In some alternative implementations, such as Figure 2 As shown, the voltage acquisition module 10 includes:

[0084] The upper half voltage acquisition unit 11 has its first input terminal connected to the positive terminal BUS+ of the electrolytic capacitor plate, its second input terminal connected to the midpoint terminal BUS_MID of the electrolytic capacitor plate, and its output terminal connected to the detection module 20. It is used to acquire the upper half input voltage and output the upper half input voltage to the detection module 20.

[0085] Specifically, the upper half voltage acquisition unit 11 includes two input terminals and one output terminal, used to acquire the voltage of the upper half BUS and output the upper half input voltage BUSN_V_IN to the detection module 20. Optionally, the upper half voltage acquisition unit 11 can employ a circuit to calculate the difference between the positive terminal BUS+ of the electrolytic capacitor plate and the midpoint terminal BUS_MID of the electrolytic capacitor plate, and may also include an adjustment circuit for correcting or amplifying the difference, or a method based on resistance acquisition, etc.

[0086] The lower half voltage acquisition unit 12 has its first input terminal connected to the midpoint terminal BUS_MID of the electrolytic capacitor plate, its second input terminal connected to the negative terminal BUS- of the electrolytic capacitor plate, and its output terminal connected to the detection module 20. It is used to acquire the lower half input voltage and output the lower half input voltage to the detection module 20.

[0087] Specifically, the lower half voltage acquisition unit 12 includes two input terminals and one output terminal, used to acquire the voltage of the lower half BUS and output the lower half input voltage BUSP_V_IN to the detection module 20. Optionally, the lower half voltage acquisition unit 12 can employ a circuit to calculate the difference between the negative terminal BUS- of the electrolytic capacitor plate and the midpoint terminal BUS_MID of the electrolytic capacitor plate, and may also include an adjustment circuit for correcting or amplifying the difference, or a method based on resistance acquisition, etc.

[0088] It should be noted that the output terminal of the upper half voltage acquisition unit 11 is the first output terminal of the voltage acquisition module 10, and the output terminal of the lower half voltage acquisition unit 12 is the second output terminal of the voltage acquisition module 10.

[0089] In some alternative implementations, such as Figure 2 As shown, the upper half voltage acquisition unit 11 and the lower half voltage acquisition unit 12 each include:

[0090] The first resistor R1, the first end of the first resistor R1 is the first input terminal of the upper half voltage acquisition unit 11, or the first end of the first resistor R1 is the first input terminal of the lower half voltage acquisition unit 12;

[0091] The second resistor R2 has its first end being the second input terminal of the upper half voltage acquisition unit 11, or the first end of the second resistor R2 being the second input terminal of the lower half voltage acquisition unit 12.

[0092] Operational amplifier A1 has its first input terminal connected to the second terminal of the first resistor R1, its second input terminal connected to the second terminal of the second resistor R2, and its output terminal connected to the detection module 20.

[0093] The third resistor R3 has its first end connected to the first input terminal of the operational amplifier A1, and its second end grounded.

[0094] The fourth resistor R4 has its first end connected to the second input terminal of operational amplifier A1, and its second end connected to the output terminal of operational amplifier A1.

[0095] The first capacitor C1 has its first terminal connected to the first terminal of the third resistor R3, and its second terminal is connected to the second terminal of the third resistor R3.

[0096] The second capacitor C2 has its first terminal connected to the first terminal of the fourth resistor R4, and its second terminal connected to the second terminal of the fourth resistor R4.

[0097] Specifically, refer to Figure 2 The first resistor R1, the second resistor R2, the operational amplifier A1, the third resistor R3, and the fourth resistor R4 constitute a differential operational amplifier circuit, where the fourth resistor R4 is a feedback resistor. Optionally, the operational amplifier A1 can be a differential operational amplifier, thus forming a differential operational amplifier circuit. The differential operational amplifier circuit is used to amplify the difference between two input signals and output it. If there is interference in the signal, since the effective value of the interference between the two signals is zero, it achieves the purpose of anti-common-mode interference, improving the stability of the upper and lower half of the input voltage. The first capacitor C1 and the second capacitor C2 are used for filtering. Optionally, the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 can each be multiple resistors connected in series, parallel, or series-parallel configurations, without limitation.

[0098] In addition, the upper half voltage acquisition unit 11 and the lower half voltage acquisition unit 12 are not limited to positive feedback operation circuits and negative feedback operation circuits. The upper half voltage acquisition unit 11 and the lower half voltage acquisition unit 12 can each adopt different sampling circuits.

[0099] In some alternative implementations, such as Figure 3 As shown, the voltage acquisition module 10 includes: a first output terminal and a second output terminal, and the detection module 20 includes:

[0100] The first detection unit 21 has its first input terminal connected to the first output terminal of the voltage acquisition module 10, and its second input terminal connected to the first preset reference voltage terminal Vref1. It is used to receive the upper half input voltage, detect whether the upper half input voltage is greater than the preset voltage value, and output the upper half input voltage detection result.

[0101] Specifically, the first detection unit 21 receives the upper half input voltage BUSN_V_IN. The first detection unit 21 outputs a high level when it detects that the upper half input voltage is greater than a preset voltage value, and conversely, outputs a low level when it detects that the upper half input voltage is greater than the preset voltage value. The output of the first detection unit 21 flips when it detects that the upper half input voltage is greater than the preset voltage value. It should be noted that the first preset reference voltage terminal Vref1, after voltage adjustment, is provided to the first detection unit 21 as the preset voltage value.

[0102] Optionally, the first detection unit 21 can be a comparison unit, and may also include a hysteresis comparison. The first detection unit 21 can be a comparison circuit composed of switching transistors. It is understood that the preset voltage value includes a first preset voltage value and a second preset voltage value, which may be the same or different. The first detection unit 21 compares the upper half input voltage with the first preset voltage value.

[0103] The second detection unit 22 has its first input terminal connected to the second output terminal of the voltage acquisition module 10, and its second input terminal connected to the first preset reference voltage terminal Vref1. It is used to receive the lower half input voltage, detect whether the lower half input voltage is greater than the preset voltage value, and output the lower half input voltage detection result.

[0104] Specifically, the second detection unit 22 is used to receive the lower half input voltage BUSP_V_IN. When the second detection unit 22 detects that the lower half input voltage is greater than the preset voltage value, it outputs a high level. Of course, when the second detection unit 22 detects that the upper half input voltage is greater than the preset voltage value, it outputs a low level. When the second detection unit 22 detects that the upper half input voltage is greater than the preset voltage value, it outputs a flip.

[0105] Optionally, the second detection unit 22 can be a comparison unit, and may also include a hysteresis comparison. The second detection unit 22 can be a comparison circuit composed of switching transistors. It is understood that the second detection unit 22 compares the upper half of the input voltage with a second preset voltage value.

[0106] The logic operation unit 23 is connected to the output terminal of the first detection unit 21, the output terminal of the second detection unit 22, and the driving module 30, respectively. It is used to receive the upper half input voltage detection result and the lower half input voltage detection result, perform logic operation on the upper half input voltage detection result and the lower half input voltage detection result to obtain the logic operation result, and output an explosion-proof signal when the logic operation result is the preset detection result.

[0107] Specifically, the logic operation unit 23 performs logic operations on the upper half input voltage detection results and the lower half input voltage detection results. If the first detection unit 21 detects that the upper half input voltage is greater than a preset voltage value, it outputs a low level; similarly, the second detection unit 22 detects that the lower half input voltage is greater than a preset voltage value. After receiving the upper half input voltage detection results and the lower half input voltage detection results, the logic operation unit 23 performs logic operations on them. If either the upper half input voltage detection result or the lower half input voltage detection result is low, the logic operation result is confirmed as the preset detection result, and an explosion-proof signal is output. This disconnects the input of the BUS_MID terminal at the midpoint of the electrolytic capacitor plate in the event of a short circuit in the upper half BUS (the bus in the power system) or the lower half BUS, or in the event of an inverter malfunction causing reverse voltage flow, thus preventing explosion and fire. Optionally, the logic operation unit 23 includes logic gate devices.

[0108] In some alternative implementations, such as Figure 3 As shown, the first detection unit 21 and the second detection unit 22 each include:

[0109] The fifth resistor R5 has its first end being the first input terminal of the first detection unit 21, or the first end of the fifth resistor R5 is the first input terminal of the second detection unit 22.

[0110] Comparator V1, the first input terminal of comparator V1 is connected to the second terminal of the fifth resistor R5;

[0111] The sixth resistor R6 has its first terminal connected to the second input terminal of comparator V1, and its second terminal grounded.

[0112] The seventh resistor R7 has its first end connected to the second input terminal of comparator V1, and its second end connected to the first preset reference voltage terminal Vref1.

[0113] The eighth resistor R8 has its first end connected to the second input terminal of comparator V1, and its second end connected to the output terminal of comparator V1.

[0114] The ninth resistor R9 has its first end connected to the output of comparator V1 and its second end connected to the first preset reference voltage Vref1.

[0115] The tenth resistor R10 has its first end connected to the output of comparator V1 and its second end connected to logic operation unit 23.

[0116] Specifically, refer to Figure 3 The fifth resistor R5, comparator V1, sixth resistor R6, seventh resistor R7, eighth resistor R8, ninth resistor R9, and tenth resistor R10 constitute a comparator circuit. Of course, the first preset voltage value and the second preset voltage value can be different by using different resistance values ​​in the second detection unit 22 of the first detection unit 21. Optionally, the fifth resistor R5, sixth resistor R6, seventh resistor R7, eighth resistor R8, ninth resistor R9, and tenth resistor R10 can each be multiple resistors connected in series, parallel, or series-parallel configurations; no limitation is imposed here.

[0117] Additionally, it is worth noting that the voltage of the first preset reference voltage terminal Vref1 can be 5V, or it can be any voltage terminal after adjustment.

[0118] In some alternative implementations, such as Figure 3 As shown, the logic operation unit 23 includes:

[0119] The first AND gate device G1 has its first input terminal connected to the output terminal of the first detection unit 21, its second input terminal connected to the output terminal of the second detection unit 22, and its output terminal connected to the drive module 30.

[0120] Specifically, the first AND gate G1 outputs the RLY_BUS_M signal to the driver module 30. When the first AND gate G1 outputs the expansion signal, it outputs a high level. The first AND gate G1 is used to detect whether at least one of the upper and lower half output voltages is greater than a preset voltage value before outputting the expansion signal. If the upper half output voltage is greater than the preset voltage value, the upper half input voltage detection result received by the first AND gate G1 is low. If the lower half output voltage is greater than the preset voltage value, the lower half input voltage detection result received by the first AND gate G1 is low. Therefore, the expansion signal is output when at least one of the results received by the first AND gate G1 is low.

[0121] In some alternative implementations, such as Figure 3 As shown, the logic operation unit 23 includes:

[0122] The second AND gate device G2 has its first terminal connected to the output terminal of the first AND gate device G1, its second terminal connected to the first control terminal of the host computer, and its output terminal connected to the drive module 30. The first control terminal of the host computer is used to output a fault signal when the device malfunctions.

[0123] Specifically, the second AND gate G2 outputs the RLY_BUS_M signal to the drive module 30. When the second AND gate G2 outputs an expansion signal, it outputs a low level. The first control terminal of the host computer outputs the first control signal RLY_BUSN_M to the second terminal of the second AND gate G2. The host computer is used for software program control. When the first control terminal of the host computer receives any fault signal from the electrolytic capacitor board, power board, or inverter, it outputs a low level. The first terminal of the second AND gate G2 is used to receive the detection results of the upper half input voltage and the lower half input voltage. The second terminal of the second AND gate G2 is used to receive the fault control signal. Therefore, when the upper half input voltage is greater than the preset voltage value, the lower half input voltage is greater than the preset voltage value, and / or other faults occur, an explosion-proof signal is output to the drive module 30.

[0124] In some alternative implementations, such as Figure 4 As shown, the drive module 30 includes:

[0125] The eleventh resistor R11, the first end of the eleventh resistor R11 is connected to the detection module 20;

[0126] The first switch S1 has its control terminal connected to the second terminal of the eleventh resistor R11, its first terminal connected to the first control terminal of the relay J1, and its second terminal grounded.

[0127] The twelfth resistor R12 has its first end connected to the control terminal of the first switch S1, and its second end grounded.

[0128] The third capacitor C3 has its first terminal connected to the control terminal of the first switching transistor S1, and its second terminal grounded.

[0129] The first diode D1 has its first terminal connected to the second preset reference voltage terminal Vref2, and its second terminal connected to the second control terminal of the relay J1.

[0130] Specifically, the expansion signal can be a turn-off signal. Positive electricity is sent from the second preset reference voltage terminal Vref2 through the first diode D1 to the second control terminal of relay J1. Upon receiving the expansion signal, the first switching transistor S1 turns off, thus stopping the delivery of negative electricity to the first control terminal of relay J1. At this time, relay J1 is disconnected, causing the switching component of relay J1 to open. Alternatively, the expansion signal can be an turn-on signal, thereby stopping the delivery of negative electricity to the first control terminal of relay J1 after the first switching transistor S1 is turned on. The first diode D1 also serves to prevent reverse connection.

[0131] In addition, the drive module 30 also includes a third capacitor C3, which is understood to be used for filtering.

[0132] In some alternative implementations, such as Figure 4 As shown, the drive module 30 also includes a release unit 31, which is connected to the relay J1. The release unit 31 is used to release the voltage across the relay J1 to improve the operating speed of the relay J1.

[0133] Specifically, when the drive module 30 controls the relay J1 to disconnect, the release unit 31 is used to quickly discharge the electricity in the coil, thereby increasing the speed at which the coil disconnects. Optionally, the release unit 31 can be a combination of one or more discharge diodes.

[0134] In some alternative implementations, such as Figure 4 As shown, the release unit 31 includes:

[0135] The first terminal of the second diode D2 is connected to the first control terminal of the relay J1.

[0136] Zener diode D3, the first terminal of Zener diode D3 is connected to the second terminal of second diode D2, and the second terminal of Zener diode D3 is connected to the second control terminal of relay J1.

[0137] Specifically, based on the combination of the second diode D2 and the Zener diode D3, the current in the coil of relay J1 is quickly discharged, thereby increasing the speed at which the coil disconnects.

[0138] In some alternative implementations, such as Figure 4 As shown, the drive module 30 also includes a voltage regulator unit 32, which is connected to the relay J1. The voltage regulator unit 32 is used to regulate the voltage of the relay J1 to prevent overheating.

[0139] Specifically, after detecting that relay J1 is engaged, voltage regulator unit 32 controls the voltage across the coil to decrease from 12V to 7V, thereby reducing coil heating. Optionally, voltage regulator unit 32 can be a circuit for regulating voltage.

[0140] In some alternative implementations, such as Figure 4 As shown, the voltage regulator unit 32 includes:

[0141] The thirteenth resistor R13 has its first terminal connected to the second control terminal of the host computer.

[0142] The control terminal of the second switch S2 is connected to the second terminal of the thirteenth resistor R13, and the first terminal of the second switch S2 is grounded.

[0143] The fourteenth resistor R14, the first end of the fourteenth resistor R14 is connected to the second end of the second switch S2;

[0144] The third switch S3, the control terminal of the third switch S3 is connected to the second terminal of the fourteenth resistor R14, the first terminal of the third switch S3 is connected to the second control terminal of the relay J1, and the second terminal of the third switch S3 is connected to the third preset reference voltage terminal Vref3.

[0145] The fifteenth resistor R15 has its first end connected to the control terminal of the third switch S3, and its second end connected to the second terminal of the third switch S3. The second control terminal of the host computer is used to output a regulated signal when the relay J1 is energized.

[0146] Specifically, after detecting that relay J1 is energized, the second control terminal of the host computer sends the second control signal RLY_BUSN VCC. That is, when the second control terminal of the host computer outputs a high level, the second switch S2 is turned on. After the second switch S2 is turned on, the third switch S3 is turned off. The voltage of the third preset reference voltage terminal Vref3 is 12V, and the voltage of the second preset reference voltage terminal Vref2 is 7V. Thus, the transmission of 12V voltage to the second terminal of relay J1 is stopped, and the 7V voltage is transmitted to the second terminal of relay J1.

[0147] In addition, the voltage regulator unit 32 may also include a sixteenth resistor R16, a seventeenth resistor R17, a fourth capacitor C4, and a fifth capacitor C5. It is understood that the sixteenth resistor R16 and the seventeenth resistor R17 are selected based on the magnitude of the required voltage, and the fourth capacitor C4 and the fifth capacitor C5 are used for filtering.

[0148] Although embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. An explosion-proof system for electrolytic capacitors, characterized in that, The system includes: A voltage acquisition module is connected to the midpoint, positive terminal, and negative terminal of the electrolytic capacitor plate, respectively, and is used to acquire and output the upper half input voltage and lower half input voltage of the electrolytic capacitor plate. The detection module is connected to the voltage acquisition module and is used to receive the upper half input voltage and the lower half input voltage. When it is determined that the upper half input voltage and / or the lower half input voltage is greater than a preset voltage value, an explosion-proof signal is output. A drive module, connected to the detection module, is used to receive the explosion-proof signal and output a drive signal for the explosion-proof signal; A relay is connected between the midpoint of the electrolytic capacitor plate and the midpoint of the power board. The first control terminal and the second control terminal of the relay are connected to the drive module. The relay is used to receive the drive signal and disconnect to disconnect the midpoint of the electrolytic capacitor plate for explosion-proof protection.

2. The system according to claim 1, characterized in that, The system also includes: A fuse, connected in parallel with the relay, is used to blow the relay after it is disconnected. The fuse clamps the voltage across the relay to ensure that the relay achieves zero-voltage shutdown.

3. The system according to claim 1, characterized in that, The voltage acquisition module includes: The upper half voltage acquisition unit has a first input terminal connected to the positive terminal of the electrolytic capacitor plate, a second input terminal connected to the midpoint of the electrolytic capacitor plate, and an output terminal connected to the detection module. It is used to acquire the upper half input voltage and output the upper half input voltage to the detection module. The lower half voltage acquisition unit has its first input terminal connected to the midpoint of the electrolytic capacitor plate, its second input terminal connected to the negative terminal of the electrolytic capacitor plate, and its output terminal connected to the detection module. It is used to acquire the lower half input voltage and output the lower half input voltage to the detection module.

4. The system according to claim 3, characterized in that, Each of the upper half voltage acquisition unit and the lower half voltage acquisition unit includes: The first resistor, wherein the first end of the first resistor is the first input terminal of the upper half voltage acquisition unit, or the first end of the first resistor is the first input terminal of the lower half voltage acquisition unit; The second resistor has its first end serving as the second input terminal of the upper half voltage acquisition unit, or its first end serving as the second input terminal of the lower half voltage acquisition unit. An operational amplifier, wherein the first input terminal of the operational amplifier is connected to the second terminal of the first resistor, the second input terminal of the operational amplifier is connected to the second terminal of the second resistor, and the output terminal of the operational amplifier is connected to the detection module; The third resistor has its first end connected to the first input terminal of the operational amplifier, and its second end grounded. The fourth resistor has its first end connected to the second input terminal of the operational amplifier and its second end connected to the output terminal of the operational amplifier. A first capacitor, wherein a first terminal of the first capacitor is connected to a first terminal of the third resistor, and a second terminal of the first capacitor is connected to a second terminal of the third resistor; The second capacitor has its first terminal connected to the first terminal of the fourth resistor, and its second terminal connected to the second terminal of the fourth resistor.

5. The system according to claim 1, characterized in that, The voltage acquisition module includes: a first output terminal and a second output terminal; the detection module includes: The first detection unit has a first input terminal connected to the first output terminal of the voltage acquisition module and a second input terminal connected to the first preset reference voltage terminal. It is used to receive the upper half input voltage, detect whether the upper half input voltage is greater than the preset voltage value, and output the upper half input voltage detection result. The second detection unit has its first input terminal connected to the second output terminal of the voltage acquisition module and its second input terminal connected to the first preset reference voltage terminal. It is used to receive the lower half input voltage, detect whether the lower half input voltage is greater than the preset voltage value, and output the lower half input voltage detection result. The logic operation unit is connected to the output terminals of the first detection unit, the second detection unit, and the driving module, respectively. It is used to receive the upper half input voltage detection result and the lower half input voltage detection result, perform logic operations on the upper half input voltage detection result and the lower half input voltage detection result to obtain a logic operation result, and output an explosion-proof signal when the logic operation result is a preset detection result.

6. The system according to claim 5, characterized in that, The first detection unit and the second detection unit each include: The fifth resistor, wherein the first end of the fifth resistor is the first input terminal of the first detection unit, or the first end of the fifth resistor is the first input terminal of the second detection unit; A comparator, wherein the first input terminal of the comparator is connected to the second terminal of the fifth resistor; The sixth resistor has its first end connected to the second input terminal of the comparator, and its second end grounded. The seventh resistor has its first end connected to the second input terminal of the comparator and its second end connected to the first preset reference voltage terminal. The eighth resistor has its first end connected to the second input terminal of the comparator and its second end connected to the output terminal of the comparator. The ninth resistor has its first end connected to the output terminal of the comparator and its second end connected to the first preset reference voltage terminal. The tenth resistor has its first end connected to the output of the comparator and its second end connected to the logic operation unit.

7. The system according to claim 5, characterized in that, The logic operation unit includes: A first AND gate device, wherein the first input terminal of the first AND gate device is connected to the output terminal of the first detection unit, the second input terminal of the first AND gate device is connected to the output terminal of the second detection unit, and the output terminal of the first AND gate device is connected to the driving module.

8. The system according to claim 7, characterized in that, The logic operation unit further includes: The second AND gate device has its first terminal connected to the output terminal of the first AND gate device, its second terminal connected to the first control terminal of the host computer, and its output terminal connected to the drive module. The first control terminal of the host computer is used to output a fault signal when the device malfunctions.

9. The system according to claim 1, characterized in that, The driving module includes: The eleventh resistor, the first end of which is connected to the detection module; The first switching transistor has its control terminal connected to the second terminal of the eleventh resistor, its first terminal connected to the first control terminal of the relay, and its second terminal grounded. The twelfth resistor has its first end connected to the control terminal of the first switching transistor, and its second end grounded. The third capacitor has its first terminal connected to the control terminal of the first switching transistor, and its second terminal grounded. A first diode, the first end of which is connected to a second preset reference voltage terminal, and the second end of which is connected to the second control terminal of the relay.

10. The system according to claim 1, characterized in that, The drive module further includes a release unit connected to the relay, wherein the release unit is used to release the voltage across the relay to improve the relay's operating speed.

11. The system according to claim 10, characterized in that, The release unit includes: The second diode, the first end of which is connected to the first control terminal of the relay; A Zener diode, wherein the first end of the Zener diode is connected to the second end of the second diode, and the second end of the Zener diode is connected to the second control terminal of the relay.

12. The system according to claim 1, characterized in that, The drive module further includes a voltage regulator unit connected to the relay, wherein the voltage regulator unit is used to regulate the voltage of the relay to prevent overheating.

13. The system according to claim 12, characterized in that, The voltage regulator unit includes: The thirteenth resistor, the first end of which is connected to the second control terminal of the host computer; The second switch is connected to the second terminal of the thirteenth resistor, and the first terminal of the second switch is grounded. The fourteenth resistor, the first end of which is connected to the second end of the second switching transistor; The third switch is connected to the control terminal of the fourteenth resistor, the first terminal of the third switch is connected to the second control terminal of the relay, and the second terminal of the third switch is connected to the third preset reference voltage terminal. The fifteenth resistor has its first end connected to the control terminal of the third switching transistor, and its second end connected to the second terminal of the third switching transistor. The second control terminal of the host computer is used to output a regulated signal when the relay is energized.

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