Battery management system with electric quantity monitoring function and energy storage power supply

Abstract

The utility model relates to a battery management system with an electric quantity monitoring function and an energy storage power supply. The battery management system comprises: a voltage acquisition unit, one end of which is connected with the anode of a battery body and the other end is grounded so as to acquire the anode voltage of the battery body; the current acquisition unit is provided with a current sampling resistor; the first end of the current sampling resistor is grounded, and the second end is connected with the cathode of the battery body so as to collect charge-discharge current signals of the battery body; the main control chip monitors the electric quantity of the battery according to the positive electrode voltage and the charging and discharging current signals; wherein the current acquisition unit comprises a current acquisition chip, a third resistor, a fourth resistor, a fifth resistor and a sixth resistor; the current acquisition chip is a current differential amplifier, the normal-phase input end of the current acquisition chip is connected with the first end of the current sampling resistor through a third resistor, the inverted-phase input end is connected with the second end of the current sampling resistor through a fourth resistor, and the output end is connected with the charging and discharging current signal output end through a fifth resistor.

Description

Technical Field

[0001] This utility model relates to the field of power supply technology, and in particular to a battery management system and energy storage power supply with power monitoring function. Background Technology

[0002] An energy storage power supply is a high-capacity mobile power source capable of storing electrical energy and outputting the stored energy in a specified manner when needed to power other connected electrical appliances. Existing energy storage power supplies generally include a battery pack and a battery management system. The battery pack stores electrical energy. The battery management system is electrically connected to the battery pack and is used to monitor the status of the battery pack, control its charging and discharging, and provide safety protection based on the monitored battery pack status.

[0003] Existing battery management systems generally have the function of monitoring the battery's charge level. The monitoring principle is as follows: the voltage V across the battery terminals and the charging / discharging current I are collected. Based on the collected voltage V and charging / discharging current I, the battery charge level Q = f(V, I) is calculated.

[0004] Existing battery management systems typically use front-end analog ICs to collect voltage (V) and charging / discharging current (I), and then use a microcontroller to calculate the battery level. While this battery level monitoring solution has a certain level of accuracy, the front-end analog ICs are relatively expensive, resulting in a low cost-performance ratio. Utility Model Content

[0005] Based on this, the purpose of this utility model is to provide a battery management system and energy storage power supply with battery power monitoring function. It uses a current differential amplifier to collect charging and discharging current and then calculates the battery power, achieving high monitoring accuracy at a low cost and with a high cost-performance ratio.

[0006] This invention provides a battery management system with power monitoring function, comprising: a voltage acquisition unit, one end of which is connected to the positive terminal of the battery body and the other end is grounded, thereby acquiring the positive terminal voltage of the battery body; a current acquisition unit, which is provided with a current sampling resistor; the first end of the current sampling resistor is grounded and the second end is connected to the negative terminal of the battery body, thereby acquiring the charging and discharging current signal of the battery body; and a main control chip, which monitors the battery power based on the positive terminal voltage and the charging and discharging current signal; wherein, the current acquisition unit includes: a current acquisition chip, a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor; the current acquisition chip is a current differential amplifier, the non-inverting input terminal of which is connected to the first end of the current sampling resistor through the third resistor, the inverting input terminal of which is connected to the second end of the current sampling resistor through the fourth resistor, and the output terminal of which is connected to the charging and discharging current signal output terminal through the fifth resistor; the power supply terminal of the current acquisition chip is connected to the on-chip power supply, the ground terminal is grounded, and the reference terminal is connected to the on-chip power supply through the sixth resistor.

[0007] This invention offers the following technical advantages: Instead of using a front-end analog IC, it employs a current differential amplifier to collect charging and discharging currents and calculate battery capacity, resulting in a lower cost compared to existing battery capacity calculation schemes based on front-end analog ICs. Experiments have shown that the battery capacity monitoring error of this invention is less than 1%, similar to the accuracy of existing battery capacity calculation schemes based on front-end analog ICs. Therefore, this invention achieves high monitoring accuracy at a lower cost, demonstrating high cost-effectiveness.

[0008] Furthermore, the current acquisition unit further includes: a second capacitor, one end of which is connected to the non-inverting input terminal of the current acquisition chip, and the other end grounded; a third capacitor, one end of which is connected to the inverting input terminal of the current acquisition chip, and the other end grounded; a fourth capacitor, one end of which is connected to the power supply terminal of the current acquisition chip, and the other end grounded; a fifth capacitor, one end of which is connected to the reference terminal of the current acquisition chip, and the other end grounded; a second Zener diode, the cathode of which is connected to the reference terminal of the current acquisition chip, and the anode grounded, thereby providing a stable reference voltage for the reference terminal of the current acquisition chip; a third Zener diode, the cathode of which is connected to the charge / discharge current signal output terminal, and the anode grounded; a sixth capacitor, one end of which is connected to the charge / discharge current signal output terminal, and the other end grounded; and a seventh resistor, one end of which is connected to the charge / discharge current signal output terminal, and the other end grounded.

[0009] Furthermore, the voltage acquisition unit includes: a first resistor, one end of which is connected to the positive terminal of the battery body, and the other end of which is connected to the positive voltage output terminal of the main control chip; a second resistor, one end of which is connected to the positive voltage output terminal, and the other end of which is grounded; a first Zener diode, the cathode of which is connected to the positive voltage output terminal, and the anode of which is grounded; and a first capacitor, one end of which is connected to the positive voltage output terminal, and the other end of which is grounded.

[0010] Furthermore, the voltage acquisition unit also includes: a second diode, whose cathode is connected to the on-chip power supply and whose anode is connected to the positive voltage output terminal; a third diode, whose cathode is connected to the positive voltage output terminal and whose anode is grounded; and a seventeenth capacitor, one end of which is connected to the positive voltage output terminal and the other end of which is grounded.

[0011] Furthermore, the current acquisition unit also includes: a fourth diode, whose cathode is connected to the on-chip power supply and whose anode is connected to the charge / discharge current signal output terminal; a fifth diode, whose cathode is connected to the charge / discharge current signal output terminal and whose anode is grounded; and an eighteenth capacitor, one end of which is connected to the charge / discharge current signal output terminal and the other end of which is grounded.

[0012] Furthermore, it also includes a BMS chip connected to the main control chip; the main control chip also controls the charging process of the battery body according to the battery power level through the BMS chip; the CO port of the BMS chip is a charging protection output port connected to the charging switch unit; the charging switch unit is provided with a first switch connected in series between the second end of the current sampling resistor and the negative terminal of the battery body; the charging control signal output by the CO port of the BMS chip controls the opening and closing of the first switch through the charging switch unit, thereby controlling the opening and closing of the charging circuit between the battery body and the external charging power supply.

[0013] Furthermore, the main control chip also controls the discharge process of the battery body according to the battery power through the BMS chip; the DO port of the BMS chip is a discharge protection output port connected to the discharge switch unit; the discharge switch unit is provided with a second switch connected in series between the second end of the current sampling resistor and the negative terminal of the battery body; the discharge control signal output by the DO port of the BMS chip controls the opening and closing of the second switch through the discharge switch unit, thereby controlling the opening and closing of the discharge circuit between the battery body and the external load.

[0014] Based on the same inventive concept, this application also provides an energy storage power source, including: a battery body and any of the above-mentioned battery management systems with power monitoring function; the battery management system is electrically connected to the battery body and monitors the power of the battery body by collecting the positive electrode voltage and charging / discharging current signals of the battery body.

[0015] Furthermore, the battery body includes several battery cells connected in series; the battery management system also collects the positive voltage of each battery cell in the battery body, and monitors the power of the battery body based on the positive voltage of each battery cell and the charging and discharging current signal of the battery body.

[0016] To better understand and implement this invention, the following detailed description is provided in conjunction with the accompanying drawings. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the energy storage power supply module according to Embodiment 1 of this utility model;

[0018] Figure 2 This is a schematic diagram of the circuit structure of the voltage acquisition unit and the current acquisition unit in Embodiment 1 of this utility model;

[0019] Figure 3 This is a schematic diagram of the BMS circuit in Embodiment 2 of this utility model. Detailed Implementation

[0020] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0022] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" and "several" mean two or more, unless otherwise explicitly defined.

[0023] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0024] Example 1

[0025] Please see Figure 1 , Figure 1This is a schematic diagram of the energy storage power supply module according to Embodiment 1 of this utility model. The energy storage power supply of Embodiment 1 of this utility model includes a battery body 10 and a battery management system 20. The battery management system 20 includes a main control chip MCU, a voltage acquisition unit 21, and a current acquisition unit 22. The voltage acquisition unit 21 acquires the positive electrode voltage BV of the battery body 10. The current acquisition unit 22 acquires the charging and discharging current signal BI of the battery body 10. The main control chip MCU calculates the battery power according to the positive electrode voltage BV and the charging and discharging current signal BI through its built-in program, thereby realizing the monitoring of the power of the battery body 10.

[0026] The current acquisition unit 22 is equipped with a current sampling resistor Rs1. The first terminal P- of the current sampling resistor Rs1 is grounded, and the second terminal P2- is connected to the negative terminal B- of the battery body 10. The current acquisition unit 22 acquires the charging / discharging current signal BI by detecting the voltage across the current sampling resistor Rs1. One end of the voltage acquisition unit 21 is connected to the positive terminal B+ of the battery body 10, and the other end is grounded. The voltage acquisition unit 21 acquires the positive terminal voltage BV of the battery body 10 by detecting the voltage across itself.

[0027] After the main control chip MCU calculates the battery power, it can display the battery power on an external display for user reference; it can also intelligently control the charging and discharging process of the battery body 10 based on the battery power to improve the performance and lifespan of the battery body 10; or it can transmit the battery power data to an external host computer for further analysis and processing, etc.

[0028] Specifically, please refer to Figure 2 , Figure 2 This is a schematic diagram of the circuit structure of the voltage acquisition unit and the current acquisition unit in Embodiment 1 of this utility model.

[0029] The voltage acquisition unit 21 includes: a first resistor R1, a second resistor R2, a first Zener diode ZD1, and a first capacitor C1. One end of the first resistor R1 is connected to the positive terminal B+ of the battery body 10, and the other end is connected to the positive voltage output terminal BV of the main control chip MCU. One end of the second resistor R2 is connected to the positive voltage output terminal BV, and the other end is grounded. The cathode of the first Zener diode ZD1 is connected to the positive voltage output terminal BV, and the anode is grounded. One end of the first capacitor C1 is connected to the positive voltage output terminal BV, and the other end is grounded.

[0030] The current acquisition unit 22 includes: a current acquisition chip U1, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a second Zener diode ZD2, a third Zener diode ZD3, a sixth capacitor C6, and a seventh resistor R7.

[0031] The current acquisition chip U1 is a current differential amplifier. Its non-inverting input terminal IN+ is connected to the first terminal P- of the current sampling resistor Rs1 through the third resistor R3, and its inverting input terminal IN- is connected to the second terminal P2- of the current sampling resistor through the fourth resistor R4. The output terminal OUT is connected to the charge / discharge current signal output terminal BI through the fifth resistor R5. The power supply terminal V+ of the current acquisition chip U1 is connected to the on-chip power supply VCC, the ground terminal GND is grounded, and the reference terminal REF is connected to the on-chip power supply VCC through the sixth resistor R6.

[0032] The second capacitor C2 has one end connected to the non-inverting input terminal IN+ of the current acquisition chip U1, and the other end grounded. The third capacitor C3 has one end connected to the inverting input terminal IN- of the current acquisition chip U1, and the other end grounded. The fourth capacitor C4 has one end connected to the power supply terminal V+ of the current acquisition chip U1, and the other end grounded. The fifth capacitor C5 has one end connected to the reference terminal REF of the current acquisition chip U1, and the other end grounded. The cathode of the second Zener diode ZD2 is connected to the reference terminal REF of the current acquisition chip U1, and the anode is grounded, thus providing a stable reference voltage to the reference terminal REF of the current acquisition chip. The cathode of the third Zener diode ZD3 is connected to the charge / discharge current signal output terminal BI, and the anode is grounded. One end of the sixth capacitor C6 is connected to the charge / discharge current signal output terminal BI, and the other end grounded. One end of the seventh resistor R7 is connected to the charge / discharge current signal output terminal BI, and the other end grounded.

[0033] Example 2

[0034] Embodiment 2 of this utility model is basically the same as Embodiment 1, except that the battery management system 20 further includes a BMS circuit 23 electrically connected to the main control chip MCU. The main control chip MCU also controls the charging and discharging process of the battery body 10 through the BMS circuit 23 based on the monitored battery power.

[0035] Please see Figure 3 , Figure 3 This is a schematic diagram of the BMS circuit in Embodiment 2 of this utility model.

[0036] The BMS circuit 23 includes: BMS chip U2, eighth resistor R8 to thirty-second resistor R32, seventh capacitor C7 to sixteenth capacitor C16, first transistor Q1 to sixth transistor Q6, fourth Zener diode ZD4, charging switch unit, first switch S1, discharging switch unit and second switch S2.

[0037] In this embodiment, the battery body 10 is a 7-cell lithium-ion battery pack, comprising 7 battery cells connected in series. The 7 battery cells are designated as the first battery cell (with the lowest positive voltage) to the seventh battery cell (with a positive voltage equal to the positive voltage of the battery body 10), arranged in ascending order of positive electrode voltage. The BMS chip U2 also collects the positive electrode voltage of each battery cell in the battery body 10, allowing the main control chip MCU to monitor the battery's charge level based on the positive electrode voltage of each battery cell and the charging / discharging current signal of the battery body.

[0038] The positive terminal of the seventh battery cell (i.e., the positive terminal B+ of the battery body 10) is connected to the power supply terminal VDD of the BMS chip U2 through the eighth resistor R8, and is connected to the VC7 port and VC6 port of the BMS chip U2 through the ninth resistor R9.

[0039] The collector of the first transistor Q1 is connected to the positive terminal of the sixth battery cell via the tenth resistor R10, the emitter is connected to the positive terminal of the fifth battery cell, and the base is connected to the VC5 port of the BMS chip U2 via the eleventh resistor R11. One end of the twelfth resistor R12 is connected to the VC5 port of the BMS chip U2, and the other end is connected to the emitter of the first transistor Q1. One end of the thirteenth resistor R13 is connected to the VC6 port of the BMS chip U2, and the other end is connected to the VC5 port of the BMS chip U2.

[0040] The collector of the second transistor Q2 is connected to the positive terminal of the fifth battery cell through the fourteenth resistor R14, the emitter is connected to the positive terminal of the fourth battery cell, and the base is connected to the VC4 port of the BMS chip U2 through the fifteenth resistor R15. One end of the sixteenth resistor R16 is connected to the VC4 port of the BMS chip U2, and the other end is connected to the emitter of the second transistor Q2. One end of the seventeenth resistor R17 is connected to the VC5 port of the BMS chip U2, and the other end is connected to the VC4 port of the BMS chip U2.

[0041] The collector of the third transistor Q3 is connected to the positive terminal of the fourth battery cell through the eighteenth resistor R18, the emitter is connected to the positive terminal of the third battery cell, and the base is connected to the VC3 port of the BMS chip U2 through the nineteenth resistor R19. One end of the twentieth resistor R20 is connected to the VC3 port of the BMS chip U2, and the other end is connected to the emitter of the third transistor Q3.

[0042] The collector of the fourth transistor Q4 is connected to the positive terminal of the third battery cell via the twenty-first resistor R21, the emitter is connected to the positive terminal of the second battery cell, and the base is connected to the VC2 port of the BMS chip U2 via the twenty-second resistor R22. One end of the twenty-third resistor R23 is connected to the VC3 port of the BMS chip U2, and the other end is connected to the emitter of the fourth transistor Q4.

[0043] The collector of the fifth transistor Q5 is connected to the positive terminal of the second battery cell through the twenty-fourth resistor R24, the emitter is connected to the positive terminal of the first battery cell, and the base is connected to the VC1 port of the BMS chip U2 through the twenty-fifth resistor R25. One end of the twenty-sixth resistor R26 is connected to the VC1 port of the BMS chip U2, and the other end is connected to the emitter of the fifth transistor Q5.

[0044] The collector of the sixth transistor Q6 is connected to the positive terminal of the first battery cell via the twenty-seventh resistor R27, and the emitter is connected to the negative terminal of the first battery cell (i.e., the negative terminal B- of the battery body 10). The base is connected to the VCO port of the BMS chip U2 via the twenty-eighth resistor R28. One end of the twenty-ninth resistor R29 is connected to the VCO port of the BMS chip U2, and the other end is connected to the emitter of the sixth transistor Q6.

[0045] The BMS chip U2 obtains the voltage of each battery cell through its VC0-VC7 ports, thereby performing over- and under-voltage protection and battery balancing for each battery cell; the first transistor Q1 to the sixth transistor Q6 are used to increase the balancing current.

[0046] The BMS chip U2 obtains power through the power supply terminal VDD, and the ground terminal VSS of the BMS chip U2 is connected to the negative terminal B- of the first battery cell.

[0047] The seventh capacitor C7 has one end connected to the power supply terminal VDD of the BMS chip U2, and the other end grounded. The cathode of the fourth Zener diode ZD4 is connected to the power supply terminal VDD of the BMS chip U2, and the anode is grounded. The eighth capacitor C8 has one end connected to the VC7 / VC6 port of the BMS chip U2, and the other end grounded. The ninth capacitor C9 has one end connected to the VC5 port of the BMS chip U2, and the other end grounded. The tenth capacitor C10 has one end connected to the VC4 port of the BMS chip U2, and the other end grounded. The eleventh capacitor C11 has one end connected to the VC3 port of the BMS chip U2, and the other end grounded. The twelfth capacitor C12 has one end connected to the VC2 port of the BMS chip U2, and the other end grounded. The thirteenth capacitor C13 has one end connected to the VC1 port of the BMS chip U2, and the other end grounded. The fourteenth capacitor C14 has one end connected to the VC0 port of the BMS chip U2, and the other end grounded.

[0048] The VM port of the BMS chip U2 is the battery negative voltage detection port, which is connected to the second terminal P2- of the current sampling resistor Rs1 through the thirtieth resistor R30.

[0049] The CO port of the BMS chip U2 is a charging protection output port, which is connected to the input terminal of the charging switch unit. The charging switch unit has a first switch S1 connected in series between the second terminal P2- of the current sampling resistor Rs1 and the negative terminal B- of the battery body 10. The charging control signal output by the CO port of the BMS chip U2 controls the opening and closing of the first switch S1 through the charging switch unit, thereby controlling the opening and closing of the charging circuit between the battery body 10 and the external charging power supply, achieving the charging protection effect.

[0050] The DO port of the BMS chip U2 is a discharge protection output port, which is connected to the input terminal of the discharge switch unit. The discharge switch unit has a second switch S2 connected in series between the second terminal P2- of the current sampling resistor Rs1 and the negative terminal B- of the battery body 10. The discharge control signal output by the DO port of the BMS chip U2 controls the on / off state of the second switch S2 through the discharge switch unit, thereby controlling the on / off state of the discharge circuit between the battery body 10 and the external load, achieving the discharge protection effect.

[0051] The CIT port of the BMS chip U2 is an overcurrent delay setting port, which is connected to the negative terminal B- of the battery body 10 through the fifteenth capacitor C15.

[0052] The CS port of the BMS chip U2 is an overcurrent detection port, which is connected to the negative terminal B- of the battery body 10 through the thirty-first resistor R31 and the thirty-second resistor R32. One end of the sixteenth capacitor C16 is connected to the CS port of the BMS chip U2, and the other end is connected to the negative terminal B- of the battery body 10.

[0053] The TDOT port, RCOT port, and RUT port of the BMS chip U2 are respectively the discharge over-temperature detection port, the charging over-temperature detection port, and the low temperature detection port, which are connected to the thermistor NTCB through the thirty-third resistor R33, the thirty-fourth resistor R34, and the thirty-fifth resistor R35.

[0054] The SEL0 and SEL1 ports of the BMS chip U2 are battery cell selection ports. In this embodiment, the SEL0 and SEL1 ports are grounded through resistors R36 and R37, respectively.

[0055] Furthermore, the voltage sampling unit 21 also includes a second diode D2, a third diode D3, and a seventeenth capacitor C17. The cathode of the second diode D2 is connected to the +5V on-chip power supply, and the anode is connected to the positive voltage output terminal BV. The cathode of the third diode D3 is connected to the positive voltage output terminal BV, and the anode is grounded. One end of the seventeenth capacitor C17 is connected to the positive voltage output terminal BV, and the other end is grounded. The current acquisition unit 22 also includes a fourth diode D4, a fifth diode D5, and an eighteenth capacitor C18. The cathode of the fourth diode D4 is connected to the +5V on-chip power supply, and the anode is connected to the charge / discharge current signal output terminal BI. The cathode of the fifth diode D5 is connected to the charge / discharge current signal output terminal BI, and the anode is grounded. One end of the eighteenth capacitor C18 is connected to the charge / discharge current signal output terminal BI, and the other end is grounded.

[0056] The second diode D2, the third diode D3, the fourth diode D4, and the fifth diode D5 form a clamping circuit, which can correct the waveform of the positive voltage signal BV and the charging / discharging current signal BI by limiting the DC component in the signal. This solves the problem of level fluctuation caused by loss of DC component or interference, making the positive voltage signal BV and the charging / discharging current signal BI more stable and reliable, thereby ensuring the accuracy of subsequent power calculation and protecting the signal transmission port of the main control chip MCU.

[0057] In this embodiment, the current acquisition chip U1 is model SGM8199, the on-chip power supply VCC is a 12V DC power supply, and the BMS chip U2 is model CW1274.

[0058] This invention offers the following technical advantages: Instead of using a front-end analog IC, it employs a current differential amplifier to collect charging and discharging currents and calculate battery capacity, resulting in a lower cost compared to existing battery capacity calculation schemes based on front-end analog ICs and microcontrollers. Experiments have shown that the battery capacity monitoring error of this invention is less than 1%, similar to the accuracy of existing battery capacity calculation schemes based on front-end analog ICs and microcontrollers. Therefore, this invention achieves high monitoring accuracy at a lower cost, demonstrating high cost-effectiveness.

[0059] The embodiments described above are merely examples of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and this utility model also intends to include these modifications and variations.

Claims

1. A battery management system with power monitoring function, characterized in that, include: A voltage acquisition unit has one end connected to the positive terminal of the battery body and the other end grounded, thereby acquiring the positive terminal voltage of the battery body. A current acquisition unit is provided with a current sampling resistor; the first end of the current sampling resistor is grounded, and the second end is connected to the negative terminal of the battery body, thereby acquiring the charging and discharging current signal of the battery body. The main control chip monitors the battery power based on the positive electrode voltage and charging / discharging current signals; The current acquisition unit includes a current acquisition chip, a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor. The current acquisition chip is a current differential amplifier. Its non-inverting input terminal is connected to the first terminal of the current sampling resistor through the third resistor, its inverting input terminal is connected to the second terminal of the current sampling resistor through the fourth resistor, and its output terminal is connected to the charge / discharge current signal output terminal through the fifth resistor. The power supply terminal of the current acquisition chip is connected to the on-chip power supply, its ground terminal is grounded, and its reference terminal is connected to the on-chip power supply through the sixth resistor.

2. The battery management system with power monitoring function according to claim 1, characterized in that: The current acquisition unit also includes: The second capacitor has one end connected to the non-inverting input terminal of the current acquisition chip and the other end grounded. The third capacitor has one end connected to the inverting input terminal of the current acquisition chip and the other end grounded. The fourth capacitor has one end connected to the power supply terminal of the current acquisition chip and the other end grounded. The fifth capacitor has one end connected to the reference terminal of the current acquisition chip and the other end grounded. The second Zener diode has its cathode connected to the reference terminal of the current acquisition chip and its anode grounded, thereby providing a stable reference voltage to the reference terminal of the current acquisition chip. The third Zener diode has its cathode connected to the charge / discharge current signal output terminal and its anode grounded. The sixth capacitor has one end connected to the charging / discharging current signal output terminal and the other end grounded. The seventh resistor has one end connected to the output terminal of the charging and discharging current signal, and the other end grounded.

3. The battery management system with power monitoring function according to claim 2, characterized in that: The voltage acquisition unit includes: The first resistor has one end connected to the positive terminal of the battery body and the other end connected to the positive voltage output terminal of the main control chip. The second resistor has one end connected to the positive voltage output terminal and the other end grounded. The first Zener diode has its cathode connected to the positive voltage output terminal and its anode grounded. The first capacitor has one end connected to the positive voltage output terminal and the other end grounded.

4. The battery management system with power monitoring function according to claim 3, characterized in that: The voltage acquisition unit also includes: The second diode has its cathode connected to the on-chip power supply and its anode connected to the positive voltage output terminal. The third diode has its cathode connected to the positive voltage output terminal and its anode grounded. The seventeenth capacitor has one end connected to the positive voltage output terminal and the other end grounded.

5. The battery management system with power monitoring function according to claim 4, characterized in that: The current acquisition unit also includes: The fourth diode has its cathode connected to the on-chip power supply and its anode connected to the charge / discharge current signal output terminal. The fifth diode has its cathode connected to the charge / discharge current signal output terminal and its anode grounded. The eighteenth capacitor has one end connected to the charging / discharging current signal output terminal and the other end grounded.

6. The battery management system with power monitoring function according to claim 5, characterized in that: It also includes a BMS chip connected to the main control chip; The main control chip also controls the charging process of the battery body according to the battery power through the BMS chip; The CO port of the BMS chip is a charging protection output port connected to the charging switch unit. The charging switch unit is provided with a first switch connected in series between the second end of the current sampling resistor and the negative terminal of the battery body; The charging control signal output by the CO port of the BMS chip controls the opening and closing of the first switch through the charging switch unit, thereby controlling the opening and closing of the charging circuit between the battery body and the external charging power supply.

7. The battery management system with power monitoring function according to claim 6, characterized in that: The main control chip also controls the discharge process of the battery body according to the battery power through the BMS chip; The DO port of the BMS chip is the discharge protection output port connected to the discharge switch unit. The discharge switch unit is provided with a second switch connected in series between the second end of the current sampling resistor and the negative terminal of the battery body; The discharge control signal output by the DO port of the BMS chip controls the on / off state of the second switch through the discharge switch unit, thereby controlling the on / off state of the discharge circuit between the battery body and the external load.

8. An energy storage power source, characterized in that, include: The battery body and the battery management system with power monitoring function as described in any one of claims 1-7; the battery management system is electrically connected to the battery body and monitors the power of the battery body by collecting the positive electrode voltage and charging / discharging current signals of the battery body.

9. The energy storage power supply according to claim 8, characterized in that: The battery body includes several battery cells connected in series; The battery management system also collects the positive voltage of each battery cell in the battery body, and monitors the battery body's charge level based on the positive voltage of each battery cell and the charging and discharging current signal of the battery body.

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