SiC MOSFET phase-shifted full-bridge topology circuit

Abstract

The utility model discloses a SiC MOSFET phase-shifted full-bridge topology circuit, which belongs to the technical field of topology circuits, and comprises a three-phase full-bridge rectifier, the three-phase full-bridge rectifier is respectively coupled with a leading bridge arm module and a lagging bridge arm module, the three-phase full-bridge rectifier is coupled with a high-frequency frequency converter T through the leading bridge arm module and the lagging bridge arm module, and the three-phase full-bridge rectifier is connected with the high-frequency frequency converter T through the lagging bridge arm module. The diode group is coupled through the high-frequency frequency converter T;

Description

Technical Field

[0001] This utility model relates to a topology circuit, and more particularly to a SiC MOSFET phase-shifted full-bridge topology circuit, belonging to the field of topology circuit technology. Background Technology

[0002] With the rapid development of my country's social economy and the country's strong support for the new energy industry, switching power supplies have been widely used in various fields.

[0003] The development trend of switching power supplies is towards high power, high efficiency, and small size. However, high efficiency and small size are contradictory. The most direct and effective way to reduce the size of switching power supplies is to increase the operating frequency of the power supply, thereby reducing the size of frequency-related and large components such as inductors, capacitors, and high-frequency transformers. However, increasing the frequency means increasing the number of times the power switching transistor switches per unit time, which will directly lead to an increase in switching losses and a decrease in power supply efficiency. Soft switching technology can improve power supply efficiency while increasing the switching frequency.

[0004] Among numerous soft-switching topologies, the phase-shifted full-bridge topology has advantages such as simple circuit structure and easy parameter design, and is widely used in medium and high power applications. The phase-shifted full-bridge converter has advantages such as simple topology, constant switching frequency, zero voltage turn-on (ZVS) using only its own parasitic parameters, low switching loss, and high efficiency. Moreover, with the emergence of third-generation wide-bandgap material SiC, SiC power devices have good application prospects in high-temperature, high-voltage, high-frequency, and high-power applications. Due to the high switching speed and parasitic parameters of SiC MOSFETs, the phase-shifted full-bridge topology has problems such as voltage oscillation and circulating current loss caused by parasitic capacitance of the secondary rectifier bridge, and false turn-off caused by interlayer capacitance interference after the introduction of SiC MOSFETs. Utility Model Content

[0005] The main purpose of this invention is to provide a SiC MOSFET phase-shifted full-bridge topology circuit.

[0006] The objective of this utility model can be achieved by adopting the following technical solution:

[0007] A SiC MOSFET phase-shifted full-bridge topology circuit includes a three-phase full-bridge rectifier, wherein the three-phase full-bridge rectifier is coupled to a leading bridge arm module and a lagging bridge arm module respectively.

[0008] The three-phase full-bridge rectifier is coupled to the high-frequency inverter T through the leading and lagging bridge arm modules, and is coupled to the diode group through the high-frequency inverter T.

[0009] Preferably, the three-phase full-bridge rectifier includes diodes D1 to D6, with the anode of diode D1 electrically connected to the AC current U. A The cathode of diode D4;

[0010] The anode of diode D2 is electrically connected to AC current U. B The cathode of diode D5;

[0011] The anode of diode D3 is electrically connected to AC current U. C The cathode of diode D6;

[0012] The cathodes of diodes D1 to D3 are electrically connected to the leading and lagging bridge arm modules.

[0013] The anodes of diodes D4 to D6 are electrically connected to the leading and lagging bridge arm modules.

[0014] Preferably, the advanced bridge arm module includes SiC MOSFET Q1 and SiC MOSFET Q2;

[0015] The drain of SiC MOSFET Q1 is electrically connected to the cathode of diode D1 to diode D3;

[0016] The source of SiC MOSFET Q2 is electrically connected to the anode of diode D4 to diode D6;

[0017] The source of SiC MOSFET Q1 is electrically connected to the drain of SiC MOSFET Q2 and connected to an inductor Lr. The other end of the inductor Lr is electrically connected to the anode of diode Dcl, the cathode of diode Dc2, and one end of Np of the high-frequency inverter T.

[0018] Preferably, the anode of diode Dc2 is electrically connected to the source of SiC MOSFET Q2, and the drain of SiC MOSFET Q1 is electrically connected to the cathode of diode Dcl.

[0019] The hysteresis bridge arm module includes a SiC MOSFET Q3 whose drain is electrically connected to the other end of the Np terminal of the high-frequency inverter T, a SiC MOSFET Q3 whose source is electrically connected to the anode of the diode Dc2, a SiC MOSFET Q4 whose drain is electrically connected to the other end of the Np terminal of the high-frequency inverter T, and a SiC MOSFET Q4 whose source is electrically connected to the cathode of the diode Dcl.

[0020] Preferably, the diode group includes diodes Dr1 to Dr4;

[0021] The anode of diode Dr1 is electrically connected to the cathode of diode Dr2, the cathode of diode Dr1 is electrically connected to the cathode of diode Dr4, the cathode of diode Dr3 is electrically connected to the anode of diode Dr4, the anode of diode Dr4 is electrically connected to the anode of diode Dr2, the anode of diode Dr1 is electrically connected to one end of Ns of high-frequency transformer T, and the cathode of diode Dr3 is electrically connected to the other end of Ns of high-frequency transformer T.

[0022] Preferably, the cathode of diode Dr4 is electrically connected to the anode of diode D7 and one end of inductor Lf;

[0023] The cathode of diode D7 is electrically connected to one end of capacitor Ck and the source of SiC MOSFET Q5;

[0024] The other end of capacitor Ck is electrically connected to the anode of diode Dr3, the drain of SiC MOSFET Q6, one end of capacitor Cf, and the negative terminal of Rload;

[0025] The anode of Rload is electrically connected to the other end of inductor Lf, the other end of inductor Lk, and the other end of capacitor Cf.

[0026] The beneficial technical effects of this utility model are as follows:

[0027] This invention provides a SiC MOSFET phase-shifted full-bridge topology circuit, which proposes a SiC MOSFET phase-shifted full-bridge topology with an active absorption circuit on the secondary side.

[0028] This invention proposes a method to solve the problem of false turn-off caused by interlayer capacitance interference in SiC MOSFET phase-shifted full-bridge topology under no-load conditions.

[0029] This invention proposes an active absorption circuit to solve the parasitic oscillation problem of secondary rectifier diodes. It can absorb the oscillation voltage and feed the energy in the absorption capacitor back to the load, with virtually no additional losses. Attached Figure Description

[0030] Figure 1 This is a circuit diagram of a preferred embodiment of a SiC MOSFET phase-shifted full-bridge topology circuit according to the present invention;

[0031] Figure 2 This is a power efficiency curve of a phase-shifted full-bridge circuit according to a preferred embodiment of the SiC MOSFET phase-shifted full-bridge topology circuit of the present invention.

[0032] Figure 3The image shows the input signal Vin and VDS waveforms of a SiC MOSFET phase-shifted full-bridge topology circuit according to a preferred embodiment of the present invention when the SiC MOSFET is turned on under no-load conditions.

[0033] Figure 4 This diagram illustrates the effect of interlayer capacitance Cg on input signal voltage Vin in a preferred embodiment of a SiC MOSFET phase-shifted full-bridge topology circuit according to the present invention. Detailed Implementation

[0034] To enable those skilled in the art to understand the technical solution of this utility model more clearly, the present utility model will be further described in detail below with reference to the embodiments and accompanying drawings, but the implementation of this utility model is not limited thereto.

[0035] like Figures 1-4 As shown, this embodiment provides a SiC MOSFET phase-shifted full-bridge topology circuit, including a three-phase full-bridge rectifier, which is coupled to a leading bridge arm module and a lagging bridge arm module respectively.

[0036] The three-phase full-bridge rectifier is coupled to the high-frequency inverter T through the leading and lagging bridge arm modules, and is coupled to the diode group through the high-frequency inverter T.

[0037] In this embodiment, the three-phase full-bridge rectifier includes diodes D1 to D6, with the anode of diode D1 electrically connected to the AC current U. A The cathode of diode D4;

[0038] The anode of diode D2 is electrically connected to AC current U. B The cathode of diode D5;

[0039] The anode of diode D3 is electrically connected to AC current UC and the cathode of diode D6;

[0040] The cathodes of diodes D1 to D3 are electrically connected to the leading and lagging bridge arm modules.

[0041] The anodes of diodes D4 to D6 are electrically connected to the leading and lagging bridge arm modules.

[0042] Figure 1This is a schematic diagram of a phase-shifted full-bridge rectifier. In the diagram, UA, UB, and UC represent three-phase AC power. D1 to D6 are six diodes forming a three-phase full-bridge rectifier. Q1 to Q4 are four SiC MOSFETs. Q1 and Q2 are located on the high and low voltage sides of the leading arm, respectively, and Q4 and Q3 are located on the high and low voltage sides of the lagging arm, respectively. T is a high-frequency transformer with a turns ratio K = Ns / Np, where Np is the number of turns on the primary side and Ns is the number of turns on the secondary side. Lr is the resonant inductor. Cf is the output filter capacitor. Lf is the output filter inductor. ILr is the current flowing through Lr. Ip is the current flowing through the primary side of T. VAB is the voltage between the midpoint A of the leading arm and the midpoint B of the lagging arm. VDC is the bus voltage. Vrect is the voltage on the secondary side of the high-frequency transformer after passing through the rectifier diodes. D7 is the absorption diode. Q5 and Q6 are the switching transistors in the Buck circuit. Lk is the absorption inductor.

[0043] When using a double-layer PCB, due to routing limitations, the drain traces had to be placed below the drive circuit in the DC bus stack-up layout. Two SiC MOSFETs were used in parallel, with their drain traces connected and located below the drive circuit. The drive circuit contained only one SOT-23-6 packaged driver chip and several 0805 packaged resistors and capacitors, achieving a sufficiently small drive circuit area. Experiments showed that under no-load conditions, the SiC MOSFETs in the phase-shifted full-bridge topology experienced zero-voltage turn-off, and their conduction was hard conduction. The conduction process of the SiC MOSFETs under no-load conditions was tested at a DC bus voltage of 200V, and the waveforms are shown below. Figure 3 As shown, it was found that when the drain-source voltage VDS decreases, the input signal voltage Vin of the driver chip also decreases. This decrease in Vin causes the SiC MOSFET to be mistakenly turned off, and VDS stops decreasing and plateaus. Therefore, it is evident that changes in the VDS of the SiC MOSFET interfere with the input signal. Figure 3 The reason for the drop in input signal voltage Vin is that the drain is located below the input signal line in the PCB layout. There is an interlayer capacitance Cg between the input signal and the drain, which causes coupling between the drain-source voltage VDS and Vin.

[0044] The phase-shifted full-bridge topology power supply designed in this invention has a rated input voltage of 380V AC and a rated output power of 8kW. The efficiency of the power supply was tested when the three-phase AC input voltage Vin was at its minimum, rated, and maximum values, respectively. The efficiency versus load curves are shown below. Figure 2 As shown, the converter efficiency is greater than 94% within the 20%–100% load range, with a maximum efficiency of 98.2%. When the load remains constant, the efficiency decreases with increasing Vin, reaching 97.3% at full load when Vin is at its maximum.

[0045] The coupling effect of the power circuit to the drive circuit is related to the coupling capacitances Cg, Riso, and Cin. The larger Cg and Riso are, the stronger the coupling effect. To reduce the coupling effect of the power circuit to the drive circuit, a four-layer PCB board is used, separating the power circuit and the drive circuit. A layered layout structure with a control source "ground" is placed below the drive circuit to reduce the coupling capacitance. Selecting an isolation chip with strong current-carrying capability and low output resistance can solve this problem. In the figure, the drive circuit adopts a layered layout structure, and the power circuit adopts a layered bus layout and is placed in the middle of the PCB board without intersecting with the drive board.

[0046] In this embodiment, the advanced bridge arm module includes SiC MOSFET Q1 and SiC MOSFET Q2;

[0047] The drain of SiC MOSFET Q1 is electrically connected to the cathode of diode D1 to diode D3;

[0048] The source of SiC MOSFET Q2 is electrically connected to the anode of diode D4 to diode D6;

[0049] The source of SiC MOSFET Q1 is electrically connected to the drain of SiC MOSFET Q2 and connected to an inductor Lr. The other end of the inductor Lr is electrically connected to the anode of diode Dcl, the cathode of diode Dc2, and one end of Np of the high-frequency inverter T.

[0050] In this embodiment, the anode of diode Dc2 is electrically connected to the source of SiC MOSFET Q2, and the drain of SiC MOSFET Q1 is electrically connected to the cathode of diode Dcl.

[0051] The hysteresis bridge arm module includes a SiC MOSFET Q3 whose drain is electrically connected to the other end of the Np terminal of the high-frequency inverter T, a SiC MOSFET Q3 whose source is electrically connected to the anode of the diode Dc2, a SiC MOSFET Q4 whose drain is electrically connected to the other end of the Np terminal of the high-frequency inverter T, and a SiC MOSFET Q4 whose source is electrically connected to the cathode of the diode Dcl.

[0052] In this embodiment, the diode group includes diodes Dr1 to Dr4;

[0053] The anode of diode Dr1 is electrically connected to the cathode of diode Dr2, the cathode of diode Dr1 is electrically connected to the cathode of diode Dr4, the cathode of diode Dr3 is electrically connected to the anode of diode Dr4, the anode of diode Dr4 is electrically connected to the anode of diode Dr2, the anode of diode Dr1 is electrically connected to one end of Ns of high-frequency transformer T, and the cathode of diode Dr3 is electrically connected to the other end of Ns of high-frequency transformer T.

[0054] In this embodiment, the cathode of diode Dr4 is electrically connected to the anode of diode D7 and one end of inductor Lf;

[0055] The cathode of diode D7 is electrically connected to one end of capacitor Ck and the source of SiC MOSFET Q5;

[0056] The other end of capacitor Ck is electrically connected to the anode of diode Dr3, the drain of SiC MOSFET Q6, one end of capacitor Cf, and the negative terminal of Rload;

[0057] The anode of Rload is electrically connected to the other end of inductor Lf, the other end of inductor Lk, and the other end of capacitor Cf.

[0058] The above description is only a further embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the scope disclosed by the present utility model, based on the technical solution and concept of the present utility model, shall fall within the protection scope of the present utility model.

Claims

1. A SiC MOSFET phase-shifted full-bridge topology circuit, characterized in that: It includes a three-phase full-bridge rectifier, which is coupled to the leading arm module and the lagging arm module respectively; The three-phase full-bridge rectifier is coupled to the high-frequency inverter T through the leading and lagging bridge arm modules, and is coupled to the diode group through the high-frequency inverter T.

2. The SiC MOSFET phase-shifted full-bridge topology circuit according to claim 1, characterized in that: The three-phase full-bridge rectifier includes diodes D1 to D6, with the anode of diode D1 electrically connected to the AC current U. A The cathode of diode D4; The anode of diode D2 is electrically connected to AC current U. B The cathode of diode D5; The anode of diode D3 is electrically connected to AC current U. C The cathode of diode D6; The cathodes of diodes D1 to D3 are electrically connected to the leading and lagging bridge arm modules. The anodes of diodes D4 to D6 are electrically connected to the leading and lagging bridge arm modules.

3. The SiC MOSFET phase-shifted full-bridge topology circuit according to claim 2, characterized in that: The advanced bridge arm module includes SiC MOSFET Q1 and SiC MOSFET Q2; The drain of SiC MOSFET Q1 is electrically connected to the cathode of diode D1 to diode D3; The source of SiC MOSFET Q2 is electrically connected to the anode of diode D4 to diode D6; The source of SiC MOSFET Q1 is electrically connected to the drain of SiC MOSFET Q2 and connected to an inductor Lr. The other end of the inductor Lr is electrically connected to the anode of diode Dcl, the cathode of diode Dc2, and one end of Np of the high-frequency inverter T.

4. The SiC MOSFET phase-shifted full-bridge topology circuit according to claim 3, characterized in that: The anode of diode Dc2 is electrically connected to the source of SiC MOSFET Q2, and the drain of SiC MOSFET Q1 is electrically connected to the cathode of diode Dcl. The hysteresis bridge arm module includes a SiC MOSFET Q3 whose drain is electrically connected to the other end of the Np terminal of the high-frequency inverter T, a SiC MOSFET Q3 whose source is electrically connected to the anode of the diode Dc2, a SiC MOSFET Q4 whose drain is electrically connected to the other end of the Np terminal of the high-frequency inverter T, and a SiC MOSFET Q4 whose source is electrically connected to the cathode of the diode Dcl.

5. A SiC MOSFET phase-shifted full-bridge topology circuit according to claim 4, characterized in that: The diode group includes diodes Dr1 through Dr4; The anode of diode Dr1 is electrically connected to the cathode of diode Dr2, the cathode of diode Dr1 is electrically connected to the cathode of diode Dr4, the cathode of diode Dr3 is electrically connected to the anode of diode Dr4, the anode of diode Dr4 is electrically connected to the anode of diode Dr2, the anode of diode Dr1 is electrically connected to one end of Ns of high-frequency transformer T, and the cathode of diode Dr3 is electrically connected to the other end of Ns of high-frequency transformer T.

6. The SiC MOSFET phase-shifted full-bridge topology circuit according to claim 5, characterized in that: The cathode of diode Dr4 is electrically connected to the anode of diode D7 and one end of inductor Lf; The cathode of diode D7 is electrically connected to one end of capacitor Ck and the source of SiC MOSFET Q5; The other end of capacitor Ck is electrically connected to the anode of diode Dr3, the drain of SiC MOSFET Q6, one end of capacitor Cf, and the negative terminal of Rload; The anode of Rload is electrically connected to the other end of inductor Lf, the other end of inductor Lk, and the other end of capacitor Cf.

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