Endoscope image acquisition module and endoscope image processing system

Abstract

The utility model discloses an endoscope image acquisition module and an endoscope image processing system.The endoscope image acquisition module comprises a first FPGA, a serial chip, a first image sensor and a second image sensor, the output end of the first image sensor is connected with the input end of the first FPGA, and the output end of the second image sensor is connected with the input end of the serial chip; the output end of the second image sensor is connected with the input end of the serial chip, and the data transmission modes of the first image sensor and the second image sensor are different. Wherein serialization processing of data is achieved through the serialization chip, the situation that the size of the head end of an endoscope body is increased by adopting a high-performance FPGA is avoided, and meanwhile in order to avoid the temperature rise phenomenon caused by the high-power-consumption FPGA, the FPGA located at the head end of the endoscope body is only used for parameter configuration of an image sensor and serialization processing of high-speed data. Therefore, by combining the FPGA and the serial chip, the size of the endoscope image acquisition module can be reduced as much as possible under the condition that different types of multi-path image sensors are accessed, and too fast temperature rise is avoided.

Description

Technical Field

[0001] This application relates to the field of image processing technology, and in particular to an endoscope image acquisition module and an endoscope image processing system. Background Technology

[0002] Rigid electronic endoscopes mostly use 4K resolution sensors (image sensors). The data output of 4K image sensors is typically 10-16 channels of Low Voltage Differential Signaling (LVDS) or supports 4-8 channels of Mobile Industry Processor Standard (MIPI). Currently, to meet the demand for high-resolution image data, it is often necessary to combine multiple sensors using these two different data transmission methods. For example, a 4K color sensor and a 4K monochrome sensor can be combined to form a 4K white light and fluorescence combined camera. However, if multiple sensors with different data transmission methods are connected simultaneously, the sensor supporting the MIPI data transmission protocol has higher performance requirements for the FPGA. The size of the FPGA often increases with performance, but for endoscope products, smaller insertion tubes and their end caps result in better insertion. Furthermore, high-performance FPGAs can lead to excessive power consumption and temperature rise, which can affect image transmission quality.

[0003] In summary, how to minimize the size of the acquisition module when connecting different types of image sensors is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] The purpose of this application is to provide an endoscope image acquisition module and an endoscope image processing system that, while enabling the connection of multiple image sensors of different types, minimizes the size of the endoscope image acquisition module and avoids excessive temperature rise.

[0005] To solve the above-mentioned technical problems, this application provides the following technical solution:

[0006] An endoscopic image acquisition module includes: a first FPGA, a serialization chip, a first image sensor, and a second image sensor. The output terminal of the first image sensor is connected to the input terminal of the first FPGA, and the output terminal of the second image sensor is connected to the input terminal of the serialization chip. The data transmission methods of the first image sensor and the second image sensor are different.

[0007] Preferably, the data transmission method of the first image sensor supports LVDS, and the data transmission method of the second image sensor supports MIPI.

[0008] An endoscopic image processing system includes an electro-optical conversion module, a photoelectric conversion module, an image processing module, and an endoscopic image acquisition module as described above.

[0009] The output terminal of the first FPGA and the output terminal of the serialization chip are respectively connected to the input terminal of the electro-optical conversion module, which are used to convert the electrical signals output by the first image sensor and the second image sensor into optical signals;

[0010] The output terminal of the electro-optical conversion module is connected to the input terminal of the photoelectric conversion module, and is used to convert the optical signal into an electrical signal;

[0011] The output terminal of the photoelectric conversion module is connected to the image processing module, and is used to transmit the electrical signal to the image processing module, so that the image processing module can process the image signals acquired by the first image sensor and the second image sensor.

[0012] Preferably, the image processing module includes a second FPGA and a deserialization chip; the output terminal of the photoelectric conversion module is connected to the input terminal of the second FPGA and the input terminal of the deserialization chip, respectively, and the output terminal of the deserialization chip is connected to the input terminal of the second FPGA.

[0013] Preferably, it further includes an optical connector, one end of which is connected to the output end of the electro-optical conversion module, and the other end of which is connected to the input end of the photoelectric conversion module. The optical connector is used to realize a detachable connection between the endoscope image acquisition module and the image processing module.

[0014] Preferably, the optical connector includes a plug and a socket that are compatible with each other, wherein the plug and the socket are provided with mutually cooperating optical connection units for conducting optical signals; and the plug and the socket are provided with mutually cooperating electrical connection units for conducting electrical signals.

[0015] Preferably, the optical connection unit includes an optical lens, a ferrule, a sleeve, and a connector. The optical lens is located at one end of the ferrule, and the other end of the ferrule is used to connect to an optical fiber. The optical lens and the ferrule are at least partially nested in the sleeve, and the sleeve is at least partially nested in the connector.

[0016] Preferably, the optical connection unit is arranged along the central axis of the plug and the socket, the optical connection unit of the socket is recessed, the optical connection unit of the plug is protruding, and the electrical connection unit is arranged on the end face of the plug and the socket that are in contact with each other, and the electrical connection unit includes a plurality of pins.

[0017] Preferably, the optical lens is a convex lens.

[0018] Preferably, one of the connectors located in the socket and the connectors located in the plug are provided with a groove, and the other is provided with a protrusion.

[0019] This application provides an endoscope image acquisition module, including: a first FPGA, a serialization chip, a first image sensor, and a second image sensor. The output terminal of the first image sensor is connected to the input terminal of the first FPGA, and the output terminal of the second image sensor is connected to the input terminal of the serialization chip. The data transmission methods of the first image sensor and the second image sensor are different.

[0020] The endoscope image acquisition module provided in this application uses a combination of an FPGA and a serialization chip for processing. It is adaptable to different types of image sensors. When multiple image sensors with different data transmission methods need to be connected, the FPGA requires different performance characteristics to receive image data from different transmission methods. For example, the MIPI transmission rate is higher than the LVDS transmission rate. Correspondingly, receiving MIPI image data requires a higher FPGA performance than receiving LVDS image data. High-performance FPGAs are relatively large. Considering the size requirements of endoscope products, the space occupied by the endoscope image acquisition module located at the insertion tube tip should be as small as possible. Therefore, the processing chip in this application uses a combination of an FPGA and a serialization chip. The first FPGA is connected to the first image sensor that outputs image data in parallel data mode, and the serialization chip is connected to the second image sensor that outputs image data in serial data mode. This design allows sensor parameter configuration and serialization processing to be implemented using a relatively low-performance FPGA, maximizing the use of FPGA development resources while reducing the FPGA's footprint and minimizing the temperature rise caused by FPGA power consumption.

[0021] An endoscopic image processing system provided in this application includes an electro-optical conversion module, a photoelectric conversion module, an image processing module, and an endoscopic image acquisition module as described above. The output terminal of the first FPGA and the output terminal of the serialization chip are respectively connected to the input terminal of the electro-optical conversion module, for converting the electrical signals output by the first image sensor and the second image sensor into optical signals. The output terminal of the electro-optical conversion module is connected to the input terminal of the photoelectric conversion module, for converting the optical signals into electrical signals. The output terminal of the photoelectric conversion module is connected to the image processing module, for transmitting the electrical signals to the image processing module, and processing the image signals acquired by the first image sensor and the second image sensor through the image processing module.

[0022] In other words, because this endoscopic image processing system includes the endoscopic image acquisition module provided in this application, it also possesses the technical effects of that module. By converting the electrical signals output from the endoscopic image acquisition module into optical signals for long-distance transmission via an electro-optical conversion module, problems such as radiation and electrostatic interference caused by electrical signal transmission can be avoided. Using optical fiber enables high-speed signal transmission, meeting the requirements of high-definition video transmission and reducing transmission loss. The acquired image data is transmitted to the image processing module located on the endoscope host side for further image processing. This approach aims to reduce the space occupied by the high-performance FPGA at the insertion tube tip and avoid the power consumption during image processing causing temperature rise at the tip, which would affect the quality of image data transmission. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of an endoscope image acquisition module according to an embodiment of this application;

[0025] Figure 2 This is a schematic diagram of an endoscopic image processing system according to an embodiment of this application;

[0026] Figure 3 This is a schematic diagram of a plug according to an embodiment of this application;

[0027] Figure 4 This is a front view of a socket according to an embodiment of this application;

[0028] Figure 5 This is a schematic cross-sectional view of the inner core in one embodiment of this application;

[0029] Figure 6 This is a schematic diagram of an endoscope system according to an embodiment of this application. Detailed Implementation

[0030] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0031] To facilitate understanding, the relevant terms used in the following text will be explained below:

[0032] 4K resolution, specifically 4096*2160 or 3840*2160;

[0033] Sensor: Image sensor;

[0034] FPGA: Field Programmable Gate Array, a programmable logic device;

[0035] A serialization IC (Integrated Circuit) serializes multiple parallel signals into a single high-speed serial signal, enabling the transmission of high-bandwidth data through a small number of signal channels. At the receiving end, a deserialization IC (i.e., a deserialization chip) restores the serial signal to a parallel signal.

[0036] LVDS: Low Voltage Differential Signal;

[0037] MIPI: Mobile Industry Processor Interface;

[0038] Lane: passageway;

[0039] GTH and GTP: High-speed transmission interfaces.

[0040] Please refer to Figure 1 This application provides an endoscope image acquisition module 10, including: a first FPGA 11, a serialization chip 12, a first image sensor 13, and a second image sensor 14. The output terminal of the first image sensor 13 is connected to the input terminal of the first FPGA 11, and the output terminal of the second image sensor 14 is connected to the input terminal of the serialization chip. The data transmission methods of the first image sensor 13 and the second image sensor 14 are different (i.e., signal output interface 1 and signal output interface 2 are different).

[0041] It should be noted that "first" and "second" are used only to distinguish different objects and have no other limiting meaning. That is, in the embodiments of this application, the first image sensor and the second image sensor support different data transmission methods, and the different data transmission methods correspond to different data processing procedures, and the methods of converting to high-speed serial transmission are also different.

[0042] This application provides an endoscopic image acquisition module, including: a first FPGA, a serialization chip, a first image sensor, and a second image sensor. The output terminal of the first image sensor is connected to the input terminal of the first FPGA, and the output terminal of the second image sensor is connected to the input terminal of the serialization chip. The data transmission methods of the first image sensor and the second image sensor are different.

[0043] The endoscopic image acquisition module provided in this application uses an FPGA and a serialization chip (i.e., a serialization IC) for processing, adaptable to different types of image sensors (i.e., image sensors with different data transmission methods). The first FPGA serializes the image data input in parallel from the first image sensor and outputs high-speed serial data. The serialization chip further serializes the image data input in serial mode from the second image sensor and outputs high-speed serial data. Simultaneously, the first FPGA is also used for configuring image sensor parameters. Since image sensors supporting serial data output often have higher transmission rates than those supporting parallel data output (e.g., image sensors supporting MIPI transmission have higher transmission rates than those supporting LVDS transmission), receiving high-speed image data places higher performance demands on the FPGA, resulting in a larger FPGA size. To avoid increasing the FPGA size and impacting the overall size of the endoscopic image acquisition module, a serialization chip is used to receive image data output serially, while a lower-performance FPGA is used to receive image data output in parallel mode. This design maximizes the utilization of FPGA development resources, reduces the FPGA's footprint, and minimizes the temperature rise caused by FPGA power consumption.

[0044] It should be noted that the size of an FPGA increases with its performance. However, for image acquisition modules used in endoscopes, increasing the height and width will affect the size of the insertion tube tip. Since the insertion tube tip can extend along the axis of the insertion tube towards its base, increasing the length has little impact on the size of the insertion tube tip. Therefore, the impact on the height and width dimensions can be reduced by mounting the serialization chip along the length of the FPGA.

[0045] The first image sensor 13 supports LVDS for data transmission, while the second image sensor 14 supports MIPI for data transmission.

[0046] Currently, 4K resolution image sensors primarily support two different data transmission methods. LVDS has a relatively low transmission rate, but because it transmits pixel-by-pixel data line by line, it needs to be reassembled by an FPGA to convert it into complete image data before being packaged into high-speed serial data for output. Therefore, image data received via LVDS requires data format conversion by the FPGA (i.e., reassembling pixel data into complete image data) before high-speed transmission. Image data received via MIPI, on the other hand, can be directly converted into high-speed serial data for high-speed transmission. Therefore, a second image sensor supporting MIPI is connected to a serialization chip, while a first image sensor supporting LVDS is connected to an FPGA. Since the transmission rate of LVDS is relatively low, the performance requirements for the FPGA are relatively low. However, the transmission rate of MIPI is relatively high. Using a high-performance FPGA for data serialization would waste FPGA development resources, and the large space occupied by a high-performance FPGA at the insertion tube tip is unsuitable for endoscope product development.

[0047] Please refer to Figure 2 This application provides an endoscope image processing system, including an electro-optic conversion module 20, a photoelectric conversion module 21, an image processing module 22, and an endoscope image acquisition module 10 as described above;

[0048] The output terminals of the first FPGA 11 and the serialization chip 12 are respectively connected to the input terminal of the electro-optical conversion module 20, and are used to convert the electrical signals output by the first image sensor 13 and the second image sensor 14 into optical signals.

[0049] The output terminal of the electro-optical conversion module 20 is connected to the input terminal of the photoelectric conversion module 21, and is used to convert optical signals into electrical signals;

[0050] The output of the photoelectric conversion module 21 is connected to the image processing module 22, which transmits electrical signals to the image processing module 22 and processes the image signals acquired by the first image sensor 13 and the second image sensor 14.

[0051] In this embodiment, the signal output by the image sensor is an electrical signal. To address issues such as radiation and electrostatic interference during electrical signal transmission, optical fiber is used for long-distance transmission, thereby enabling high-speed signal transmission and meeting the requirements of high-definition video transmission. Therefore, the output terminals of the first FPGA 11 and the serialization chip 12 are respectively connected to the input terminals of the electro-optical conversion module 20, so that the electro-optical conversion module converts the electrical signal into an optical signal.

[0052] This application provides an endoscopic image processing system, including an electro-optical conversion module, a photoelectric conversion module, an image processing module, and an endoscopic image acquisition module as described above. The output terminals of the first FPGA 11 and the serialization chip 12 are respectively connected to the input terminals of the electro-optical conversion module 20, for converting the electrical signals output by the first image sensor 13 and the second image sensor 14 into optical signals. The output terminal of the electro-optical conversion module 20 is connected to the input terminal of the photoelectric conversion module 21, for converting the optical signals into electrical signals. The output terminal of the photoelectric conversion module 21 is connected to the image processing module 22, for transmitting the electrical signals to the image processing module 22, and processing the image signals acquired by the first image sensor 13 and the second image sensor 14 through the image processing module 22.

[0053] In other words, because this endoscopic image processing system includes the endoscopic image acquisition module provided in this application, it also possesses the technical effects of the endoscopic image acquisition module. The photoelectric conversion module and the electro-optical conversion module can solve problems such as radiation and electrostatic interference during electrical signal transmission. Using optical fiber enables high-speed signal transmission, meeting the requirements of high-definition video transmission. The image processing module is introduced to process the signal; that is, to reduce the temperature rise of the camera, complex image signal processing is not performed on the first FPGA. Furthermore, the image processing module and the endoscopic image acquisition module can transmit signals in the form of optical signals through the electro-optical conversion module and the photoelectric conversion module, effectively avoiding signal interference and reducing transmission loss.

[0054] Please refer to Figure 3 In one specific embodiment of this application, the image processing module includes a second FPGA and a deserialization chip; the output terminal of the photoelectric conversion module is connected to the input terminal of the second FPGA and the input terminal of the deserialization chip, respectively, and the output terminal of the deserialization chip is connected to the input terminal of the second FPGA. The received high-speed serial data is deserialized by the deserialization chip (i.e., deserialization IC) and then transmitted to the second FPGA, where the image processing process is implemented.

[0055] In one specific embodiment of this application, an optical connector is further included. One end of the optical connector is connected to the output end of the electro-optical conversion module, and the other end is connected to the input end of the photoelectric conversion module. The optical connector is used to realize a detachable connection between the endoscope image acquisition module and the image processing module. In this way, a detachable connection can be realized between the endoscope image acquisition module and the image processing module, which facilitates operations such as disinfection and replacement of the endoscope image acquisition module.

[0056] In one specific embodiment of this application, the optical connector includes a mutually compatible plug and socket. The plug and socket are provided with mutually cooperating optical connection units for conducting optical signals; the plug and socket are also provided with mutually cooperating electrical connection units for conducting electrical signals. That is, the plug (e.g., Figure 3 ) and sockets (such as Figure 4 The connection is made by plugging and unplugging. The plug and socket are equipped with mating optical connection units (such as...). Figure 5 This optical connection unit ensures that the optical signal can be conducted when the plug is inserted into the socket. In addition, the plug and socket are equipped with mutually cooperating electrical connection units, which ensure that the electrical signal can be conducted when the plug is inserted into the socket.

[0057] In one specific embodiment of this application, the optical connection unit 500 includes an optical lens 501, a ferrule 502, a sleeve 504, and a connector 401. The optical lens 501 is located at one end of the ferrule 502, and the other end of the ferrule 502 is used to connect an optical fiber 503. The optical lens 501 and the ferrule 502 are at least partially nested within the sleeve 504, and the sleeve 504 is at least partially nested within the connector 401. The optical connection unit installed in the socket and the optical connection unit installed in the plug have the same structure.

[0058] Considering practical applications, optical transmission typically requires multiple optical fibers to transmit signals simultaneously. Therefore, the connector 401 of the optical connection unit incorporates a combination structure of multiple optical lenses 501, ferrules 502, and sleeves 504 to accommodate the number of optical fibers. Within each sleeve 504, from the insertion contact surface inwards, are the optical lens 501 and the ferrule 502, arranged sequentially. During assembly, to find the optimal focusing position of the optical lens 501, i.e., to determine its axial mounting position, a pre-adjustment component (such as a ceramic adjusting sleeve) is typically installed between the optical lens 501 and the ferrule 502 to determine the axial mounting position of the optical lens 501. Once the mounting position is determined, the pre-adjustment component is removed. The sleeves 504 and ferrules 502 are made of ceramic, while the connector 401 is made of metal. In specific implementations, the materials of each structural component can be selected according to actual conditions and are not limited thereto.

[0059] To ensure optical alignment and prevent contamination of the optical path in the connector and socket by disinfectant media (such as disinfectant solutions), the optical lens is located inside the ceramic sleeve. The optical lens and the ceramic sleeve form a sealed structure, preventing disinfectant media from entering the ceramic sleeve and the cable cavity 505 containing the optical fiber. In other words, the ceramic sleeve constrains the relative position of the optical lens and the ceramic ferrule, ensuring their central axes are aligned as much as possible, thus guaranteeing a straight optical path. Furthermore, the sealed design prevents the optical fiber from being contaminated by disinfectant media.

[0060] Considering that the endoscope image acquisition module needs to be disinfected and sterilized, it needs to be waterproofed. Correspondingly, the plugs or sockets in the optical connectors also need to be waterproofed. Specifically, to achieve waterproofing, a waterproof seal design can be implemented for the entire assembly; that is, the sealing structure is for the whole system, and all connecting parts need to be waterproofed.

[0061] In one specific embodiment of this application, the optical connection unit is arranged along the central axis of the plug and socket. The optical connection unit 500 of the socket is recessed, and the optical connection unit of the plug is protruding. The electrical connection unit is disposed on the end faces of the plug and socket that are in contact with each other, and the electrical connection unit includes a plurality of pins 500. Electrical signals and power supply can be transmitted through the pins.

[0062] In one specific embodiment of this application, the optical lens is a convex lens. A convex lens can collimate the diverging beam of the optical fiber into a parallel beam, reducing optical signal divergence and loss. For the receiving end, the convex lens can focus the parallel beam onto the receiving optical fiber, thereby reducing optical coupling power consumption and improving coupling efficiency. Furthermore, the convex lens can help the beam be aligned more precisely, thereby reducing alignment errors between optical connections and ensuring the stability of optical transmission.

[0063] In one specific embodiment of this application, one of the connectors located in the socket and the connector located in the plug is provided with a groove 201, and the other is provided with a protrusion 101. To facilitate detachable connection, the groove 201 can be provided on the connector in the socket, and the protrusion 101 can be provided on the connector in the plug. Thus, the protrusion 101 and the groove 201 cooperate to enable plug-in and plug-out connection between the plug and the socket, facilitating disassembly. Furthermore, to facilitate alignment, the protruding optical connection unit and the recessed optical connection unit can also be provided with notches, protrusions, or other alignment marks, such as text markings.

[0064] Furthermore, the method for achieving a detachable connection between the socket and the plug can also be a snap-fit, or a threaded and bolted structure, etc., and there is no limitation on this.

[0065] Please refer to Figure 6This diagram illustrates the specific structure of an endoscopic image processing system. The system includes an endoscopic image acquisition module, an electro-optical conversion module, an optical connector, a photoelectric conversion module, and an image processing module. The image acquisition module and electro-optical conversion module are mounted on the rigid front end of the endoscope's insertion tube. The optical connector, photoelectric conversion module, and image processing module are located on the endoscope's main unit side. Because the image acquisition module is relatively far from the main unit, and clinical applications require high-quality and real-time image transmission, the image data acquired by the image sensor needs to be transmitted to the main unit in the form of optical signals. Furthermore, to facilitate a detachable connection between the endoscope and the main unit, an optical connector allows for the switching on and off of optical and electrical signals in the image data transmission link without affecting the normal use of the endoscope.

[0066] The endoscope image acquisition module includes two 4K sensors supporting LVDS transmission and two supporting MIPI transmission. All sensor parameter configurations are handled by the first FPGA. The LVDS-supporting sensors are connected to the first FPGA, where sensor data is packaged and sent to a 4-channel photoelectric conversion module via a high-speed GTH or GTP interface. The MIPI-supporting sensors are connected to a serialization IC, which serializes the 4 or 8-channel MIPI signals into a pair of high-speed differential signals and sends them to the 4-channel photoelectric conversion module. The 4-channel electro-optical conversion module converts the high-speed differential signals output from the FPGA and the serialization IC into optical signals for transmission via optical fiber. Power and low-speed control signals for the endoscope image acquisition module are still transmitted using electrical signals.

[0067] The optical signal output from the endoscope image acquisition module is converted into an electrical signal by the photoelectric conversion module and transmitted to the image processing module.

[0068] The image processing module includes a second FPGA and a deserialization IC. The second FPGA communicates with the first FPGA through a low-speed control signal line, receives image data sent by the endoscope image acquisition module, and performs corresponding image processing. Specifically, high-speed differential data sent by the first FPGA through a high-speed GTH or GTP interface is directly transmitted to the second FPGA, while the high-speed differential data sent by the serialization IC is transmitted to the second FPGA after passing through the deserialization IC. The second FPGA performs image processing on the image data.

[0069] The endoscopic image processing system provided in this application supports the access of multiple 4K sensors of different types. Data transmission methods include LVDS image sensors connected to the first FPGA and MIPI image sensors connected to a serialization chip. The 4-channel electro-optical conversion module supports both high-speed differential signal input from the FPGA and serialized MIPI high-speed differential signal input. Each channel supports a 10Gbps data bandwidth and can independently transmit data from one 4K sensor. The optical connector can realize normal switching of both optical and electrical signals, facilitating detachable connection between the host and the endoscope. The image processing module includes an FPGA and a deserialization IC. The deserialization IC is used to deserialize the differential signal serialized by the serialization IC. The deserialized differential signal needs to be transmitted to the second FPGA for corresponding image processing. The second FPGA is used to process the image data acquired by all image sensors; that is, image data processing is performed in the image processing module on the host side. Therefore, the endoscopic image processing system provided in this application has, but is not limited to, the following technical effects:

[0070] (1) Enable multi-channel 4K sensor access;

[0071] (2) Sensors that can simultaneously support LVDS output and MIPI output;

[0072] (3) It can reduce the temperature rise of the endoscope image acquisition module. When using the MIPI output sensor, a low-power FPGA can be used only to configure the sensor parameters and the image data can be serialized and transmitted to the image processing module for processing.

[0073] (4) Sensor data transmission uses optical fiber, which can improve the stability of high-speed signal transmission, ensure signal quality, improve electrostatic interference immunity and reduce signal radiation;

[0074] (5) In order to achieve a detachable connection between the main unit and the endoscope body, the normal switching of the image transmission link is achieved through an optical connector.

[0075] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. An endoscopic image acquisition module, characterized in that, include: The system comprises a first FPGA, a serialization chip, a first image sensor, and a second image sensor. The output terminal of the first image sensor is connected to the input terminal of the first FPGA, and the output terminal of the second image sensor is connected to the input terminal of the serialization chip. The first image sensor and the second image sensor have different data output methods.

2. The endoscopic image acquisition module according to claim 1, characterized in that, The first image sensor supports LVDS for data output, and the second image sensor supports MIPI for data output.

3. An endoscopic image processing system, characterized in that, It includes an electro-optical conversion module, a photoelectric conversion module, an image processing module, and an endoscope image acquisition module as described in claim 1 or 2; The output terminal of the first FPGA and the output terminal of the serialization chip are respectively connected to the input terminal of the electro-optical conversion module, which are used to convert the electrical signals output by the first image sensor and the second image sensor into optical signals; The output terminal of the electro-optical conversion module is connected to the input terminal of the photoelectric conversion module, and is used to convert the optical signal into an electrical signal; The output terminal of the photoelectric conversion module is connected to the image processing module, and is used to transmit the electrical signal to the image processing module, so that the image processing module can process the image signals acquired by the first image sensor and the second image sensor.

4. The endoscopic image processing system according to claim 3, characterized in that, The image processing module includes a second FPGA and a deserialization chip; the output terminal of the photoelectric conversion module is connected to the input terminal of the second FPGA and the input terminal of the deserialization chip, respectively, and the output terminal of the deserialization chip is connected to the input terminal of the second FPGA.

5. The endoscopic image processing system according to claim 3, characterized in that, It also includes an optical connector, one end of which is connected to the output end of the electro-optical conversion module, and the other end of which is connected to the input end of the photoelectric conversion module. The optical connector is used to realize a detachable connection between the endoscope image acquisition module and the image processing module.

6. The endoscopic image processing system according to claim 5, characterized in that, The optical connector includes a plug and a socket that are compatible with each other. The plug and the socket are provided with mutually cooperating optical connection units for conducting optical signals. The plug and the socket are also provided with mutually cooperating electrical connection units for conducting electrical signals.

7. The endoscopic image processing system according to claim 6, characterized in that, The optical connection unit includes an optical lens, a ferrule, a sleeve, and a connector. The optical lens is located at one end of the ferrule, and the other end of the ferrule is used to connect to an optical fiber. The optical lens and the ferrule are at least partially nested in the sleeve, and the sleeve is at least partially nested in the connector.

8. The endoscopic image processing system according to claim 6, characterized in that, The optical connection unit is arranged along the central axis of the plug and the socket. The optical connection unit of the socket is recessed, and the optical connection unit of the plug is protruding. The electrical connection unit is arranged on the end face of the plug and the socket that are in contact with each other. The electrical connection unit includes a plurality of pins.

9. The endoscopic image processing system according to claim 7, characterized in that, The optical lens is a convex lens.

10. The endoscopic image processing system according to claim 6, characterized in that, One of the connectors located in the socket and the connectors located in the plug are provided with a groove, and the other is provided with a protrusion.

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