Gate drive circuit
By employing a structure including resistors and switching transistors in the gate drive circuit, and utilizing the substrate diode of the switching transistor as electrostatic discharge (ESD) protection, the problems of large ESD protection area and switching speed control in the prior art are solved, thereby improving ESD protection effectiveness and reducing layout area.
Patent Information
- Application Number
- CN202422960833.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2034-11-29
AI Technical Summary
In existing gate drive circuits, voltage spikes and electromagnetic interference are prone to occur during the switching process of power transistors. Furthermore, existing ESD devices occupy a large area, making it difficult to achieve effective electrostatic protection when the chip and power transistor are packaged together.
A gate drive circuit including a first resistor, a first switch, a second switch, a second resistor, and a first diode is adopted. By using the substrate diode of the second switch as an electrostatic discharge protection element, the additional ESD device is avoided, the layout area is reduced, and the switching speed is adjusted by controlling the resistance value.
It enables control of the switching speed of power transistors, improves electrostatic discharge protection, reduces layout area and wafer packaging difficulty, avoids static current passing through resistors, and simplifies chip manufacturing process.
Smart Images
Figure CN223528059U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to integrated circuit technical field, concretely relates to a gate drive circuit. BACKGROUND
[0002] In the current gate drive circuit, in order to prevent the power tube from appearing peak voltage or electromagnetic interference in the process of switching from conduction to cut-off and from cut-off to conduction, it is usually necessary to set the gate drive circuit specially for the power tube, as shown below Figure 1 , usually setting ESD at the gate of the power tube to resist the static electricity of the gate to ground, also setting resistance near the gate to control the switching speed of the power tube, in the prior art, the resistance usually needs to be built-in in the chip with the switching tube of the control power tube, and the additional ESD device is set outside the chip, and the switching tube and the ESD device all need to occupy a larger area, and the resistance, diode and resistance in parallel connection between the gate of the power tube and the output end of the switching tube are also used, but this kind of mode is difficult to realize in the scene of the gate control chip and the power tube. SUMMARY
[0003] The embodiment of the utility model aims at providing a gate drive circuit to solve the above problems.
[0004] The embodiment of the utility model realizes the above purpose through the following technical scheme.
[0005] The embodiment of the utility model provides a gate drive circuit, which comprises a first resistor, a first switching tube, a second switching tube, a second resistor and a first diode.
[0006] In some embodiments, the gate drive circuit further comprises a second diode, the anode of the second diode is connected with the second end of the first switching tube, the cathode of the second diode is connected with the second end of the second switching tube, and the second diode is used as a second electrostatic protection element to resist the static electricity from the first voltage end to the output end.
[0007] In some embodiments, the first resistor, the first switching tube, the second switching tube, the second resistor, the first resistor and the second resistor are built in the same wafer.
[0008] In some embodiments, the first voltage terminal, the first resistor, the first switch tube, and the output terminal form a charging circuit, or the output terminal, the second switch tube, the second resistor, and the second voltage terminal form a discharging circuit.
[0009] In some embodiments, the gate drive circuit further comprises: a third diode, an anode of which is connected with the first end of the first switch tube, and a cathode of which is connected with a substrate of the first switch tube; and a fourth diode, an anode of which is connected with a substrate of the second switch tube, and a cathode of which is connected with the first end of the second switch tube.
[0010] In some embodiments, the gate drive circuit further comprises: a power tube connected with the output terminal, the power tube being controlled by the output terminal, the power tube, the first switch tube, the second switch tube, the first diode, the first resistor, and the second resistor being packaged in the same chip, and the power tube, the first switch tube, the first diode, the second resistor, the first resistor, and the second resistor forming a power tube drive circuit.
[0011] In some embodiments, the number of the power tube drive circuits is multiple, two power tubes form a half-bridge circuit, and two power tube drive circuits form a single-phase motor control circuit, and the single-phase motor control circuit is packaged in the same chip.
[0012] In some embodiments, the first switch tube comprises a PMOS.
[0013] In some embodiments, the second switch tube comprises an NMOS.
[0014] In some embodiments, the first voltage terminal is a power supply voltage terminal, and the second voltage terminal is a reference ground terminal.
[0015] The gate drive circuit provided by the embodiments can control the switching speed of the power tube by adopting the gate drive circuit comprising the first resistor, the first switch tube, the second switch tube, the second resistor, and the first diode, and the substrate diode of the second switch tube is used as an electrostatic protection element without the need of additionally setting an ESD device, without the need of adopting wafer bonding packaging, greatly reducing the layout area, and the electrostatic current cannot flow through the first resistor and the second resistor, and the electrostatic protection efficiency can be improved. BRIEF DESCRIPTION OF DRAWINGS
[0016] In order to more clearly illustrate the technical scheme of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0017] Figure 1 is a module schematic diagram of a gate drive circuit in the prior art;
[0018] Figure 2 is a circuit structure schematic diagram of the gate drive circuit provided by the embodiment;
[0019] Figure 3 is another circuit structure schematic diagram of the gate drive circuit provided by the embodiment;
[0020] Figure 4 is a switch tube structure schematic diagram of the gate drive circuit provided by the embodiment. DETAILED DESCRIPTION
[0021] The technical solutions in the embodiments of the utility model will be clearly and completely described in combination with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model.
[0022] As shown in Figure 2 The embodiment provides a gate drive circuit, which can comprise a first resistor R1, a first switch tube P1, a second switch tube N1, a second resistor R2 and a first diode D1. Wherein, the first end of the first resistor R1 is connected with a first voltage end V1; the first end of the first switch tube P1 is connected with the second end of the first resistor R1, and the second end of the first switch tube P1 is connected with an output end OUT; the second end of the second switch tube N1 is connected with the second end of the first switch tube P1; the first end of the second resistor R2 is connected with the first end of the second switch tube N1, and the second end thereof is connected with a second voltage end V2; the anode of the first diode D1 is connected with the substrate of the second switch tube N1 and the second voltage end V2 respectively, the cathode of the first diode D1 is connected with the second end of the second switch tube N1, and the first diode D1 serves as a first electrostatic protection element to resist electrostatic from the output end OUT to the second voltage end V2.
[0023] In the embodiment, the output end OUT is connected with the gate of the power tube M, and the on-off state of the power tube M is controlled by the voltage level of the output end OUT. For example, when the power tube M is an N-type power tube, if the power tube M is in the cut-off state, the first switch tube P1 can be controlled to be turned on, and the first voltage end V1, the first resistor R1, the first switch tube P1 and the output end OUT can form a charging circuit to raise the voltage of the output end OUT, so that the power tube M is switched from the cut-off state to the on state; if the power tube M is in the on state, the second switch tube N1 can be controlled to be turned on, and the output end OUT, the second switch tube N1, the second resistor R2 and the second voltage end V2 can form a discharging circuit to lower the voltage of the output end OUT, so that the power tube M is switched from the on state to the cut-off state.
[0024] In the embodiment, the voltage of the first voltage terminal V1 can be higher than the voltage of the second voltage terminal V2. At a certain moment, the first voltage terminal V1, the first resistor R1, the first switch tube P1 and the output terminal OUT can form a charging circuit, or the output terminal OUT, the second switch tube N1, the second resistor R2 and the second voltage terminal V2 can form a discharging circuit.
[0025] In the embodiment, the resistance value of the first resistor R1 can be set to control the speed of switching the power tube M from the off state to the on state. The greater the resistance value of the first resistor R1, the longer the process of switching the power tube M from the off state to the on state, and vice versa. The resistance value of the second resistor R2 can also be set to control the speed of switching the power tube M from the on state to the off state. The greater the resistance value of the second resistor R2, the longer the process of switching the power tube M from the on state to the off state, and vice versa. Therefore, a person skilled in the art can configure the resistance values of the first resistor R1 and the second resistor R2 based on actual needs to adjust the switching speed of the power tube M.
[0026] In the embodiment, the controlled end of the first switch tube P1 can receive a corresponding control signal. When it is necessary to control the power tube M to be on, the first switch tube P1 is controlled to be on, and when it is necessary to control the power tube M to be off, the first switch tube P1 is controlled to be off. The controlled end of the second switch tube N1 can also receive a corresponding control signal. When it is necessary to control the power tube M to be on, the second switch tube N1 is controlled to be off, and when it is necessary to control the power tube M to be off, the second switch tube N1 is controlled to be on.
[0027] In the embodiment, the first switch tube P1 and the second switch tube N1 can both be MOS tubes. The first end of the first switch tube P1 can be a source end, and the second end of the first switch tube P1 can be a drain end. The first end of the second switch tube N1 can be a source end, and the second end of the second switch tube N1 can be a drain end.
[0028] In the embodiment, the first switch tube P1 can include a PMOS.
[0029] In the embodiment, the second switch tube N1 can include an NMOS.
[0030] In the embodiment, the first voltage terminal V1 can be a power supply voltage terminal VC, and the second voltage terminal V2 can be a reference ground terminal GND.
[0031] In the embodiment, the first diode D1 is connected between the substrate of the second switch tube N1 and the second terminal of the second switch tube N1, and the substrate of the second switch tube N1 can be connected to the second voltage terminal V2. When static electricity exists at the output terminal OUT, the first diode D1 can serve as the first static electricity protection element to resist static electricity from the output terminal OUT to the second voltage terminal V2, and in the process of resisting static electricity, the static electricity cannot flow through the first resistor R1 and the second resistor R2.
[0032] In the embodiment, the application circuit 11 can include a switching power supply circuit, a motor driving circuit, a direct current conversion circuit, etc. It should be noted that those skilled in the art can configure the power tube M and the circuit connected to the power tube M based on the actual application circuit, and the type and specific form of the application circuit 11 are not limited here.
[0033] In the embodiment, by using the gate drive circuit including the first resistor R1, the first switch tube P1, the second switch tube N1, the second resistor R2, and the first diode D1, the switching speed of the power tube M can be controlled, and the substrate diode of the second switch tube N1 is used as the static electricity protection element, without the need to additionally set an ESD device, without the need to use a wafer sealing method, greatly reducing the layout area, and the static electricity cannot flow through the first resistor R1 and the second resistor R2, and the static electricity protection efficiency can be improved.
[0034] In some embodiments, as shown in Figure 3 The gate drive circuit can further include a second diode D2, the anode of the second diode D2 is connected to the second terminal of the first switch tube P1, the cathode of the second diode D2 is connected to the substrate of the first switch tube P1 and the first voltage terminal V1 respectively, and the second diode D2 serves as the second static electricity protection element to resist static electricity from the first voltage terminal V1 to the output terminal OUT.
[0035] In the embodiment, the second diode D2 is connected between the substrate of the first switch tube P1 and the second terminal of the first switch tube P1, and the substrate of the first switch tube P1 can be connected to the output terminal OUT. The substrate diode of the first switch tube P1 is used as the static electricity protection element, and the ESD device does not need to be additionally set. Compared with the prior art, the first diode D1 and the second diode D2 are used as the static electricity protection element, without the need to specially use a wafer sealing method to provide the ESD device, greatly reducing the layout area, and the static electricity cannot flow through the first resistor R1 and the second resistor R2, and the static electricity protection efficiency can be improved.
[0036] In some embodiments, the first resistor R1, the first switch tube P1, the second switch tube N1, the second resistor R2, the first resistor R1, and the second resistor R2 can be placed on the same wafer without using wafer sealing, reducing the difficulty of wafer packaging process, and simplifying the chip manufacturing process.
[0037] In some embodiments, the first voltage terminal V1, the first resistor R1, the first switch tube P1, and the output terminal OUT form a charging circuit, and the output terminal OUT, the second switch tube N1, the second resistor R2, and the second voltage terminal V2 form a discharging circuit.
[0038] In some embodiments, the gate drive circuit can further include a third diode D3 and a fourth diode D4. The anode of the third diode D3 is connected to the first terminal of the first switch tube P1, and the cathode of the third diode D3 is connected to the substrate of the first switch tube P1. The anode of the fourth diode D4 is connected to the substrate of the second switch tube N1, and the cathode of the fourth diode D4 is connected to the first terminal of the second switch tube N1.
[0039] In some embodiments, the gate drive circuit can further include a power tube M connected to the output terminal OUT, the power tube M being controlled by the output terminal OUT, the power tube M, the first switch tube P1, the second switch tube N1, the first resistor R1, the second resistor R2, and the first diode D1 being packaged in the same chip, and the power tube M, the first switch tube P1, the second switch tube N1, the second resistor R2, the first resistor R1, and the second resistor R2 forming a power tube M drive circuit.
[0040] In some embodiments, the number of power tube M drive circuits can be multiple, two power tubes M forming a half-bridge circuit, and two power tube M drive circuits forming a single-phase motor control circuit, the single-phase motor control circuit being packaged in the same chip. Each power tube M can correspond to a group of power tubes M, first switch tubes P1, second switch tubes N1, first resistors R1, second resistors R2, and first diodes D1.
[0041] In some embodiments, the gate drive circuit can further include a power tube M connected to the output terminal OUT, the power tube M being controlled by the output terminal OUT, the power tube M, the first switch tube P1, the second switch tube N1, the first resistor R1, the second resistor R2, the first diode D1, and the second diode D2 being packaged in the same chip, and the power tube M, the first switch tube P1, the second switch tube N1, the second resistor R2, the first resistor R1, and the second resistor R2 forming a power tube M drive circuit.
[0042] In some embodiments, the number of power tube M driving circuits can be multiple, two power tubes M form a half-bridge circuit, two power tube M driving circuits form a single-phase motor control circuit, and the single-phase motor control circuit is packaged in the same chip. Wherein each power tube M can correspond to a group of power tubes M, a first switch tube P1, a second switch tube N1, a first resistor R1, a second resistor R2, a first diode D1, a second diode D2 respectively.
[0043] In some embodiments, the gate drive circuit can further include a power tube M connected with the output terminal OUT, the power tube M being controlled by the output terminal OUT, the power tube M, the first switch tube P1, the second switch tube N1, the first resistor R1, the second resistor R2, the first diode D1, the second diode D2, the third diode D3, and the fourth diode D4 being packaged in the same chip, and the power tube M, the first switch tube P1, the second switch tube N1, the second resistor R2, the first resistor R1, and the second resistor R2 forming a power tube M driving circuit.
[0044] In some embodiments, the number of power tube M driving circuits can be multiple, two power tubes M form a half-bridge circuit, two power tube M driving circuits form a single-phase motor control circuit, and the single-phase motor control circuit is packaged in the same chip. Wherein each power tube M can correspond to a group of power tubes M, a first switch tube P1, a second switch tube N1, a first resistor R1, a second resistor R2, a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4 respectively.
[0045] As Figure 4 The first switch tube P1, the second switch tube N1, the first diode D1, the second diode D2, the third diode D3, and the fourth diode D4 in the gate drive circuit provided by the embodiment are shown in the structural schematic diagram, the first diode D1 and the fourth diode D4 are the substrate diodes of the first switch tube P1, and the second diode D2 and the third diode D3 are the substrate diodes of the second switch tube N1.
[0046] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent substitutions for some technical features; and these modifications or substitutions do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.
Claims
1. A gate drive circuit characterized by comprising: The application relates to a power tube driving circuit, comprising: a first resistor, a first end of which is connected with a first voltage end; a first switch tube, a first end of which is connected with a second end of the first resistor, and a second end of which is connected with an output end; a second switch tube, a second end of which is connected with a second end of the first switch tube; a second resistor, a first end of which is connected with a first end of the second switch tube, and a second end of which is connected with a second voltage end; a first diode, an anode of which is connected with a substrate of the second switch tube and the second voltage end respectively, and a cathode of which is connected with a second end of the second switch tube, the first diode serving as a first electrostatic protection element to resist electrostatic from the output end to the second voltage end.
2. The gate drive circuit according to claim 1, characterized by The application further comprises: a second diode, an anode of which is connected with a second end of the first switch tube, and a cathode of which is connected with a substrate of the first switch tube and the first voltage end respectively, the second diode serving as a second electrostatic protection element to resist electrostatic from the first voltage end to the output end.
3. The gate drive circuit according to claim 2, characterized by The first resistor, the first switch tube, the second switch tube, the second resistor, the first resistor and the second resistor are arranged on the same wafer.
4. The gate drive circuit according to claim 1, characterized by The first voltage end, the first resistor, the first switch tube and the output end form a charging circuit, or the output end, the second switch tube, the second resistor and the second voltage end form a discharging circuit.
5. The gate drive circuit according to claim 1, characterized by The application further comprises: a third diode, an anode of which is connected with a first end of the first switch tube, and a cathode of which is connected with a substrate of the first switch tube; a fourth diode, an anode of which is connected with a substrate of the second switch tube, and a cathode of which is connected with a first end of the second switch tube.
6. The gate drive circuit according to claim 1, wherein The application further comprises: a power tube connected with the output end, the power tube being controlled by the output end, the power tube, the first switch tube, the second switch tube, the first diode, the first resistor, the second resistor being packaged in the same chip, the power tube, the first switch tube, the first diode, the second resistor, the first resistor and the second resistor forming a power tube driving circuit.
7. The gate drive circuit according to claim 6, characterized in that The number of the power tube driving circuits is plural, two power tubes form a half-bridge circuit, and two power tube driving circuits form a single-phase motor control circuit, the single-phase motor control circuit being packaged in the same chip.
8. The gate drive circuit according to claim 1, characterized by The first switch tube comprises a PMOS.
9. The gate drive circuit according to claim 1, characterized by The second switch tube comprises an NMOS.
10. The gate drive circuit according to claim 1, characterized by The first voltage end is a power supply voltage end, and the second voltage end is a reference ground end.