Secondary power supply delay power-on circuit and electronic equipment

Abstract

The utility model provides a secondary power supply delay power-on circuit and an electronic device wherein the secondary power supply delay power-on circuit comprises a delay driving module which receives an input signal and delays and generates a switch driving signal based on the input signal; and the power switch module is connected with the delay driving module and is controlled by the switch driving signal to output the primary power supply to generate a secondary power supply. According to the utility model, the problems of large occupied space and short service life when a time relay is adopted to carry out secondary power supply delay power-on in the prior art are solved.

Description

Technical Field

[0001] This utility model belongs to the field of electronic circuit design technology, and in particular relates to a secondary power supply delay power-on circuit and electronic equipment. Background Technology

[0002] In semiconductor manufacturing or testing equipment, after the main power supply of a machine is turned on, the different power-on times of the various sub-modules inside the machine may cause problems such as abnormal module initialization or abnormal communication between modules.

[0003] To address the issue of delayed secondary power-on, the traditional solution involves using a time relay in conjunction with a socket, with the power-on delay set via a knob (typically 0.1 to 30 seconds). However, time relays are relatively bulky (approximately 76mm x 22mm x 89mm after assembly), making them unsuitable for installation in confined spaces; furthermore, the lifespan of time relay contacts is short, requiring regular maintenance and replacement. Therefore, providing an alternative solution that satisfies the secondary power-on delay requirement while minimizing space occupation and extending service life is crucial for those skilled in the art.

[0004] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Utility Model Content

[0005] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide a secondary power supply delay power-on circuit and electronic device, which solves the problems of large space occupation and short service life when using time relays for secondary power supply delay power-on.

[0006] To achieve the above and other related objectives, this utility model provides a secondary power supply delay power-on circuit, the secondary power supply delay power-on circuit comprising:

[0007] The delay drive module receives the input signal and generates a switch drive signal based on the delay of the input signal;

[0008] The power switch module is connected to the delay drive module and is controlled by the switch drive signal to output the primary power supply to generate the secondary power supply.

[0009] Optionally, the delay driving module generates the switching driving signal by performing in-phase integral amplification on the input signal to delay the signal generation.

[0010] Optionally, the delay drive module includes an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, and a second capacitor. The non-inverting input terminal of the operational amplifier receives the input signal via the first resistor and is connected to a reference ground via the second resistor and the first capacitor, respectively. The inverting input terminal of the operational amplifier is connected to the reference ground via the third resistor and is connected to its output terminal via the second capacitor. The output terminal of the operational amplifier generates the switching drive signal via the fourth resistor. The power supply terminal of the operational amplifier receives the operating power supply, and the ground terminal of the operational amplifier is connected to the reference ground.

[0011] Optionally, the delay driving module further includes at least one of a first filtering unit and a second filtering unit, wherein the first filtering unit is used to filter the input signal and the second filtering unit is used to filter the operating power supply.

[0012] Optionally, when the delay driving module includes a first filtering unit, the first filtering unit includes a third capacitor and a fourth capacitor, which are connected in parallel between the input signal and the reference ground; when the delay driving module includes a second filtering unit, the second filtering unit includes a fifth capacitor and a sixth capacitor, which are connected in parallel between the operating power supply and the reference ground.

[0013] Optionally, the power switch module includes a first switch transistor, a second switch transistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor. The control terminal of the first switch transistor receives the switch drive signal and is connected to its first terminal via the fifth resistor. The first terminal of the first switch transistor is connected to a reference ground. The second terminal of the first switch transistor is connected to the first terminal of the sixth resistor. The second terminal of the sixth resistor is connected to the control terminal of the second switch transistor and is connected to the first terminal of the second switch transistor via the seventh resistor. The first terminal of the second switch transistor is connected to the primary power supply via the eighth resistor. The second terminal of the second switch transistor generates the secondary power supply.

[0014] Optionally, the power switch module further includes a third filtering unit for filtering the primary power supply.

[0015] Optionally, the third filter unit includes a seventh capacitor and an eighth capacitor, which are connected in parallel between the primary power supply and the reference ground.

[0016] Optionally, the first switching transistor includes one of a transistor, a field-effect transistor, a thyristor, and a Darlington transistor, and the second switching transistor includes one of a transistor, a field-effect transistor, a thyristor, and a Darlington transistor.

[0017] This utility model also provides an electronic device, which includes: a secondary power supply delay power-on circuit as described in any of the above claims.

[0018] As described above, this utility model discloses a secondary power supply delay power-on circuit and electronic device. Through the design of a delay drive module and a power switch module, it achieves the purpose of delaying the output of the secondary power supply. In the delay drive module, in-phase integral amplification is implemented based on an operational amplifier, so that the voltage output of the operational amplifier rises linearly and controllably slowly, thereby controlling the power switch module to achieve delayed output of the secondary power supply. This invention replaces the time relay with an onboard circuit, achieving a smaller footprint and a longer service life. Attached Figure Description

[0019] Figure 1 The diagram shown is a schematic of the secondary power supply delay power-on circuit in this utility model.

[0020] Figure 2 The diagram shows the waveforms of relevant signals during simulation testing of the secondary power supply delay power-on circuit in this invention.

[0021] Figure 3 The diagram shows the layout of the secondary power supply delay power-on circuit in this invention.

[0022] Component designation explanation

[0023] 100 Secondary power supply delay power-on circuit

[0024] 110 Delay Drive Module

[0025] 111 First Filtering Unit

[0026] 112 Second Filtering Unit

[0027] 120 Power Switch Module

[0028] 121 Third Filtering Unit

[0029] 130 Power Conversion Module Detailed Implementation

[0030] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.

[0031] Please see Figures 1 to 3It should be understood that the structures, proportions, sizes, etc., illustrated in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art and are not intended to limit the scope of this invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this invention, should still fall within the scope of the disclosed technical content. Furthermore, the terms "upper," "lower," "left," "right," "middle," and "one" used in this specification are merely for clarity and not intended to limit the scope of this invention. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this invention.

[0032] Example 1

[0033] like Figure 1 As shown, this embodiment provides a secondary power supply delay power-on circuit 100, including a delay drive module 110 and a power switch module 120.

[0034] The delay drive module 110 receives the input signal INPUT and generates a switch drive signal DRV based on a delay of the input signal INPUT. In one example, the delay drive module 110 generates the switch drive signal DRV by performing in-phase integration amplification on the input signal INPUT.

[0035] In one implementation, the delay driving module 110 includes an operational amplifier OTA, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, and a second capacitor C2. The non-inverting input terminal of the operational amplifier OTA receives the input signal INPUT via the first resistor R1 (i.e., the non-inverting input terminal of the operational amplifier OTA is connected to the first terminal of the first resistor R1, and the second terminal of the first resistor R1 receives the input signal INPUT). The non-inverting input terminal of the operational amplifier OTA is also connected to reference ground GND via the second resistor R2 and the first capacitor C1 (i.e., the non-inverting input terminal of the operational amplifier OTA is also connected to the first terminal of the second resistor R2 and the first terminal of the first capacitor C1, and the second terminal of the second resistor R2 and the second terminal of the first capacitor C1 are connected to reference ground GND). The inverting input terminal of the operational amplifier OTA... The input terminal is connected to reference ground GND via the third resistor R3 (i.e., the inverting input terminal of the operational amplifier OTA is connected to the first terminal of the third resistor R3, and the second terminal of the third resistor R3 is connected to reference ground GND). The inverting input terminal of the operational amplifier OTA is also connected to the output terminal of the operational amplifier OTA via the second capacitor C2 (i.e., the inverting input terminal of the operational amplifier OTA is also connected to the first terminal of the second capacitor C2, and the second terminal of the second capacitor C2 is connected to the output terminal of the operational amplifier OTA). The output terminal of the operational amplifier OTA generates a switch drive signal DRV via the fourth resistor R4 (i.e., the output terminal of the operational amplifier OTA is connected to the first terminal of the fourth resistor R4, and the second terminal of the fourth resistor R4 generates the switch drive signal DRV). The power supply terminal of the operational amplifier OTA receives the operating power supply VDD, and the ground terminal of the operational amplifier OTA is connected to reference ground GND.

[0036] Furthermore, the delay driving module 110 also includes at least one of a first filtering unit 111 and a second filtering unit 112; for example, in one option, the delay driving module 110 includes only the first filtering unit 111; in another option, the delay driving module 110 includes only the second filtering unit 112; in yet another option, the delay driving module 110 includes both the first filtering unit 111 and the second filtering unit 112. The first filtering unit 111 is used to filter the input signal INPUT; in one implementation, the first filtering unit 111 includes a third capacitor C3 and a fourth capacitor C4, which are connected in parallel between the input signal INPUT and the reference ground GND (i.e., the first end of the third capacitor C3 and the first end of the fourth capacitor C4 are connected to each other and then connected to the input signal INPUT, and the second end of the third capacitor C3 and the second end of the fourth capacitor C4 are connected to each other and then connected to the reference ground GND). The second filtering unit 112 is used to filter the operating power supply VDD. In one implementation, the second filtering unit 112 includes a fifth capacitor C5 and a sixth capacitor C6. The fifth capacitor C5 and the sixth capacitor C6 are connected in parallel and then connected between the operating power supply VDD and the reference ground GND (that is, the first end of the fifth capacitor C5 and the first end of the sixth capacitor C6 are connected to each other and then connected to the operating power supply VDD, and the second end of the fifth capacitor C5 and the second end of the sixth capacitor C6 are connected to each other and then connected to the reference ground GND).

[0037] The power switch module 120 is connected to the delay drive module 110 and is controlled by the switch drive signal DRV to output the primary power supply PWRP to generate the secondary power supply PWRS.

[0038] In one implementation, the power switch module 120 includes a first switch transistor Q1, a second switch transistor Q2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8. The control terminal of the first switch transistor Q1 receives a switch drive signal DRV. The control terminal of the first switch transistor Q1 is also connected to the first terminal of the first switch transistor Q1 via the fifth resistor R5 (i.e., the control terminal of the first switch transistor Q1 is also connected to the first terminal of the fifth resistor R5, and the second terminal of the fifth resistor R5 is connected to the first terminal of the first switch transistor Q1). The first terminal of the first switch transistor Q1 is also connected to reference ground GND, and the second terminal of the first switch transistor Q1 is connected to the sixth resistor R8. The first terminal of resistor R6 and the second terminal of resistor R6 are connected to the control terminal of the second switch Q2. The second terminal of resistor R6 is also connected to the first terminal of the second switch Q2 via resistor R7 (i.e., the second terminal of resistor R6 is also connected to the first terminal of resistor R7, and the second terminal of resistor R7 is connected to the first terminal of the second switch Q2). The first terminal of the second switch Q2 is also connected to the primary power supply PWRP via resistor R8 (i.e., the first terminal of the second switch Q2 is also connected to the first terminal of resistor R8, and the second terminal of resistor R8 is connected to the primary power supply PWRP). The second terminal of the second switch Q2 generates the secondary power supply PWRS. In one optional embodiment, the first switch Q1 includes one of a transistor, a field-effect transistor, a thyristor, and a Darlington transistor, and the second switch Q2 includes one of a transistor, a field-effect transistor, a thyristor, and a Darlington transistor. Of course, it is also feasible for the first switch Q1 and the second switch Q2 to be other types of switches, which has no substantial impact on the implementation of this embodiment. In this embodiment, the first switch Q1 is a transistor, such as an NPN transistor. In this case, the control terminal of the first switch Q1 is the base, the first terminal of the first switch Q1 is the emitter, and the second terminal of the first switch Q1 is the collector. The second switch Q2 is a field-effect transistor, such as a PMOS transistor. In this case, the control terminal of the second switch Q2 is the gate, the first terminal of the second switch Q2 is the source, and the second terminal of the second switch Q2 is the drain.

[0039] Furthermore, the power switch module 120 also includes a third filtering unit 121 for filtering the primary power supply PWRP. In one implementation, the third filtering unit 121 includes a seventh capacitor C7 and an eighth capacitor C8, wherein the seventh capacitor C7 and the eighth capacitor C8 are connected in parallel and then connected between the primary power supply PWRP and the reference ground GND (that is, the first end of the seventh capacitor C7 and the first end of the eighth capacitor C8 are connected to each other and then connected to the primary power supply PWRP, and the second end of the seventh capacitor C7 and the second end of the eighth capacitor C8 are connected to each other and then connected to the reference ground GND).

[0040] In practical applications, the input signal INPUT is a power supply step signal, for example, a 3.3V power supply step signal, typically provided by the input power supply and rising from 0V to 3.3V after power-on. The operating power supply VDD powers the operational amplifier OTA, with a typical value of 5V. The primary power supply PWRP powers the pre-amplifier module, and the secondary power supply PWRS powers the post-amplifier module; their voltage values ​​are equal and can be any value such as 24V, 5V, or 3.3V, depending on the actual requirements. Furthermore, the operating power supply VDD is usually generated by converting the primary power supply PWRP. In this case, the secondary power supply delay power-on circuit 100 also includes a power conversion module 130, used to convert the primary power supply PWRP into the operating power supply VDD. Specifically, when the voltage value of the primary power supply PWRP is greater than the voltage value of the operating power supply VDD, the power conversion module 130 uses a buck converter structure; when the voltage value of the primary power supply PWRP is less than the voltage value of the operating power supply VDD, the power conversion module 130 uses a boost converter structure.

[0041] Below, please combine Figure 1 See Figure 2 The principle and performance of the secondary power supply delay power-on circuit 100 in this embodiment will be introduced and explained.

[0042] After the circuit is powered on, the power conversion module 130 converts the primary power supply PWRP into the operating power supply VDD to power the operational amplifier OTA. The voltage of the primary power supply PWRP is 24V, and the voltage of the operating power supply VDD is 5V.

[0043] Taking an input signal INPUT that is a 3.3V step signal supplied by an input power supply as an example:

[0044] When the input power supply is not powered on, the input and output of the operational amplifier OTA are both 0V. The first switch Q1 is not turned on, no current flows through the seventh resistor R7, and the gate-source voltage of the second switch Q2 is almost 0V. Therefore, the second switch Q2 is also not turned on. The path from the primary power supply PWRP to the secondary power supply PWRS is cut off, and there is no output from the secondary power supply PWRS.

[0045] After the input power is turned on, the input signal INPUT slowly charges the first capacitor C1 through the current limiting effect of the first resistor R1. The voltage of the first capacitor C1 rises slowly. At this time, a slowly increasing voltage is applied to the non-inverting input terminal of the operational amplifier OTA, and it is temporarily greater than the voltage of the inverting input terminal of the operational amplifier OTA. According to the characteristics of the operational amplifier, a positive voltage will be generated at the output terminal of the operational amplifier OTA, and this positive voltage rises linearly at a slower rate. Only after the first capacitor C1 and the second capacitor C2 are fully charged can the voltage at the output terminal of the operational amplifier OTA approach 5V. As the voltage at the output terminal of the operational amplifier OTA rises slowly, when the voltage exceeds the turn-on voltage of the first switch Q1, the first switch Q1 is turned on, and current flows through the sixth resistor R6 and the seventh resistor R7. By configuring appropriate resistor values, the voltage difference across the seventh resistor R7 is just enough to turn on the second switch Q2. The path from the primary power supply PWRP to the secondary power supply PWRS is connected, and the secondary power supply PWRS is output. By properly configuring the values ​​of the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the first capacitor C1, and the second capacitor C2, the charging speed of the capacitors can be changed, thereby adjusting the turn-on time of the first switch Q1 and the second switch Q2.

[0046] After the primary power supply PWRP is turned off, the capacitor charge is quickly depleted, the voltage drops rapidly, and the secondary power supply PWRS also disappears.

[0047] The simulation test results of the above-mentioned secondary power supply delay power-on circuit 100 are as follows: Figure 2 As shown, curve 1 represents the waveform of the input signal INPUT, which jumps from 0V to 3.3V in the first second; curve 2 represents the waveform of the voltage signal at the output of the operational amplifier OTA, which gradually rises from 0V to 5V due to the in-phase integrating amplification effect; curve 3 represents the waveform of the secondary power supply PWRS, which, at the 13th second, causes the second switch Q2 to turn on because the voltage at the output of the operational amplifier OTA exceeds the turn-on voltage of the first switch Q1, and the secondary power supply PWRS begins to output. Therefore, the delay time of the secondary power supply PWRS is approximately 12 seconds.

[0048] Figure 3 The layout structure of each device in the secondary power supply delay power-on circuit 100 of this embodiment is shown. Through reasonable layout and wiring, the size of the circuit in this embodiment can be relatively compact. For example, the length, width and thickness are about 45mm*41mm*5mm. Compared with time relay, the size is greatly reduced and less space is occupied. Moreover, the service life of semiconductor discrete devices (i.e., switching transistors, resistors, capacitors, etc.) is longer and there is no need for regular maintenance and replacement.

[0049] Example 2

[0050] This embodiment provides an electronic device, including a secondary power-on delay circuit 100, wherein the secondary power-on delay circuit 100 is implemented using the circuit structure described in Embodiment 1. In an optional embodiment, the electronic device can be a semiconductor machine; of course, the semiconductor machine may also include other functional circuits, and there are no limitations on this.

[0051] In summary, this utility model discloses a secondary power supply delay power-on circuit and electronic device. Through the design of a delay drive module and a power switch module, it achieves the purpose of delaying the output of the secondary power supply. In the delay drive module, in-phase integral amplification is implemented based on an operational amplifier, allowing the voltage output by the operational amplifier to rise linearly and controllably and slowly. This voltage then controls the power switch module, thereby achieving the delayed output of the secondary power supply. This invention replaces the time relay with an onboard circuit, achieving a smaller footprint and a longer service life.

[0052] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A secondary power supply delay power-on circuit, characterized in that, The secondary power supply delay power-on circuit includes: The delay drive module receives the input signal and generates a switch drive signal based on the delay of the input signal; The power switch module is connected to the delay drive module and is controlled by the switch drive signal to output the primary power supply to generate the secondary power supply.

2. The secondary power supply delay power-on circuit according to claim 1, characterized in that, The delay driving module generates the switch driving signal by performing in-phase integral amplification on the input signal.

3. The secondary power supply delay power-on circuit according to claim 2, characterized in that, The delay drive module includes an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, and a second capacitor. The non-inverting input terminal of the operational amplifier receives the input signal through the first resistor and is connected to a reference ground through the second resistor and the first capacitor, respectively. The inverting input terminal of the operational amplifier is connected to the reference ground through the third resistor and is connected to its output terminal through the second capacitor. The output terminal of the operational amplifier generates the switching drive signal through the fourth resistor. The power supply terminal of the operational amplifier receives the operating power supply, and the ground terminal of the operational amplifier is connected to the reference ground.

4. The secondary power supply delay power-on circuit according to claim 3, characterized in that, The delay drive module further includes at least one of a first filtering unit and a second filtering unit, wherein the first filtering unit is used to filter the input signal and the second filtering unit is used to filter the operating power supply.

5. The secondary power supply delay power-on circuit according to claim 4, characterized in that, When the delay driving module includes a first filtering unit, the first filtering unit includes a third capacitor and a fourth capacitor, which are connected in parallel between the input signal and the reference ground; when the delay driving module includes a second filtering unit, the second filtering unit includes a fifth capacitor and a sixth capacitor, which are connected in parallel between the operating power supply and the reference ground.

6. The secondary power supply delay power-on circuit according to claim 1, characterized in that, The power switch module includes a first switch transistor, a second switch transistor, a fifth resistor, a sixth resistor, a seventh resistor, and an eighth resistor. The control terminal of the first switch transistor receives the switch drive signal and is connected to its first terminal via the fifth resistor. The first terminal of the first switch transistor is connected to a reference ground. The second terminal of the first switch transistor is connected to the first terminal of the sixth resistor. The second terminal of the sixth resistor is connected to the control terminal of the second switch transistor and is connected to the first terminal of the second switch transistor via the seventh resistor. The first terminal of the second switch transistor is connected to the primary power supply via the eighth resistor. The second terminal of the second switch transistor generates the secondary power supply.

7. The secondary power supply delay power-on circuit according to claim 6, characterized in that, The power switch module also includes a third filtering unit for filtering the primary power supply.

8. The secondary power supply delay power-on circuit according to claim 7, characterized in that, The third filter unit includes a seventh capacitor and an eighth capacitor, which are connected in parallel between the primary power supply and the reference ground.

9. The secondary power supply delay power-on circuit according to claim 6, characterized in that, The first switching transistor includes one of a transistor, a field-effect transistor, a thyristor, and a Darlington transistor, and the second switching transistor includes one of a transistor, a field-effect transistor, a thyristor, and a Darlington transistor.

10. An electronic device, characterized in that, The electronic device includes: a secondary power supply delay power-on circuit as described in any one of claims 1 to 9.

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