Program-controlled current-limiting constant-power source capacitor charging device

Abstract

The utility model discloses a program-controlled current-limiting constant-power source capacitor charging device, which is characterized in that an output current is acquired through a resistor R4 and is converted into a voltage signal, the voltage signal is amplified through a second error amplifier 202 and then is compared with a preset Vref2, if the voltage signal is lower than the preset Vref2, the output pulse of a pulse width modulator 101 is widened, the output power is increased, the output current is increased, and the purpose of current limiting is achieved. The input current is collected through the first error amplifier 201, if the input current is higher than a certain threshold value, the output of the first error amplifier becomes high, the output pulse of the pulse width modulator 101 becomes narrow, and the input power becomes low, so that the input power is stabilized at a fixed value. An output voltage is collected through a third error amplifier 203, when the output voltage reaches a set value, an output pulse is narrowed through a pulse width modulator 101, and the output voltage is lowered, so that the purpose of stabilizing the output voltage is achieved. According to the invention, the power of the power supply can be fully utilized, and charging is faster.

Description

Technical Field

[0001] This application relates to the field of capacitor charging technology, and in particular to a programmable current-limited constant power source capacitor charging device. Background Technology

[0002] In demagnetizing equipment, capacitors play a crucial role, generating the necessary demagnetizing magnetic field by storing and releasing electrical energy. There are two main methods for charging capacitors: constant current charging and current-limiting charging.

[0003] Constant current charging charges the capacitor with a fixed current. This method is fast, efficient, and generates relatively little heat during charging. However, its drawback is that the power supply cannot provide maximum output power most of the time; the output power only reaches its design power when the capacitor is nearly fully charged, leading to some energy waste.

[0004] Current-limited charging controls the charging current using current-limiting resistors or current-limiting circuits. While this method reduces heat generation during charging and improves system safety, it results in slower charging speeds, and the current-limiting resistors may fail after prolonged use, increasing maintenance costs. Current-limited charging is also relatively inefficient, and energy loss may occur during charging due to resistor power dissipation. Summary of the Invention

[0005] Based on this, and in response to the aforementioned technical problems, a programmable current-limited constant power source capacitor charging device is provided to solve the problems of serious power waste or slow charging speed in the prior art.

[0006] A programmable current-limiting constant power source capacitor charging device, the device comprising: a rectifier bridge BD, a capacitor C1, a transformer T1, a switching transistor Q1, a resistor R1, a first error amplifier 201, a second error amplifier 202, a third error amplifier 203, a signal isolation feedback circuit 301, a control pulse modulator 101, a diode D1, a capacitor C2, a capacitor C3, a resistor R2, a resistor R3, and a resistor R4;

[0007] One output terminal of the rectifier bridge BD is connected to the first input pin of the transformer T1; one end of the capacitor C1 is connected to the connection line between the rectifier bridge BD and the transformer, and the other end of the capacitor C1 is grounded.

[0008] The second input pin of transformer T1 is connected to the grounded end of capacitor C1 through current sampling resistor R1; the drain of switching transistor Q1 is connected to the connection line between the second input pin of transformer T1 and resistor R1, the source of switching transistor Q1 is grounded, and the gate of switching transistor Q1 is connected to the output terminal of control pulse modulator 101; one input terminal of the first error amplifier 201 is connected to the second input pin of transformer T1 through resistor R2, and also connected to the first input pin of transformer T1 through resistor R3; the other input terminal of the first error amplifier 201 is connected to the first reference voltage source; the output terminal of the first error amplifier 201 is connected to control pulse modulator 101.

[0009] The first output pin of the transformer T1 is connected to one end of the diode D1; the two ends of the capacitors C2 and C3 are respectively connected to the other end of the diode D1 and the second output pin of the transformer T1; a resistor R4 is connected between one end of the capacitor C2 and one end of the capacitor C3 connected to the second output pin of the transformer T1.

[0010] One input terminal of the second error amplifier 202 is connected to the connection line between the current sampling resistor R4 and the capacitor C3, and the other terminal is connected to the second reference voltage source; the output terminal of the second error amplifier 202 is connected to the control pulse modulator 101 through the signal isolation feedback circuit 301.

[0011] One input terminal of the third error amplifier 203 is connected to the end of the capacitor C3 connected to the diode D1, and the other input terminal is connected to the third reference voltage source. The output terminal of the third error amplifier 203 is connected to the control pulse modulator 101 through the signal isolation feedback circuit 301.

[0012] Optionally, in the above scheme, the first error amplifier 201 includes a resistor R14, an operational amplifier U1B, and a capacitor C6;

[0013] Resistors R2 and R3 are connected to the non-inverting input terminal of operational amplifier U1B, one end of capacitor C6 is connected to the connection line between resistor R2 and the non-inverting input terminal of operational amplifier U1B, and the other end is connected to the output terminal of operational amplifier U1B; resistor R14 is connected to the inverting input terminal of operational amplifier U1B; the output terminal of operational amplifier U1B is connected to the control pulse modulator 101.

[0014] Optionally, in the above scheme, the second error amplifier 202 includes resistors R5, R7, and R6, capacitor C4, diode D2, and operational amplifier U2B;

[0015] One end of resistor R5 is connected to the connection line between current sampling resistor R4 and capacitor C3, and the other end is connected to the inverting input terminal of operational amplifier U2B. Resistor R6 is connected to the non-inverting input terminal of operational amplifier U2B. One end of capacitor C4 is connected to the inverting input terminal of operational amplifier U2B, and the other end is connected to the output terminal of operational amplifier U2B. The output terminal of operational amplifier U2B is connected to resistor R7 and diode D2 in sequence, and then connected to signal isolation feedback circuit 301.

[0016] Optionally, in the above scheme, the third error amplifier 203 includes resistors R8, R9, and R10, capacitor C5, diode D3, and operational amplifier U3B;

[0017] The resistor R8 is connected to the inverting input terminal of the operational amplifier U2B, and the resistor R9 is connected to the non-inverting input terminal of the operational amplifier U2B. One end of the capacitor C5 is connected to the inverting input terminal of the operational amplifier U3B, and the other end is connected to the output terminal of the operational amplifier U3B. The output terminal of the operational amplifier U3B is connected to the resistor R10 and the diode D3 in sequence, and then connected to the signal isolation feedback circuit 301.

[0018] In the above scheme, optionally, the control pulse modulator 101 includes resistor R12, resistor R13, diode D4, diode D5, and operational amplifier U4B;

[0019] One end of diode D4 is connected to the inverting input of operational amplifier U1B, and the other end is connected to the non-inverting input of operational amplifier U4B through resistor R12; one end of diode D5 is connected to the signal isolation feedback circuit 301, and the other end is connected to the non-inverting input of operational amplifier U4B through resistor R13.

[0020] This application has at least the following beneficial effects:

[0021] This application achieves current limiting by starting with a low output voltage. The output current is collected via resistor R4 and converted into a voltage signal. This signal is amplified by the second error amplifier 201 and compared with a preset VREF2. If the voltage is lower than VREF2, the output voltage of the second error amplifier 202 increases, the primary current of the isolation optocoupler 301 decreases, and the voltage across R11 drops. This voltage is then compared with a triangular wave by the comparator inside the pulse width modulator 101, resulting in a wider output pulse, increasing the output power and thus the output current. Conversely, a narrower pulse results in a smaller output current, achieving current limiting. As the voltage increases, the input power also increases. The first error amplifier 201 collects the input current (output power), and its output increases. This pulse is then compared with a triangular wave by the comparator inside the pulse width modulator 101, resulting in a narrower output pulse, decreasing the input power. Conversely, a narrower pulse results in a larger input power, thus stabilizing the input power at a fixed value. Multiplying this by the efficiency, the output power also stabilizes at a relatively fixed value. The output voltage is acquired by the third error amplifier 203. When the output voltage reaches the set value, the output voltage of the third error amplifier 203 decreases, increasing the primary current of the isolation optocoupler 301. The voltage of R11 rises, and after comparison with the triangular wave by the comparator inside the pulse width modulator 101, the output pulse narrows, thus lowering the output voltage and achieving output voltage stability. This achieves the goals of current limiting, constant power, and voltage regulation, ensuring that the charging current does not exceed the capacitor's charging current limit (constant current charging limits the current to within the capacitor's maximum allowable charging current), and fully utilizing the power supply's power, allowing the power supply to operate at full load most of the time. In this way, the same power can charge faster, and the same charging speed can reduce power waste. Attached Figure Description

[0022] Figure 1 This application provides a schematic diagram illustrating the working principle of a programmable current-limiting constant power source capacitor charging device according to one embodiment.

[0023] Figure 2 A circuit diagram of a first error amplifier 201, a second error amplifier 202, a third error amplifier 203, a fourth error amplifier 204, and a control pulse modulator 101 is provided for one embodiment of this application. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0025] In one embodiment, such as Figure 1As shown, a programmable current-limiting constant power source capacitor charging device is provided. The device includes: a rectifier bridge BD, a capacitor C1, a transformer T1, a switching transistor Q1, a resistor R1, a first error amplifier 201, a second error amplifier 202, a third error amplifier 203, a signal isolation feedback circuit 301, a control pulse modulator 101, a diode D1, a capacitor C2, a capacitor C3, a resistor R2, a resistor R3, and a resistor R4.

[0026] One output terminal of the rectifier bridge BD is connected to the first input pin of the transformer T1; one end of the capacitor C1 is connected to the connection line between the rectifier bridge BD and the transformer, and the other end of the capacitor C1 is grounded.

[0027] The second input pin of transformer T1 is connected to the grounded end of capacitor C1 through current sampling resistor R1; the drain of switching transistor Q1 is connected to the connection line between the second input pin of transformer T1 and resistor R1, the source of switching transistor Q1 is grounded, and the gate of switching transistor Q1 is connected to the output terminal of control pulse modulator 101; one input terminal of the first error amplifier 201 is connected to the second input pin of transformer T1 through resistor R2, and also connected to the first input pin of transformer T1 through resistor R3; the other input terminal of the first error amplifier 201 is connected to the first reference voltage source; the output terminal of the first error amplifier 201 is connected to control pulse modulator 101.

[0028] The first output pin of the transformer T1 is connected to one end of the diode D1; the two ends of the capacitors C2 and C3 are respectively connected to the other end of the diode D1 and the second output pin of the transformer T1; a resistor R4 is connected between one end of the capacitor C2 and one end of the capacitor C3 connected to the second output pin of the transformer T1.

[0029] One input terminal of the second error amplifier 202 is connected to the connection line between the current sampling resistor R4 and the capacitor C3, and the other terminal is connected to the second reference voltage source; the output terminal of the second error amplifier 202 is connected to the control pulse modulator 101 through the signal isolation feedback circuit 301.

[0030] One input terminal of the third error amplifier 203 is connected to the end of the capacitor C3 connected to the diode D1, and the other input terminal is connected to the third reference voltage source. The output terminal of the third error amplifier 203 is connected to the control pulse modulator 101 through the signal isolation feedback circuit 301.

[0031] In this embodiment, the input AC Vin is rectified and filtered by the rectifier bridge BD and capacitor C1 to become DC. The rectified and filtered voltage is chopped by the switch Q1 driven by the control pulse modulator 101 and the primary winding of the transformer T1 to become a pulse voltage. The pulse voltage is then output to the output terminal through the transformer T1 and rectified and filtered by the diode D1 and capacitor C2 to become DC and connected to the output capacitor.

[0032] For specific control, the output current sampling resistor R2 converts the output current into a voltage signal. The error amplifier 202 compares the output current with a certain threshold. If it is lower than the set threshold, it is fed back to the control pulse modulator 101, where it is compared with an internal triangular wave, resulting in a larger output duty cycle and increased output power. This is generally done at the beginning of operation when the output voltage is very low, thus increasing the output current and power. The input current is also converted into a voltage signal using the current sampling resistor R1. After passing through the first error amplifier 201, this signal is fed back to the control pulse modulator 101. Therefore, when the input current exceeds a certain threshold, it indicates that the input power is also greater than the set threshold. This is fed back to the control pulse modulator 101, where it is compared with an internal triangular wave, resulting in a smaller output duty cycle and reduced input power. This is generally done after a period of operation when the output voltage increases and the input power also increases. Finally, the third error amplifier 203 detects the output voltage. When the output voltage reaches the set value, it is fed back to the control pulse modulator 101, where it is compared with an internal triangular wave, resulting in a smaller output duty cycle and thus achieving output voltage stability.

[0033] Therefore, this application includes four types of regulation: the input current is converted into a voltage signal through the current sampling resistor R1, and then fed back to the control pulse modulator 101 after passing through the first error amplifier 201. The input voltage signal is also fed back to the control pulse modulator 101 after passing through the first error amplifier 201. The output current is converted into a voltage signal through the current sampling resistor R2, and then fed back to the control pulse modulator 101 through the signal isolation feedback circuit 301 after passing through the second error amplifier 202; the output voltage signal is also fed back to the control pulse modulator 101 through the signal isolation feedback circuit 301 after passing through the third error amplifier 203. The control pulse modulator 101 adjusts the duty cycle of the drive pulse according to the four feedback signals and the ON / OFF signal, thereby achieving the purposes of current limiting, constant power, and voltage regulation.

[0034] In the aforementioned programmable current-limiting constant power source capacitor charging device, the output voltage is very low at the start of operation. The output current is collected through resistor R4 and converted into a voltage signal. After being amplified by the second error amplifier 201, it is compared with a preset VREF2. If it is lower than the preset VREF2, the output voltage of the second error amplifier 202 increases, the primary current of the isolation optocoupler 301 decreases, and the voltage of R11 decreases. After being compared with a triangular wave by the comparator inside the pulse width modulator 101, the output pulse widens, increasing the output power and thus increasing the output current. Conversely, it decreases, thereby achieving the purpose of current limiting. As the voltage increases, the input power also increases. The input current (output power) is collected by the first error amplifier 201, and the output of the first error amplifier increases. After being compared with a triangular wave by the comparator inside the pulse width modulator 101, the output pulse narrows, decreasing the input power. Conversely, it increases, thus stabilizing the input power at a fixed value. Multiplying by the efficiency, the output power also becomes basically stable at a fixed value. The output voltage is acquired by the third error amplifier 203. When the output voltage reaches the set value, the output voltage of the third error amplifier 203 decreases, increasing the primary current of the isolation optocoupler 301. The voltage of R11 rises, and after comparison with the triangular wave by the comparator inside the pulse width modulator 101, the output pulse narrows, thus lowering the output voltage and achieving output voltage stability. This achieves the goals of current limiting, constant power, and voltage regulation, ensuring that the charging current does not exceed the capacitor's charging current limit (constant current charging limits the current to within the capacitor's maximum allowable charging current), and fully utilizing the power supply's power, allowing the power supply to operate at full load most of the time. In this way, the same power can charge faster, and the same charging speed can reduce power waste.

[0035] In one embodiment, such as Figure 2 As shown, the first error amplifier 201 includes a resistor R14, an operational amplifier U1B, and a capacitor C6.

[0036] Resistors R2 and R3 are connected to the non-inverting input terminal of operational amplifier U1B, one end of capacitor C6 is connected to the connection line between resistor R2 and the non-inverting input terminal of operational amplifier U1B, and the other end is connected to the output terminal of operational amplifier U1B; resistor R14 is connected to the inverting input terminal of operational amplifier U1B; the output terminal of operational amplifier U1B is connected to the control pulse modulator 101.

[0037] In one embodiment, the second error amplifier 202 includes resistors R5, R7, and R6, capacitor C4, diode D2, and operational amplifier U2B.

[0038] One end of resistor R5 is connected to the connection line between current sampling resistor R4 and capacitor C3, and the other end is connected to the inverting input terminal of operational amplifier U2B. Resistor R6 is connected to the non-inverting input terminal of operational amplifier U2B. One end of capacitor C4 is connected to the inverting input terminal of operational amplifier U2B, and the other end is connected to the output terminal of operational amplifier U2B. The output terminal of operational amplifier U2B is connected to resistor R7 and diode D2 in sequence, and then connected to signal isolation feedback circuit 301.

[0039] In one embodiment, the third error amplifier 203 includes resistors R8, R9, and R10, capacitor C5, diode D3, and operational amplifier U3B;

[0040] The resistor R8 is connected to the inverting input terminal of the operational amplifier U3B, and the resistor R9 is connected to the non-inverting input terminal of the operational amplifier U3B. One end of the capacitor C5 is connected to the inverting input terminal of the operational amplifier U3B, and the other end is connected to the output terminal of the operational amplifier U3B. The output terminal of the operational amplifier U3B is connected to the resistor R10 and the diode D3 in sequence, and then connected to the signal isolation feedback circuit 301.

[0041] In one embodiment, the control pulse modulator 101 includes resistor R12, resistor R13, diode D4, diode D5, and operational amplifier U4B;

[0042] One end of diode D4 is connected to the inverting input of operational amplifier U1B, and the other end is connected to the non-inverting input of operational amplifier U4B through resistor R12; one end of diode D5 is connected to the signal isolation feedback circuit 301, and the other end is connected to the non-inverting input of operational amplifier U4B through resistor R13.

[0043] Specifically, diodes D2, D3, and D4 are connected to three feedback circuits. When all three feedback circuits have outputs, the output current and output voltage are first fed back through diodes D2 and D3 to determine which circuit is low. Then, the output is sent to the secondary side of the signal isolation feedback circuit 301, where the circuit is high between diodes D4 and D5.

[0044] like Figure 2As shown, the working principle of this application is as follows: When the work starts, the output voltage is very low. The output current is collected through resistor R4 and converted into a voltage signal. After being amplified by the second error amplifier 202, it is compared with the preset Vref2. If it is lower than the preset Vref2, the output voltage of the second error amplifier 202 becomes higher, the primary current of the isolation optocoupler 301 becomes lower, and the voltage of R11 decreases. After being compared with the triangular wave by the comparator inside the pulse width modulator 203, the output pulse becomes wider, increasing the output power and making the output current larger. Conversely, it becomes smaller, thereby achieving the purpose of current limiting.

[0045] As the voltage increases, the input power also increases. The input current is collected by the first error amplifier 201. If it is higher than a certain threshold, the output of the first error amplifier becomes higher. After being compared with the triangular wave by the comparator inside the pulse width modulator 101, the output pulse becomes narrower and the input power becomes lower. Conversely, it becomes higher, thereby stabilizing the input power at a fixed value. Multiplying by the efficiency, the output power also becomes basically stable at a fixed value.

[0046] The output voltage is acquired by the third error amplifier 203. When the output voltage reaches the set value, the output voltage of the third error amplifier 203 decreases, increasing the primary current of the isolation optocoupler 301. The voltage of R11 rises, and after comparison with the triangular wave by the comparator inside the pulse width modulator 101, the output pulse narrows, thus lowering the output voltage and achieving output voltage stability. This achieves the goals of current limiting, constant power, and voltage regulation, ensuring that the charging current does not exceed the capacitor's charging current limit (constant current charging limits the current to within the capacitor's maximum allowable charging current), and fully utilizing the power supply's power, allowing the power supply to operate at full load most of the time. In this way, the same power can charge faster, and the same charging speed can reduce the power consumption of the power supply.

[0047] To address the low power utilization issue of constant current charging, this application sets the charger to a current-limited constant power mode. Current limiting ensures the charging current does not exceed the capacitor's capacity, while constant power fully utilizes the power supply, allowing it to operate at full load. This enables faster charging with the same power output and reduces power consumption for the same charging speed. The charger's main circuit uses a switching power supply. The duty cycle of the drive pulse consists of four parts: output voltage, output current, input voltage, and input current. When the output current exceeds the current limit, the drive pulse duty cycle is adjusted to maintain a current-limited constant power state. As the output voltage increases, the output power exceeds the set power; by adjusting the drive pulse duty cycle, a constant power state is maintained until the output voltage reaches the set value, thus keeping the charger output at a constant voltage.

[0048] Therefore, for the same power output, a charger using current-limited constant power charging theoretically halve the charging time compared to constant current charging. Due to the current limitation, the actual charging time is between 53% and 65% of the original. This significantly improves demagnetization efficiency without reducing power supply output. For the same charging time, the charger power can be reduced by 35-45%, resulting in a cost reduction of approximately 30%.

[0049] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0050] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A programmable current-limited constant power source capacitor charging device, characterized in that, The device includes: a rectifier bridge BD, a capacitor C1, a transformer T1, a switching transistor Q1, a resistor R1, a first error amplifier 201, a second error amplifier 202, a third error amplifier 203, a signal isolation feedback circuit (301), a control pulse modulator (101), a diode D1, a capacitor C2, a capacitor C3, a resistor R2, a resistor R3, and a resistor R4. One output terminal of the rectifier bridge BD is connected to the first input pin of the transformer T1; one end of the capacitor C1 is connected to the connection line between the rectifier bridge BD and the transformer, and the other end of the capacitor C1 is grounded. The second input pin of the transformer T1 is connected to the grounded end of the capacitor C1 through the current sampling resistor R1; the drain of the switching transistor Q1 is connected to the connection line between the second input pin of the transformer and the resistor R1, the source of the switching transistor Q1 is grounded, and the gate of the switching transistor Q1 is connected to the output terminal of the control pulse modulator (101); one input terminal of the first error amplifier (201) is connected to the second input pin of the transformer T1 through the resistor R2, and is also connected to the first input pin of the transformer T1 through the resistor R3; the other input terminal of the first error amplifier (201) is connected to the first reference voltage source; the output terminal of the first error amplifier (201) is connected to the control pulse modulator (101); The first output pin of the transformer T1 is connected to one end of the diode D1; the two ends of the capacitors C2 and C3 are respectively connected to the other end of the diode D1 and the second output pin of the transformer T1; a resistor R4 is connected between one end of the capacitor C2 and one end of the capacitor C3 connected to the second output pin of the transformer T1. One input terminal of the second error amplifier (202) is connected to the connection line between the current sampling resistor R4 and the capacitor C3, and the other end is connected to the second reference voltage source; the output terminal of the second error amplifier (202) is connected to the control pulse modulator (101) through the signal isolation feedback circuit (301); One input terminal of the third error amplifier (203) is connected to the end of the capacitor C3 connected to the diode D1, and the other input terminal is connected to the third reference voltage source. The output terminal of the third error amplifier (203) is connected to the control pulse modulator (101) through the signal isolation feedback circuit (301).

2. The programmable current-limited constant power source capacitor charging device according to claim 1, characterized in that, The first error amplifier (201) includes a resistor R14, an operational amplifier U1B, and a capacitor C6; The resistors R2 and R3 are connected to the non-inverting input terminal of the operational amplifier U1B, one end of the capacitor C6 is connected to the connection line between the resistor R2 and the non-inverting input terminal of the operational amplifier U1B, and the other end is connected to the output terminal of the operational amplifier U1B; the resistor R14 is connected to the inverting input terminal of the operational amplifier U1B; the output terminal of the operational amplifier U1B is connected to the control pulse modulator (101).

3. The programmable current-limited constant power source capacitor charging device according to claim 1, characterized in that, The second error amplifier (202) includes resistors R5, R7, and R6, capacitor C4, diode D2, and operational amplifier U2B; One end of resistor R5 is connected to the connection line between current sampling resistor R4 and capacitor C3, and the other end is connected to the inverting input terminal of operational amplifier U2B. Resistor R6 is connected to the non-inverting input terminal of operational amplifier U2B. One end of capacitor C4 is connected to the inverting input terminal of operational amplifier U2B, and the other end is connected to the output terminal of operational amplifier U2B. The output terminal of operational amplifier U2B is connected to resistor R7 and diode D2 in sequence and then connected to the signal isolation feedback circuit (301).

4. The programmable current-limited constant power source capacitor charging device according to claim 1, characterized in that, The third error amplifier (203) includes resistors R8, R9, and R10, capacitor C5, diode D3, and operational amplifier U3B; The resistor R8 is connected to the inverting input terminal of the operational amplifier U3B, and the resistor R9 is connected to the non-inverting input terminal of the operational amplifier U3B. One end of the capacitor C5 is connected to the inverting input terminal of the operational amplifier U3B, and the other end is connected to the output terminal of the operational amplifier U3B. The output terminal of the operational amplifier U3B is connected to the resistor R10 and the diode D3 in sequence, and then connected to the signal isolation feedback circuit (301).

5. The programmable current-limited constant power source capacitor charging device according to claim 2, characterized in that, The control pulse modulator (101) includes resistor R12, resistor R13, diode D4, diode D5, and operational amplifier U4B; One end of diode D4 is connected to the inverting input of operational amplifier U1B, and the other end is connected to the non-inverting input of operational amplifier U4B through resistor R12; one end of diode D5 is connected to the signal isolation feedback circuit (301), and the other end is connected to the non-inverting input of operational amplifier U4B through resistor R13.

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