Thermal printing head

Abstract

The utility model relates to the technical field of thermal printing head manufacturing, in particular to a thermal printing head which ensures the working reliability of a control IC (integrated circuit) and prevents the control IC from being opened abnormally and a heating body from being damaged in the printing process by arranging a printing electric signal and control IC electric signal power-on control circuit, and is characterized by further comprising a power-on sequence control circuit, a VH power supply loop and a VH power supply loop on-off control circuit are arranged in the power-on sequence control circuit, an NPN triode Q3 and a PNP triode Q2 are arranged in the VH power supply loop on-off control circuit, a collector electrode of the triode Q3 is connected with the VH power supply loop, an emitter electrode of the triode Q3 is grounded through a resistor R4, a base electrode of the triode Q3 is connected with a VDD, and on-off of the triode Q3 is controlled through the VDD; the emitter of the PNP triode Q2 is connected with the VDD, the collector of the Q2 is grounded through a series structure of the resistor R3 and the capacitor C1, and the capacitor C1 and the R4 are connected in parallel to form a discharge loop.

Description

TECHNICAL FIELD

[0001] The utility model relates to thermal printing head manufacturing technical field, specifically speaking, a kind of through setting print electric signal and control IC electric signal power-on control circuit, to ensure the reliability of control IC work, avoid the thermal printing head that control IC abnormally opens, heating body is destroyed during printing. BACKGROUND

[0002] It is known that thermal printing head is heated by controlling certain specific heating point, so that the thermal paper pressed on this position is discolored to realize printing, and the printing speed of thermal head matches the speed of paper, and row after row of heating discoloration points constitute printed text or pattern.VH is recorded as print electric signal of thermal printing head, and VDD is recorded as power supply electric signal of control IC, so that, in normal printing process, VDD should be powered on before VH, so that control IC is in controllable state, then according to print data, control IC opens certain point, and the VH power supply loop corresponding to the point opened on control IC is conducted, so that the heating point in the power supply loop is powered and heated.

[0003] In real use, part of printer pursues portability, and there is no strict control mechanism for the power-on sequence of VH and VDD of thermal printing head, and when VDD is not powered on, the state of control IC is uncertain, so that if print voltage VH is provided for thermal printing head, it can cause certain point on control IC to be abnormally opened, cause abnormal printing, and when energy is too large, even the heating point can be abnormally damaged. SUMMARY

[0004] The utility model discloses a kind of structural rationality, work reliable, can be powered on control circuit by setting print electric signal and control IC electric signal, to ensure the reliability of control IC work, avoid the thermal printing head that control IC abnormally opens, heating body is destroyed during printing.

[0005] The utility model reaches by following measures:

[0006] The utility model relates to a thermal printing head, be equipped with thermal printing head heating substrate, PCB board, socket, be equipped with heating resistance body, electrode wire and control IC on the thermal printing head heating substrate, the electrode wire includes common electrode, individual electrode, its characterized in that, still be equipped with power -on sequence control circuit, be equipped with VH power supply loop and VH power supply loop on -off control circuit in the power -on sequence control circuit, be equipped with NPN triode Q3 and PNP triode Q2 in the VH power supply loop on -off control circuit, the collector of triode Q3 is connected with VH power supply loop, the emitter of Q3 is grounded through resistance R4, the base of Q3 is connected VDD, and the on -off of Q3 is controlled through VDD, the emitter of PNP triode Q2 is connected with VDD, the collector of Q2 is grounded through the series connection structure of resistance R3 and capacitor C1, and capacitor C1 is connected in parallel with R4 to constitute a discharge loop, VDD is grounded through the series connection of resistance R1 and R2, and VDD is connected to the base of PNP triode Q2 after being divided by R1, and the on -off of PNP triode Q2 is controlled through the voltage after being divided by VDD.

[0007] The utility model discloses the NMOS pipe Q1 is equipped in the VH power supply loop, wherein the collector of triode Q3 is connected with the grid of NMOS pipe Q1, and the common end of control IC is electrically connected to the drain of NMOS pipe Q1 through the PCB board, and the source of NMOS pipe Q1 is connected to the GND signal end of socket through the PCB board.

[0008] The utility model discloses the power -on sequence control circuit sets up on the PCB board, and the VH signal end on socket is connected to the common electrode of thermal printing head heating substrate through the PCB board, and each control pin of control IC is connected on the individual electrode of thermal printing head heating substrate, and the common electrode and individual electrode comb cross position delineate the heating resistance body.

[0009] The utility model discloses in working, through setting up power -on sequence control circuit on thermal printing head, setting up NMOS pipe between control IC common end and GND signal, and the on -off of VH power supply loop is controlled through NMOS pipe grid voltage, setting up NPN triode control NMOS pipe grid voltage loop's on -off, and setting up PNP triode control VDD for the on -off of capacitor charging loop, thereby when VDD power -on, NPN triode and PNP triode conduction, VDD charges capacitor, and the voltage of capacitor both ends can not suddenly change, lead to NMOS pipe grid voltage gradually rises from 0V, and rises to the conduction voltage of NMOS pipe, and VH power supply loop is in normal working condition, when VDD power -off, triode is off, lead to NMOS pipe also off, and VH power supply loop is cut off, through above -mentioned circuit structure, effectively avoid because VDD is not powered on the power -on of VH signal, cause some heating point abnormity to open, cause the phenomenon of abnormal printing even damage thermal printing head.

[0010] Compared with the prior art, the utility model has the advantages of reasonable structure, safety and reliability. BRIEF DESCRIPTION OF DRAWINGS

[0011] BRIEF DESCRIPTION OF DRAWINGS Figure 1 It is the structural schematic diagram of the utility model.

[0012] BRIEF DESCRIPTION OF DRAWINGS Figure 2 It is the principle view of the power -on sequence control circuit in the utility model.

[0013] Reference signs: insulating substrate 1, control IC 2, heating resistance body 3, power -on sequence control circuit 4, socket 5, encapsulation adhesive layer 6, PCB board 7. CONCRETE IMPLEMENTATION

[0014] The utility model is further explained below in combination with the drawings and examples.

[0015] Example

[0016] The example proposes a high reliability thermal printing head, as shown in the accompanying drawings Figure 1 It is provided with the heating substrate for thermal printing head, PCB board 7, socket 5, the heating substrate for thermal printing head is provided with heating resistance body 3, electrode lead and control IC 2, the electrode lead includes common electrode, individual electrode, the heating substrate for thermal printing head is provided with insulating substrate 1, is provided with heating resistance body 3 on ceramic insulating substrate 1, when working, heating resistance body 3 is connected to each control pin of control IC 2 through individual electrode, the common end of control IC 2 is electrically connected to power -on sequence control circuit 4 through PCB board 7, is provided with socket 5 on PCB board 7, and control IC 2 is covered with encapsulation adhesive layer 6 to complete the encapsulation protection of joint;

[0017] As Figure 2 Shown, the example is provided with power -on sequence control circuit 4 on PCB board 7, in combination Figure 1 VH signal on socket 5 is connected to common electrode on ceramic insulating substrate 1 through PCB board 7, each control pin of control IC 2 is connected on individual electrode of ceramic insulating substrate 1, common electrode and individual electrode comb interlaced position delineate heating resistance body 3, the common end of control IC 2 is electrically connected to the drain (D) of NMOS tube Q1 of power -on sequence control circuit 4 through PCB 7, the source (S) of NMOS tube Q1 is connected to the GND signal end of socket 5 through PCB 7, and the above constitutes VH power supply circuit.

[0018] The upper power sequence control circuit 4 further comprises NPN transistor Q3 and PNP transistor Q2, the collector (C) of the transistor Q3 is connected with the gate of the NMOS tube Q1, the emitter (E) of Q3 is grounded through the resistor R4, the base (B) of Q3 is connected with VDD, and the on-off of Q3 is controlled through VDD; the emitter (E) of the PNP transistor Q2 is connected with VDD, the collector (C) is grounded through the series connection of the resistor R3 and the capacitor C1, and C1 is connected with R4 in parallel, thereby forming a discharge circuit, VDD is connected with the ground through the series connection of the resistor R1 and R2, and VDD is connected with the base (B) of the PNP transistor Q2 after being divided by R1, and the on-off of Q2 is controlled through the voltage after VDD is divided;

[0019] When VDD is not powered, Q1 is in the cut-off state, and at this time, no matter whether VH is powered, no current flows through the heat generating resistor body;

[0020] When VDD is powered, the transistors Q2 and Q3 are immediately turned on, VDD charges the capacitor C1 through the resistor R3, and since the voltage across the capacitor C1 cannot be suddenly changed, the gate (G) voltage of the NMOS tube Q1 is at a low level at the beginning, and Q1 is still in the cut-off state, with the charging of the capacitor C1, the gate (G) voltage of the NMOS tube Q1 gradually rises, and when the voltage is greater than the turn-on voltage of the NMOS tube Q1, Q1 is turned on, the VH power supply circuit is normal, and the heat generating resistor body can normally work under the control of the IC, thereby avoiding abnormal printing or damage of the heat generating resistor body caused by the wrong power-on sequence of the external VH and VDD;

[0021] When the printing is finished, VDD is powered off, the transistors Q2 and Q3 are immediately turned off, at this time, the gate (G) of the NMOS tube Q1 is suspended, and Q1 is also immediately turned off, the VH power supply circuit is cut off, thereby avoiding abnormal printing, and at the same time, the capacitor C1 is discharged through the resistor R4, and when the next printing is performed, the capacitor C1 can still play a role in delaying the power-on.

[0022] Compared with the prior art, the utility model has the advantages of reasonable structure, safety and reliability and the like.

Claims

1. A thermal print head provided with a thermal print head heating substrate, a PCB board, and a socket, the thermal print head heating substrate being provided with a heating resistor, electrode leads, and a control IC, the electrode leads including a common electrode and individual electrodes, characterized in that, The power-on sequence control circuit is provided with a VH power supply circuit and a VH power supply circuit on-off control circuit, the VH power supply circuit on-off control circuit is provided with an NPN transistor Q3 and a PNP transistor Q2, the collector of the transistor Q3 is connected with the VH power supply circuit, the emitter of the Q3 is grounded through a resistor R4, the base of the Q3 is connected with VDD, and the on-off of the Q3 is controlled through the VDD; the emitter of the PNP transistor Q2 is connected with VDD, the collector of the Q2 is grounded through a series structure of a resistor R3 and a capacitor C1, the capacitor C1 is connected with the R4 in parallel to form a discharge circuit, VDD is grounded through a series connection of resistors R1 and R2, VDD is connected to the base of the PNP transistor Q2 after being divided by the R1, and the on-off of the PNP transistor Q2 is controlled through the voltage after the VDD is divided.

2. The thermal printhead of claim 1, wherein, The VH power supply circuit is provided with an NMOS transistor Q1, the collector of the transistor Q3 is connected with the gate of the NMOS transistor Q1, the common end of the control IC is electrically connected to the drain of the NMOS transistor Q1 through a PCB board, and the source of the NMOS transistor Q1 is connected to the GND signal end of the socket through the PCB board.

3. The thermal printhead of claim 1, wherein, The power-on sequence control circuit is arranged on the PCB board, the VH signal end of the socket is connected to the common electrode of the heat-generating substrate for the thermal printing head through the PCB board, each control pin of the control IC is connected to the individual electrode of the heat-generating substrate for the thermal printing head, and the common electrode and the individual electrode are comb-shapedly crossed to delineate the heat-generating resistor body.

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