Battery impedance measuring device and battery management system

Abstract

The utility model provides a battery impedance measuring device which is used for measuring impedance of battery units of a battery pack, the battery pack is formed by connecting N battery units in series, N is larger than or equal to 2, and the battery impedance measuring device comprises a pulse current generator which can generate pulse current, the pulse current is used as current excitation of the battery pack; the series resistor and the pulse current generator are connected in series to form a series circuit, and two ends of the series circuit are respectively connected with the anode and the cathode of the battery pack; and the impedance acquisition circuit can be respectively connected with the positive electrode end and the negative electrode end of each battery unit and is used for acquiring a voltage response signal of each battery unit when current excitation is carried out on the battery pack.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of battery management, and in particular to a battery impedance measurement device and a battery management system. BACKGROUND

[0002] Battery impedance detection is an important part of a battery management system (BMS). By detecting the battery impedance, a lot of information about the battery can be obtained, such as the state of charge (SOC), the state of health (SOH), and the internal temperature of the battery, and other key parameters. By analyzing the above key parameters, the safe operation of the battery can be ensured, the battery aging analysis and diagnosis of the battery failure can be performed, and so on. The abnormal state of the battery can be found in the first time, the corresponding warning and fault handling can be performed, the battery performance can be optimized, and the life of the battery can be prolonged.

[0003] One of the ways of detecting the battery impedance in the prior art is to send an excitation current to obtain the value of the impedance to be measured. The main defects existing in the prior art are: the excitation signal for exciting the battery is usually a sine (cosine) wave excitation signal. A complex hardware circuit structure is needed to generate the (cosine) wave excitation signal, and each battery needs a corresponding impedance detection circuit. For a multi-string battery pack, the cost is too high. The above problems need to be improved, and there are also problems such as low detection accuracy. CONTENT OF THE INVENTION

[0004] The present disclosure provides a battery impedance measurement device and a battery management system.

[0005] According to one aspect of the present disclosure, a battery impedance measurement device is provided for measuring the impedance of a battery cell of a battery pack, wherein the battery pack is formed by N battery cells in series, where N≥2, the battery impedance measurement device comprising: a pulse current generator capable of generating a pulse current, and the pulse current as a current excitation of the battery pack; a series resistance in series with the pulse current generator to form a series circuit, two ends of the series circuit being connected to the positive and negative electrodes of the battery pack, respectively; and an impedance acquisition circuit capable of being connected to the positive and negative terminals of each battery cell, respectively, for acquiring a voltage response signal of each battery cell when the battery pack is current excited.

[0006] According to the technical solution of the aspect, the sine (cosine) excitation signal is not required for impedance measurement, avoiding the use of a complex sine (cosine) generation circuit. Each battery unit does not need to be excited separately. The battery impedance of each battery unit is collected by exciting the entire battery pack. The cost can be reduced and the reliability of the circuit can be ensured.

[0007] According to at least one embodiment of the present disclosure, the pulse current generator includes an excitation switch in series with the series resistance to form the series circuit, wherein the pulse current is generated by turning on and off the excitation switch.

[0008] According to at least one embodiment of the present disclosure, when the excitation switch is turned on, the amplitude of the pulse current is the ratio of the battery pack voltage to the resistance value of the series resistance.

[0009] According to at least one embodiment of the present disclosure, the turning on and off of the excitation switch is controlled by a control signal, wherein the control signal is an excitation signal with multiple excitation frequencies, so as to detect the voltage response signal of each battery unit at different excitation frequencies.

[0010] According to at least one embodiment of the present disclosure, the impedance acquisition circuit includes a level converter, a DC removal amplifier, and an analog-to-digital converter, the level converter is used to convert the voltage response signal between the positive and negative terminals of each battery unit, the output signal of the level converter is used as the input signal of the DC removal amplifier, the DC removal amplifier is used to remove the DC component in the input signal, and the analog-to-digital converter is used to convert the output signal of the DC removal amplifier into a digital signal.

[0011] According to at least one embodiment of the present disclosure, the battery impedance measurement device further includes a microprocessor, which is used to determine the battery impedance of each battery unit according to the digital signal.

[0012] According to at least one embodiment of the present disclosure, the control signal is a signal obtained by dividing a clock signal by a clock divider.

[0013] According to at least one embodiment of the present disclosure, the DC removal amplifier includes a DC removal circuit and a common mode voltage adjustment circuit, one input terminal of the DC removal circuit receives the output signal of the level converter, the common mode voltage adjustment circuit receives the output signal of the DC removal circuit, the output of the common mode voltage adjustment circuit is the DC component, and the DC removal circuit is used to remove the DC component from the output signal of the level converter.

[0014] According to at least one embodiment of the present disclosure, the common mode voltage adjustment circuit comprises a comparator, a successive approximation controller and a digital-to-analog converter, the comparator receives an output signal of the DC removal circuit, the successive approximation controller receives an output signal of the comparator, the digital-to-analog converter receives an output signal of the successive approximation controller, and an output signal of the digital-to-analog converter is provided to another input terminal of the DC removal circuit, and a DC component in the output signal of the level shifter is found through the comparator, the successive approximation controller and the digital-to-analog converter.

[0015] According to at least one embodiment of the present disclosure, the DC removal circuit comprises a first stage differential amplifier and a second stage gain amplifier, the first stage differential amplifier comprises a first operational amplifier and a second operational amplifier, the negative input terminals of the first operational amplifier and the second operational amplifier are connected through a resistance, the positive input terminal of the first operational amplifier receives the output signal of the level shifter, the positive input terminal of the second operational amplifier receives the output signal of the common mode voltage adjustment circuit, the output terminals of the first operational amplifier and the second operational amplifier are connected to the positive input terminal and the negative input terminal of the second stage gain amplifier respectively, and the output terminal of the second stage gain amplifier is connected to the common mode voltage adjustment circuit.

[0016] According to at least one embodiment of the present disclosure, the DC removal circuit comprises an operational amplifier, one input terminal of the operational amplifier is connected to the output terminal of the level shifter via a first resistance, one input terminal of the operational amplifier is connected to the output terminal of the operational amplifier via a second resistance, the other input terminal of the operational amplifier is connected to the output terminal of the common mode voltage adjustment circuit via a third resistance, and the other input terminal is grounded via a fourth resistance, and the output terminal of the operational amplifier can be connected to the input terminal of the common mode voltage adjustment circuit and the input terminal of the analog-to-digital converter.

[0017] According to at least one embodiment of the present disclosure, the output signal of the DC removal amplifier is converted into a digital signal by the analog-to-digital converter controlled by an asynchronous clock, and in the idle time between two adjacent sampling of the analog-to-digital converter, the voltage, current or temperature of the battery cell is detected.

[0018] According to another aspect of the present disclosure, a battery management system is provided, comprising the battery impedance measurement device according to any one of the above. BRIEF DESCRIPTION OF DRAWINGS

[0019] The accompanying drawings illustrate exemplary embodiments of the present disclosure and together with the general description of the disclosure given above, and the detailed description of the embodiments below, serve to explain the principles of the present disclosure. These drawings are included herewith and constitute a part of the specification.

[0020] Figure 1 A schematic diagram of a battery impedance measurement device according to one embodiment of the present disclosure is shown.

[0021] Figure 2 A schematic diagram of a battery impedance measurement device according to one embodiment of the present disclosure is shown.

[0022] Figure 3 A schematic diagram of a voltage signal output by a level shifter is shown.

[0023] Figure 4 A voltage schematic diagram showing direct amplification of a voltage signal from Figure 3

[0024] Figure 5 A voltage schematic diagram showing amplification after removing DC components from a converted voltage output by a level shifter.

[0025] Figure 6 A schematic diagram of a DC removal amplifier according to a specific embodiment of the present application is shown.

[0026] Figure 7 A schematic diagram of a DC removal circuit in the form of a single op-amp subtractor circuit is shown.

[0027] Figure 8 Idle time between two samples of an analog-to-digital converter in low frequency impedance detection is shown.

[0028] Figure 9 A schematic diagram of a battery impedance measurement device according to one embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0029] The present disclosure will be further described by way of example with reference to the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are merely illustrative of certain specific embodiments of the present disclosure and are not intended to limit the scope of the present disclosure. In addition, it is to be understood that the drawings are only schematic and that, therefore, the proportions of the various components do not reflect the actual proportions of the various components.

[0030] It should be noted that the embodiments and features of the present disclosure can be combined with each other, provided that there is no conflict. The technical solutions of the present disclosure will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

[0031] Unless otherwise specified, the exemplary embodiments / examples shown will be understood as providing exemplary features of various details that can embody the technical ideas of the present disclosure in practice. Therefore, unless otherwise specified, the features of the various embodiments / examples can be additionally combined, separated, interchanged and / or rearranged without departing from the technical ideas of the present disclosure.

[0032] ​According to one embodiment of the present application, a battery impedance measurement device can include a pulse current generator capable of generating a pulse current and exciting the battery pack as a current; a series resistor connected in series with the pulse current generator to form a series circuit, two ends of the series circuit being connected to the positive and negative poles of the battery pack respectively; and an impedance acquisition circuit capable of being connected to the positive and negative poles of each battery cell respectively, for acquiring the voltage response signal of each battery cell when the battery pack is excited by the current. The pulse current generator can be an excitation switch and a device (such as a clock divider, etc.) generating a control signal thereof.

[0033] Figure 1 A schematic diagram of a battery impedance measurement device according to one embodiment of the present disclosure is shown.

[0034] As shown in Figure 1 , the battery impedance measurement device is used to measure the impedance of each battery in the battery pack. The battery pack 100 can include N battery cells, where N≥2. Figure 1 As shown in Figure 1 , the motor M can be used as a load, and the battery pack 100 can supply power to the motor M to control the rotation of the motor M. When supplying power to the motor M, the battery pack 100 is discharged. When the battery pack 100 is charged, a charging power source is connected across the battery pack 100.

[0035] The battery impedance is of great significance to understanding the state of the battery, evaluating the performance, fault diagnosis and prevention, etc. Therefore, in the process of battery pack management, the battery impedance of each battery cell needs to be measured.

[0036] In order to measure the battery impedance of each battery cell, an excitation signal is applied to the battery cell through an excitation circuit. The related art drives the switch of each battery cell by a cosine (sine) excitation signal generated by a cosine (sine) generator to realize the measurement of the battery impedance of each battery cell. In the case of measuring other battery cells, the excitation circuit and the measurement circuit generating the excitation signal are switched to other battery cells. As shown in the patent, in order to realize excitation, a cosine (sine) generator and a Sigma-Delta modulator, etc. In addition, in the case of exciting multiple battery cells, multiple excitation circuits and measurement circuits are required. The excitation signal is used to drive the switch on the measurement output side of the battery cell. Obviously, during the measurement of the battery impedance, the battery pack should be in an idle state (non-use state).

[0037] The technical solution of the present disclosure, as described below, enables impedance measurement of each battery cell in a battery pack during the process of measuring the impedance of each battery cell, even when the battery pack is in an operating state (e.g., a state in which the battery pack drives a motor to operate), and without the need to provide an excitation circuit for each battery cell. As Figure 1 As shown in FIG. 1, the battery impedance measurement device can include an impedance acquisition circuit 300, which can be in the form of a chip or other suitable form. The impedance acquisition circuit 300 is configured to acquire a voltage response signal of each battery cell and provide the voltage response signal to a microprocessor 400. The microprocessor 400 can obtain the battery impedance of each battery cell based on the voltage response signal of the impedance acquisition circuit 300.

[0038] First, in the technical solution of the present disclosure, an excitation control circuit is included. The excitation control circuit can include an excitation switch 500. The excitation switch can receive a pulse excitation signal. The excitation switch is controlled to turn on and off by the pulse excitation signal, thereby exciting the battery pack. The excitation switch can be various suitable forms of switches, and a MOS transistor form of switch is shown in the figure.

[0039] In the technical solution of the present disclosure, excitation is not applied to each battery cell individually, but is applied to the entire battery pack when measuring the battery impedance of each battery cell. As Figure 1 As shown in FIG. 1, one end of the excitation switch 500 is connected to the positive electrode of the battery pack, and the other end is connected to the negative electrode of the battery pack. That is, the excitation switch 500 is connected in series with the battery pack 100. Excitation of the entire battery pack is achieved by turning on and off the excitation switch 500. In Figure 1 A MOS transistor form of switch is shown in FIG. 1, in which the source of the MOS transistor is connected to the positive electrode of the battery pack via a series resistor 510, and the drain of the MOS transistor is connected to the negative electrode of the battery pack. The source of the MOS transistor receives a pulse excitation signal from the outside, and the MOS transistor is controlled to turn on and off by the pulse excitation signal, thereby achieving the purpose of exciting the entire battery pack. In an embodiment of the present disclosure, the impedance acquisition circuit 300 and the microprocessor 400 can be integrated in a chip, and the excitation switch is a device outside the chip.

[0040] The pulse excitation signal applied to the gate of the MOS transistor can come from the microprocessor 400, and the pulse excitation signal can be generated by the microprocessor. The pulse excitation signal can also come from a separate clock divider. These will be described in detail below.

[0041] As Figure 1As shown, the battery impedance measuring device of the present application also includes an equalization circuit. As the battery pack is used, the performance of the individual battery cells can become inconsistent, and this can result in an imbalance. Using charging as an example, some of the cells can have been fully charged, while some of the cells can not have been fully charged, or some of the cells can have been overcharged. The same is true for the discharging process. Due to the inconsistency of the individual cells, it is necessary to take necessary equalization measures during the charging and discharging process to ensure its safety and stability.

[0042] Figure 1 An equalization circuit 200 is shown. The equalization circuit can be integrated in the form of a chip, or can be integrated with the impedance acquisition circuit 300 and the microprocessor 400 in one chip. The equalization circuit 200 includes N control switches 211, 212, …, 21n, the first end of each of the N control switches is connected to the positive terminal of the corresponding battery cell via an equalization resistor 241, 242, …, 24n, and the second end of each of the N control switches is connected to the negative terminal of the corresponding battery cell. For example Figure 1 As shown, the first end of the first control switch 211 is connected to the positive terminal of the first battery cell 101 via the first equalization resistor 241, and the second end is connected to the negative terminal of the first battery cell 101; the first end of the second control switch 212 is connected to the positive terminal of the second battery cell 102 via the second equalization resistor 242, and the second end is connected to the negative terminal of the second battery cell 102; the first end of the nth control switch 21n is connected to the positive terminal of the nth battery cell 10n via the nth equalization resistor 241, and the second end is connected to the negative terminal of the nth battery cell 10n. N first resistors 231, 232, …, 23n are connected between the negative terminals of the N battery cells and the output, and the first resistor 23n+1 is connected between the positive terminal of the nth battery cell 10n and the output. The second resistors 221, 222, …, 22n are connected between the output and the control terminals of the corresponding control switches. The ith control switch is controlled such that when the current flowing from the positive terminal of the ith battery to the positive terminal of the (i-1)th battery is greater than a current threshold, the voltage generated based on the ith first resistor causes the ith control switch to be turned on, and thus current flows through the ith control switch to equalize the current of the ith battery, where 1

[0043] When the control switch is an NMOS transistor, the first end of the control switch is the drain, the second end of the control switch is the source, and the control terminal of the control switch is the gate. When the control switch is a triode, the first end of the control switch is the collector, the second end of the control switch is the emitter, and the control terminal of the control switch is the base. In Figure 1 A control switch in the form of a triode is shown.

[0044] The following explanation will take the contents of the second battery as an example and set the control switch as a transistor (control switch 212).

[0045] The collector of the transistor is connected to the positive terminal of the second battery cell 102 (the negative terminal of the third battery cell) via an equalization resistor 242, and the emitter of the transistor is connected to the negative terminal of the second battery cell 102 (the positive terminal of the first battery cell 101). The base of the transistor is connected to a second resistor 222, and a first resistor 232 is connected between the emitter of the transistor and the second resistor 222. Thus, when battery imbalance occurs, the voltage formed by resistors 222 and 232 constitutes the voltage between the base and emitter of the transistor. When this voltage exceeds the threshold turn-on voltage, the transistor will conduct, and an equalization current will flow from resistor 242 through the transistor, thereby equalizing the battery 102. When no current flows, the transistor is off, and no equalization control is performed.

[0046] Additionally, the equalization circuit 200 may include filter capacitors 251, 252, ..., 25n. Each filter capacitor is connected between the positive and negative output terminals of each battery cell. For example, the first filter capacitor 251 is connected between the positive and negative output terminals of the first battery cell 101; the second filter capacitor 252 is connected between the positive and negative output terminals of the second battery cell 102; ...; the nth filter capacitor 25n is connected between the positive and negative output terminals of the nth battery cell 10n.

[0047] like Figure 2 As shown, the impedance acquisition circuit 300 may include a multiplexing circuit 310 and an impedance measurement circuit 320. The multiplexing circuit 310 may include a multiplexer, which, by switching the switch, connects the output of the positive terminal and the output of the negative terminal of each battery cell to the impedance measurement circuit 320 respectively. For example, in... Figure 2 The diagram illustrates an example of connecting the positive and negative terminals of the second battery cell 102 to the impedance measurement circuit 320. When measuring other battery cells, the outputs of the positive and negative terminals of other battery cells can be connected to the impedance measurement circuit 320 via the multiplexing circuit 310.

[0048] The impedance measurement circuit 320 may include a level shifter 321, a DC-DC de-amplifier 322, a programmable gain amplifier (PGA) 323, an analog-to-digital converter 324, a successive approximation controller (SAR Logic) 325, and a digital-to-analog converter 326. The DC-DC de-amplifier 322, PGA 323, SAR Logic 324, and SAR Logic 325 constitute the DC-DC de-amplifier.

[0049] like Figure 2 As shown, level converter 321 is used to receive the positive and negative outputs from each battery cell. Level converter 321 is used to convert the voltage between the received positive and negative outputs of the battery cells to a voltage within a desired range. The converted voltage from level converter 321 is provided to DC-DC circuit 322.

[0050] Figure 3 The voltage signal output by the level converter 321 is shown. As an example, this voltage signal typically consists of a small, weak voltage signal superimposed on a DC voltage; this weak voltage signal is the effective signal for measuring battery impedance. For example, a voltage signal with an amplitude of less than 1mV is superimposed on a 2.5V DC voltage. Those skilled in the art will understand that if based on... Figure 3 The voltage signal shown, after being quantized by an analog-to-digital converter and converted into a digital signal, cannot be demodulated to obtain an accurate value of the battery impedance. Furthermore, if... Figure 3 The voltage signal shown is directly amplified because it contains a DC component (DC voltage). Even with a magnification factor of 2, the output signal will saturate. Once the signal saturates, the output signal will become a straight line. At this point, the effective signal (weak voltage signal) superimposed on the DC voltage will be lost. Figure 4 It shows the Figure 3 The diagram illustrates a voltage signal that has been directly amplified. This voltage signal is saturated after amplification, meaning that effective information has clearly been lost.

[0051] Therefore, in the technical solution of this application, the DC component in the converted voltage output by the level converter 321 is removed, and only the effective signal is amplified. The DC component is not amplified, thus ensuring that the amplified signal does not saturate. Figure 5 The diagram illustrates a voltage amplification process following the removal of the DC component from the converted voltage output by the level converter 321, according to an embodiment of this disclosure. By amplifying the effective signal after removing the DC component and then quantizing it via an analog-to-digital converter, the resulting impedance detection result will be more accurate.

[0052] exist Figure 6A schematic diagram of a DC removal amplifier according to a specific embodiment of the present application is shown in FIG. 3. As mentioned above, the DC removal amplifier includes a DC removal circuit 322, a programmable gain amplifier 323, a digital-to-analog converter 326 and a successive approximation register 325. The DC removal circuit 322 can be an amplifier circuit composed of three operational amplifiers. As shown in the figure, the amplifier circuit can include a first stage differential amplifier and a second stage gain amplifier. The first stage differential amplifier includes a first operational amplifier 3221 and a second operational amplifier 3222, and the second stage gain amplifier is a third operational amplifier 3223.

[0053] The positive input terminal of the first operational amplifier 3221 is connected to the voltage signal output by the level converter 321, and the negative input terminal of the first operational amplifier 3221 is connected to the output terminal of the first operational amplifier 3221 via a first resistor R1. The positive input terminal of the second operational amplifier 3222 is connected to the voltage signal output by the level converter 321, and the negative input terminal of the second operational amplifier 3222 is connected to the output terminal of the second operational amplifier 3222 via a second resistor R2. Typically, the first resistor and the second resistor have the same resistance value. The negative input terminals of the first operational amplifier 3221 and the second operational amplifier 3222 can be connected via a third resistor R3 and a fourth resistor R4. The third resistor R3 and the fourth resistor R4 can also be one resistor. The output terminal of the first operational amplifier 3221 is connected to the positive input terminal of the third operational amplifier 3223 via a fifth resistor R5, and the output terminal of the second operational amplifier 3222 is connected to the negative input terminal of the third operational amplifier 3223 via a sixth resistor R6. According to the amplifier circuit of the present application, common mode signals can be effectively suppressed, and the signal-to-noise ratio of the signal can be improved.

[0054] During the amplification of the voltage signal output from the level converter 321 in the amplifier circuit, it is necessary to consider how to remove the DC component. Therefore, after careful study, the inventors of this disclosure have adopted an adjustable common-mode voltage (Vcm) as the input of the amplifier circuit. In this application, the common-mode voltage adjustment circuit may include a programmable gain amplifier 323, a successive approximation controller 325, and a digital-to-analog converter 326. Specifically, the output of the third operational amplifier 3223 is used as the input of the programmable gain amplifier 323, the output of the programmable gain amplifier 323 is used as the input of the successive approximation controller 325, and the output of the successive approximation controller 325 is used as the input of the digital-to-analog converter 326. The output of the digital-to-analog converter 326 is connected to the positive input terminal of the second operational amplifier 3222 of the amplifier circuit. Thus, the DC component is detected through the programmable gain amplifier 323, the successive approximation controller 325, and the digital-to-analog converter 326. The programmable gain amplifier 323 can also be an open-loop comparator. The digital-to-analog converter 326 can also be a resistor divider network. The degree to which the final adjusted common-mode voltage closely approximates the actual DC component depends on the resolution of the digital-to-analog converter 326. Furthermore, the programmable gain amplifier 323 and successive approximation controller 325 in the common-mode voltage adjustment circuit can be multiplexed with the analog-to-digital converter 324, meaning it can be used as the analog-to-digital converter 324. However, the bit depth of the successive approximation controller needs to be adjusted during use. As another technical solution of this application, a DC de-DC loop can be constructed using the DC de-DC circuit 322, the programmable gain amplifier 323, the analog-to-digital converter 324, and the logic circuitry in the microprocessor 400. Its effect is similar to... Figure 6 The working principle of the DC-DC de-circuit formed by the DC-DC de-circuit 322, the programmable gain amplifier 323, the successive approximation controller 325, and the digital-to-analog converter 326 is the same.

[0055] According to further embodiments of this application, the following can be employed: Figure 7 The DC-DC decoupling circuit 322 is shown. In Figure 7In the embodiment of the application, the form of the DC removal circuit 322 is a single operational amplifier subtractor circuit. The DC removal circuit 322 can include an operational amplifier A1. One input of the operational amplifier A1 is connected to the output of the level shifter 321 via a first resistor R1, and one input of the operational amplifier A1 is connected to the output of the operational amplifier A1 via a second resistor R2, the other input of the operational amplifier A1 is connected to the output of the digital-to-analog converter 326 via a third resistor R3, and the other input is grounded via a fourth resistor R4. Wherein the resistance value of the first resistor R1 is equal to the resistance value of the third resistor R3, and the resistance value of the second resistor R2 is equal to the resistance value of the fourth resistor R4. In this way, the output of the operational amplifier A1 will be equal to the difference between the voltage of the other input and the voltage of one input multiplied by the ratio of the second resistor to the first resistor. Thus achieving the purpose of removing the DC component from the voltage response signal. It can be understood that the DC component can be found by the successive approximation controller 325 and the digital-to-analog converter 326, and the DC component is taken as one input of the operational amplifier A1. During impedance detection, the feedback loop formed by the successive approximation controller 325 and the digital-to-analog converter 326 needs to be disconnected, and the output signal of the digital-to-analog converter 326 is maintained.

[0056] In various embodiments of the application, the DC removal operation needs to be completed before the impedance detection starts. First, the DC component is obtained, and then when the impedance detection starts, the DC component is removed during the detection process. For example, the DC component corresponding to the output signal of the digital-to-analog converter 326 can be maintained as one input of the DC removal circuit. If the detection is performed at a replacement frequency, the DC removal operation is also performed first.

[0057] In the application, the analog-to-digital converter 324 can be a SAR ADC. Wherein the time after each conversion is the idle time of impedance detection in the low speed case, and other state detection of the battery can be performed in the idle time. According to the technical solution of the present application, the impedance value needs to be detected at different frequencies during impedance detection, which means that the battery pack needs to be excited by excitation signals at different frequencies, and the higher the frequency of the excitation signal, the higher the corresponding sampling frequency of the analog-to-digital converter. In this paper, an asynchronous clock controlled SAR ADC is used to quantize the impedance detection signal, and the conversion speed of the asynchronous SAR ADC is determined by its internal asynchronous comparison loop, and is independent of the control clock of the SAR ADC. Therefore, the time from completing sampling to obtaining the digital output of the ADC is fixed, and when the low frequency impedance of the battery is detected, the sampling time of the ADC is large. This also means that after an asynchronous ADC quantization output is completed, the remaining idle time before the next sampling is large, and other ADCs (not shown) can be used to monitor the voltage, current or temperature of the same battery cell. Figure 8Idle time between two sampling of the ADC is shown when low frequency impedance detection.

[0058] During the detection, a current excitation is applied to the battery pack, and the impedance of each cell generates a voltage. The impedance of each cell is calculated by measuring the voltage value. In a preferred embodiment, a resistor and a switch are connected in series between the positive and negative terminals of the battery pack. When the switch is on, a conduction branch is formed between the positive and negative terminals of the battery pack, which is equivalent to adding a current excitation of VDD / Res (Res is the resistance value of the resistor) to the battery pack relative to the normal working state of the battery pack. When the switch is off, it is equivalent to adding a current excitation of 0 to the battery pack relative to the normal working state of the battery pack. The switch is periodically switched between the on and off states under the control of the microcontroller or the clock divider. It is equivalent to adding a pulsed current as an excitation signal to the battery relative to the normal working state of the battery. The impedance acquisition is also controlled by the switch control signal.

[0059] In this application, the sampling frequency of the analog-to-digital converter needs to be much higher than the frequency of the excitation signal, for example, it can be 50 times higher than the frequency of the excitation signal. In addition, a digital filter can be used to downsample and denoise the output of the analog-to-digital converter.

[0060] The battery impedance is detected when the battery is in the working mode (for example, the motor of the electric vehicle is in the running state). The detection of the battery impedance will inevitably be disturbed by the load voltage, so the change rate of the battery impedance is used as the variable of the battery safety monitoring based on the detection of the absolute value of the battery impedance, which can avoid false triggering caused by load disturbance.

[0061] In the above embodiment, the pulse excitation signal can be generated by a microprocessor. In Figure 9 In the above embodiment, the pulse excitation signal can be generated by a microprocessor. In

[0062] In the technical solution of the present disclosure, a pulse excitation current is applied to the entire battery pack, and the battery cells generate a voltage response signal. The present disclosure generates a pulse excitation current without a complex circuit structure, only needs to be provided by a clock divider to divide the clock signal or by a microprocessor to generate a pulse excitation signal of different frequencies, so as to achieve the purpose of real-time detection of impedance. The impedance acquisition circuit provided by the present disclosure is beneficial to circuit design and implementation, and reduces the corresponding production and manufacturing costs. There is no need to configure an impedance acquisition circuit for each battery cell, thereby reducing the cost. The anti-saturation DC removal amplification circuit only amplifies the useful signal and removes the DC component. The amplified signal will not be saturated, and after the impedance signal is amplified, the ADC is used for quantization processing, so that a more accurate impedance detection result can be obtained, and the impedance signal distortion is prevented.

[0063] According to a further embodiment of the present application, a battery management system is also provided. The battery management system can comprise a battery impedance measurement device as described above.

[0064] In the description of the present specification, the description of the terms “one embodiment / way”, “some embodiments / ways”, “example”, “specific example”, or “some examples” and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment / way or example are included in at least one embodiment / way or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment / way or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments / ways or examples. In addition, the person skilled in the art can combine and combine the different embodiments / ways or examples described in the present specification and the features of the different embodiments / ways or examples, without contradiction.

[0065] In addition, the terms “first”, “second” are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with “first”, “second” can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of “a plurality of” is at least two, for example, two, three, etc., unless otherwise specifically limited.

[0066] The person skilled in the art should understand that the above embodiments are only for clearly illustrating the present disclosure, and are not intended to limit the scope of the present disclosure. Based on the above disclosure, other changes or modifications can also be made by those skilled in the art, and these changes or modifications are still within the scope of the present disclosure.

Claims

1. A battery impedance measurement device, characterized by, The battery impedance measuring device is used for measuring the impedance of battery cells of a battery pack, wherein the battery pack is formed by N battery cells in series, wherein N≥2, and the battery impedance measuring device comprises: a pulse current generator capable of generating a pulse current and exciting the battery pack as a current excitation; a series resistor forming a series circuit with the pulse current generator, two ends of the series circuit being connected to the positive and negative poles of the battery pack, respectively; an impedance acquisition circuit capable of being connected to the positive and negative poles of each battery cell, respectively, for acquiring a voltage response signal of each battery cell when the battery pack is excited by the current.

2. The battery impedance measurement device of claim 1, wherein, The pulse current generator comprises an excitation switch forming the series circuit with the series resistor, wherein the pulse current is generated by turning on and off the excitation switch.

3. The battery impedance measurement device of claim 2, wherein, When the excitation switch is turned on, the amplitude of the pulse current is the ratio of the battery voltage to the resistance value of the series resistor.

4. The battery impedance measurement device of claim 2, wherein, The turning on and off of the excitation switch are controlled by a control signal, wherein the control signal is an excitation signal with multiple excitation frequencies, so as to detect the voltage response signals of the battery cells at different excitation frequencies.

5. The battery impedance measurement device of claim 4, wherein, The impedance acquisition circuit comprises a level converter, a DC removal amplifier and an analog-to-digital converter, the level converter is used for the voltage response signal between the positive and negative poles of each battery cell, the output signal of the level converter is the input signal of the DC removal amplifier, the DC removal amplifier is used for removing the DC component in the input signal, and the analog-to-digital converter is used for converting the output signal of the DC removal amplifier into a digital signal.

6. The battery impedance measurement device of claim 5, wherein, The battery impedance measuring device further comprises a microprocessor for determining the battery impedance of each battery cell according to the digital signal.

7. The battery impedance measurement device of claim 6, wherein, The control signal is a signal obtained by dividing a clock signal by a clock divider.

8. The battery impedance measurement device of claim 5, wherein, The DC removal amplifier comprises a DC removal circuit and a common-mode voltage adjusting circuit, one input end of the DC removal circuit receives the output signal of the level converter, the common-mode voltage adjusting circuit receives the output signal of the DC removal circuit, the output of the common-mode voltage adjusting circuit is the DC component, and the DC removal circuit is used for removing the DC component from the output signal of the level converter.

9. The battery impedance measurement device of claim 8, wherein, The common-mode voltage adjusting circuit comprises a comparator, a successive approximation controller and a digital-to-analog converter, the comparator receives the output signal of the DC removal circuit, the successive approximation controller receives the output signal of the comparator, the digital-to-analog converter receives the output signal of the successive approximation controller, and the output signal of the digital-to-analog converter is provided to the other input end of the DC removal circuit, and the DC component in the output signal of the level converter is found through the comparator, the successive approximation controller and the digital-to-analog converter.

10. The battery impedance measurement device of claim 8, wherein, The DC removal circuit comprises a first differential amplifier and a second gain amplifier, the first differential amplifier comprises a first operational amplifier and a second operational amplifier, the negative input terminals of the first operational amplifier and the second operational amplifier are connected through a resistor, the positive input terminal of the first operational amplifier receives the output signal of the level converter, the positive input terminal of the second operational amplifier receives the output signal of the common-mode voltage adjusting circuit, the output terminals of the first operational amplifier and the second operational amplifier are connected to the positive input terminal and the negative input terminal of the second gain amplifier respectively, and the output terminal of the second gain amplifier is connected to the common-mode voltage adjusting circuit.

11. The battery impedance measurement device of claim 8, wherein, The DC removal circuit comprises an operational amplifier, one input terminal of the operational amplifier is connected to the output terminal of the level converter via a first resistor, one input terminal of the operational amplifier is connected to the output terminal of the operational amplifier via a second resistor, the other input terminal of the operational amplifier is connected to the output terminal of the common-mode voltage adjusting circuit via a third resistor, and the other input terminal is grounded via a fourth resistor, and the output terminal of the operational amplifier can be connected to the input terminal of the common-mode voltage adjusting circuit and the input terminal of the analog-to-digital converter.

12. The battery impedance measurement device of claim 5, wherein, The output signal of the DC removal amplifier is converted into a digital signal by the analog-to-digital converter controlled by an asynchronous clock, wherein, in the idle time between two adjacent sampling of the analog-to-digital converter, the voltage, current or temperature of the battery cell is detected.

13. A battery management system, characterized by, A battery impedance measurement device as claimed in any one of claims 1 to 12.

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