Battery impedance measuring device and battery management system

Abstract

The utility model provides a battery impedance measuring device which comprises N pulse excitation switches which are controlled to be switched on and switched off by pulse excitation signals and can generate pulse excitation current which serves as current excitation of a battery unit; the N series resistors and the N pulse excitation switches form N series circuits in a one-to-one correspondence mode, and the two ends of the N series circuits are connected to the positive electrode output ends and the negative electrode output ends of the N battery units in a one-to-one correspondence mode; and the impedance acquisition circuit can be connected with the positive electrode end and the negative electrode end of each battery unit, and is used for acquiring voltage response signals of the corresponding battery units when current excitation is carried out on the N battery units.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the field of battery management, and in particular to a battery impedance measurement device and a battery management system. BACKGROUND

[0002] Battery impedance detection is an important part of a battery management system (BMS). By detecting the battery impedance, a lot of information of the battery can be obtained, such as the state of charge (SOC), the state of health (SOH), and the internal temperature of the battery, and the like. By analyzing the above key parameters, the safe operation of the battery can be ensured, the battery aging analysis and the diagnosis of the battery failure can be performed, and the like. The abnormal state of the battery can be found in the first time, the corresponding early warning and fault handling can be performed, the battery performance can be optimized, and the life of the battery can be prolonged.

[0003] One of the ways of detecting the battery impedance in the prior art is to send an excitation current to obtain the value of the impedance to be measured. The main defects existing in the prior art are that the excitation signal for exciting the battery is usually a sine (cosine) wave excitation signal, and a complex hardware circuit structure is needed to generate the (cosine) wave excitation signal. CONTENT OF THE INVENTION

[0004] The present disclosure provides a battery impedance measurement device and a battery management system.

[0005] According to one aspect of the present disclosure, a battery impedance measurement device for measuring the impedance of a battery cell of a battery pack is provided, wherein the battery pack is formed by N battery cells in series, and N≥2. The battery impedance measurement device comprises: N pulse excitation switches controlled to be turned on and turned off by a pulse excitation signal, and capable of generating a pulse excitation current as a current excitation of the battery cell; N series resistors forming N series circuits one by one corresponding to the N pulse excitation switches, two ends of the N series circuits being connected to the positive and negative output ends of the N battery cells one by one; and an impedance acquisition circuit capable of being connected to the positive and negative ends of each battery cell, respectively, for acquiring a voltage response signal of the corresponding battery cell when the N battery cells are excited by current respectively.

[0006] According to at least one embodiment of the present disclosure, when the pulse excitation switch is turned on, the amplitude of the pulse excitation current is the ratio of the voltage of the corresponding battery cell to the resistance value of the series resistor.

[0007] According to at least one embodiment of the present disclosure, the pulse excitation signal is an excitation signal with multiple excitation frequencies so as to detect the voltage response signal of each battery cell under different excitation frequencies.

[0008] According to at least one embodiment of the present disclosure, the impedance acquisition circuit comprises a level converter, a DC removal amplifier and an analog-to-digital converter, the level converter is used to acquire the voltage response signal between the positive output end and the negative output end of each battery cell, the output signal of the level converter is used as the input signal of the DC removal amplifier, the DC removal amplifier is used to remove the DC component in the input signal, and the output signal of the DC removal amplifier is converted into a digital signal by the analog-to-digital converter.

[0009] According to at least one embodiment of the present disclosure, the battery impedance measuring device further comprises a microprocessor, and the microprocessor is used to determine the battery impedance of each battery cell according to the digital signal.

[0010] According to at least one embodiment of the present disclosure, the pulse excitation signal is a signal obtained by dividing a clock signal by a clock divider.

[0011] According to at least one embodiment of the present disclosure, the DC removal amplifier comprises a DC removal circuit and a common-mode voltage adjustment circuit, one input end of the DC removal circuit receives the output signal of the level converter, the common-mode voltage adjustment circuit receives the output signal of the DC removal circuit, the output of the common-mode voltage adjustment circuit is the DC component, and the DC removal circuit is used to remove the DC component from the output signal of the level converter.

[0012] According to at least one embodiment of the present disclosure, the common-mode voltage adjustment circuit comprises a comparator, a successive approximation controller and a digital-to-analog converter, the comparator receives the output signal of the DC removal circuit, the successive approximation controller receives the output signal of the comparator, the digital-to-analog converter receives the output signal of the successive approximation controller, and the output signal of the digital-to-analog converter is provided to the other input end of the DC removal circuit, and the DC component in the output signal of the level converter is found through the comparator, the successive approximation controller and the digital-to-analog converter.

[0013] According to at least one embodiment of the present disclosure, the DC removal circuit comprises a first stage differential amplifier and a second stage gain amplifier, the first stage differential amplifier comprises a first operational amplifier and a second operational amplifier, the negative input terminals of the first operational amplifier and the second operational amplifier are connected through a resistor, the positive input terminal of the first operational amplifier receives the output signal of the level converter, the positive input terminal of the second operational amplifier receives the output signal of the common mode voltage adjustment circuit, the output terminals of the first operational amplifier and the second operational amplifier are connected to the positive input terminal and the negative input terminal of the second stage gain amplifier respectively, and the output terminal of the second stage gain amplifier is connected to the common mode voltage adjustment circuit.

[0014] According to at least one embodiment of the present disclosure, the DC removal circuit comprises an operational amplifier, one input terminal of the operational amplifier is connected to the output terminal of the level converter via a first resistor, one input terminal of the operational amplifier is connected to the output terminal of the operational amplifier via a second resistor, the other input terminal of the operational amplifier is connected to the output terminal of the common mode voltage adjustment circuit via a third resistor, and the other input terminal is grounded via a fourth resistor, and the output terminal of the operational amplifier can be connected to the input terminal of the common mode voltage adjustment circuit and the input terminal of the analog-to-digital converter.

[0015] According to at least one embodiment of the present disclosure, the output signal of the DC removal amplifier is converted into a digital signal by the analog-to-digital converter controlled by an asynchronous clock, wherein the battery cell is detected for voltage, current or temperature in the idle time between two adjacent sampling of the analog-to-digital converter.

[0016] According to another aspect of the present disclosure, a battery management system is provided, comprising the battery impedance measurement device according to any one of the above. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings illustrate exemplary embodiments of the present disclosure and together with the general description of the disclosure given above, and the detailed description of the embodiments below, serve to explain the principles of the present disclosure. In which:

[0018] Figure 1 A schematic diagram of a battery impedance measurement device according to one embodiment of the present disclosure is shown.

[0019] Figure 2 A schematic diagram of a battery impedance measurement device according to one embodiment of the present disclosure is shown.

[0020] Figure 3 A schematic diagram of a voltage signal output by a level converter is shown.

[0021] Figure 4 A schematic diagram of a voltage signal output by a level converter is shown.Figure 3 Voltage schematic diagram of the voltage signal directly amplified.

[0022] Figure 5 Voltage schematic diagram of the amplified voltage after removing the DC component in the converted voltage output by the level converter.

[0023] Figure 6 Schematic diagram of the DC removal amplifier according to a specific embodiment of the present application.

[0024] Figure 7 Schematic diagram of the DC removal circuit in the form of a single op-amp subtractor circuit.

[0025] Figure 8 Idle time between two samplings of the analog-to-digital converter when detecting low frequency impedance.

[0026] Figure 9 Schematic diagram of the battery impedance measurement device according to one embodiment of the present disclosure. DETAILED DESCRIPTION

[0027] The present disclosure will be described in further detail below with reference to the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the related content, and not to limit the present disclosure. In addition, it should be noted that only parts related to the present disclosure are shown in the drawings for ease of description.

[0028] It should be noted that the embodiments and features in the embodiments of the present disclosure can be combined with each other without conflict. The technical solutions of the present disclosure will be described in detail below with reference to the drawings and in combination with the embodiments.

[0029] Unless otherwise specified, the exemplary embodiments / instances shown will be understood as providing exemplary features of various details that can implement the technical concepts of the present disclosure in practice. Therefore, unless otherwise specified, the features of various embodiments / instances can be additionally combined, separated, interchanged and / or rearranged without departing from the technical concepts of the present disclosure.

[0030] According to one embodiment of the present application, a battery impedance measurement device is provided for measuring the impedance of battery cells of a battery pack, wherein the battery pack is formed by N battery cells in series, where N≥2, the battery impedance measurement device comprising: N pulse excitation switches, N series resistors, and an impedance acquisition circuit. The N pulse excitation switches are controlled to turn on and off by a pulse excitation signal, and are capable of generating a pulse excitation current as a current excitation of the battery cells. The N series resistors form N series circuits one-to-one corresponding to the N pulse excitation switches, and the two ends of the N series circuits are connected one-to-one to the positive and negative output terminals of the N battery cells. The impedance acquisition circuit is capable of being connected to the positive and negative terminals of each battery cell respectively, for acquiring a voltage response signal of the corresponding battery cell when the N battery cells are respectively current excited.

[0031] Figure 1 A schematic diagram of a battery impedance measurement device according to one embodiment of the present disclosure is shown.

[0032] As shown in Figure 1 , the battery impedance measurement device is used to measure the impedance of each battery in a battery pack. The battery pack 100 can include N battery cells, where N≥2. Figure 1 As shown in Figure 1 , the motor M can be used as a load, and the battery pack 100 can supply power to the motor M to control the rotation of the motor M. In the case of supplying power to the motor M, the battery pack 100 is discharged. In the case of charging the battery pack 100, a charging power source is connected across the two ends of the battery pack 100.

[0033] The battery impedance is of great significance for understanding the state of the battery, evaluating the performance, fault diagnosis and prevention, etc. Therefore, in the process of battery pack management, it is necessary to measure the battery impedance of each battery cell.

[0034] In order to measure the battery impedance of each battery cell, an excitation signal is applied to the battery cell through an excitation circuit. In the related art, the battery impedance of each battery cell is measured by driving the switch of each battery cell with a cosine (sine) form excitation signal generated by a cosine (sine) generator. In the case of measuring other battery cells, the excitation circuit and the measurement circuit generating the excitation signal are switched to other battery cells. In order to achieve excitation, hardware such as a cosine (sine) generator and a Sigma-Delta modulator, etc. brings various problems such as high cost.

[0035] As shown in Figure 1As shown, the battery impedance measurement device can include an impedance acquisition circuit 300, which can be in the form of a chip or other suitable form. The impedance acquisition circuit 300 is used to acquire the voltage response signal of each battery cell and provide the voltage response signal to the microprocessor 400. The microprocessor 400 can obtain the battery impedance of each battery cell according to the voltage response signal of the impedance acquisition circuit 300.

[0036] First, in the technical solution of the present disclosure, an excitation control circuit is included. The excitation control circuit can include a pulse excitation switch. The pulse excitation switch can receive a pulse excitation signal. The conduction and disconnection of the pulse excitation switch are controlled by the pulse excitation signal, thereby exciting the corresponding battery cell. For example, a switch in the form of a MOS transistor. As shown, Figure 1 As shown, N pulse excitation switches 511, 512, …, 51n can be included. The N pulse excitation switches one-to-one correspondingly excite the N battery cells. N series resistors 531, 532, …, 53n can also be included. The N series resistors form N series circuits one-to-one corresponding to the N pulse excitation switches. The two ends of the N series circuits are connected one-to-one corresponding to the positive output end and the negative output end of the N battery cells. For example, when the first battery cell 101 is excited, the pulse excitation switch 511 is controlled to be turned on and off, and other battery cells are not excited. In addition, the N pulse excitation switches 511, 512, …, 51n can be respectively applied with pulse excitation signals through N switches 521, 522, …, 52n. For example, when the first battery cell 101 is excited, the switch 521 is turned on to apply the pulse excitation signal to the pulse excitation switch 511.

[0037] The applied pulse excitation signal can come from the microprocessor 400, and the pulse excitation signal can be generated by the microprocessor. The pulse excitation signal can also come from an independent clock divider. Details of these will be described below.

[0038] As shown, Figure 1 As shown, the battery impedance measurement device of the present application also includes an equalization circuit. As the battery pack is used, the performance of each battery cell can become inconsistent, which can cause imbalance. Taking charging as an example, some batteries can have been fully charged, while some batteries can still not be fully charged, or some batteries can have been overcharged. The same is true for the discharging process. Due to the inconsistency of each single battery, necessary equalization measures are required during charging and discharging to ensure safety and stability.

[0039] Figure 1An equalization circuit 200 is shown. The equalization circuit can be integrated in a chip, or can be integrated in a chip together with the impedance acquisition circuit 300 and the microprocessor 400. The equalization circuit 200 comprises N control switches 211, 212, …, 21n, a first end of each of the N control switches is connected to a positive terminal of a corresponding battery cell via an equalization resistor 241, 242, …, 24n, respectively, and a second end of each of the N control switches is connected to a negative terminal of the corresponding battery cell. For example Figure 1 As shown, a first end of the first control switch 211 is connected to a positive terminal of the first battery cell 101 via the first equalization resistor 241, and a second end of the first control switch 211 is connected to a negative terminal of the first battery cell 101; a first end of the second control switch 212 is connected to a positive terminal of the second battery cell 102 via the second equalization resistor 242, and a second end of the second control switch 212 is connected to a negative terminal of the second battery cell 102; a first end of the nth control switch 21n is connected to a positive terminal of the nth battery cell 10n via the nth equalization resistor 24n, and a second end of the nth control switch 21n is connected to a negative terminal of the nth battery cell 10n. N first resistors 231, 232, …, 23n are connected between the negative terminals of the N battery cells and an output, respectively, wherein a first resistor 23n+1 is connected between the positive terminal of the nth battery cell 10n and the output. Second resistors 221, 222, …, 22n are connected between the output and control terminals of the corresponding control switches, respectively. The ith control switch is controlled such that when a current flowing from the positive terminal of the ith battery cell to the positive terminal of the (i-1)th battery cell is greater than a current threshold, a voltage generated based on the ith first resistor causes the ith control switch to be turned on, so that the current flows through the ith control switch in order to perform current equalization on the ith battery cell, wherein 1

[0040] When the control switch is an NMOS transistor, the first end of the control switch is a drain, the second end of the control switch is a source, and the control terminal of the control switch is a gate. When the control switch is a triode, the first end of the control switch is a collector, the second end of the control switch is an emitter, and the control terminal of the control switch is a base. In Figure 1 A control switch in the form of a triode is shown.

[0041] The following will be described with the content of the second battery cell in Section 2 as an example and with the control switch being a triode (the control switch 212).

[0042] The collector of the transistor is connected to the positive terminal of the second battery cell 102 (the negative terminal of the third battery cell) through the equalization resistor 242, and the emitter of the transistor is connected to the negative terminal of the second battery cell 102 (the positive terminal of the first battery cell 101). The base of the transistor is connected to the second resistor 222, and the first resistor 232 is connected between the emitter of the transistor and the second resistor 222. In this way, when the battery is unbalanced, the voltage formed by the resistors 222 and 232 constitutes the voltage between the base and the emitter of the transistor, and when the voltage is greater than the threshold turn-on voltage, the transistor will be turned on, at which time an equalization current will flow through the transistor from the resistor 242, thereby implementing equalization for the battery 102. When no current flows, the transistor is turned off, at which time no equalization control is implemented.

[0043] In addition, the equalization circuit 200 can further include filter capacitors 251, 252,..., 25n. Each filter capacitor is connected between the positive terminal output and the negative terminal output of each battery cell. For example, the first filter capacitor 251 is connected between the positive terminal output and the negative terminal output of the first battery cell 101; the second filter capacitor 252 is connected between the positive terminal output and the negative terminal output of the second battery cell 102;..., and the nth filter capacitor 25n is connected between the positive terminal output and the negative terminal output of the nth battery cell 10n.

[0044] As shown in Figure 2 The impedance acquisition circuit 300 can include a multiplexing circuit 310 and an impedance measurement circuit 320. The multiplexing circuit 310 can include a multiplexing switch, and by switching the switch, the output of the positive terminal and the output of the negative terminal of each battery cell are respectively connected to the impedance measurement circuit 320. For example, as shown in Figure 2 , the positive terminal and the negative terminal of the second battery cell 102 are connected to the impedance measurement circuit 320. When measuring other battery cells, the output of the positive terminal and the output of the negative terminal of the other battery cells can be connected to the impedance measurement circuit 320 through the multiplexing circuit 310.

[0045] The impedance measurement circuit 320 can include a level shifter 321, a DC removal circuit 322, a programmable gain amplifier (PGA) 323, an analog-to-digital converter 324, a successive approximation register (SAR) logic 325, and a digital-to-analog converter 326. Among them, the DC removal circuit 322, the programmable gain amplifier (PGA) 323, the analog-to-digital converter 324, and the successive approximation register (SAR) logic 325 constitute a DC removal amplifier.

[0046] As shown in Figure 2As shown, level converter 321 is used to receive the positive and negative outputs from each battery cell. Level converter 321 is used to convert the voltage between the received positive and negative outputs of the battery cells to a voltage within a desired range. The converted voltage from level converter 321 is provided to DC-DC circuit 322.

[0047] Figure 3 The voltage signal output by the level converter 321 is shown. As an example, this voltage signal typically consists of a small, weak voltage signal superimposed on a DC voltage; this weak voltage signal is the effective signal for measuring battery impedance. For example, a voltage signal with an amplitude of less than 1mV is superimposed on a 2.5V DC voltage. Those skilled in the art will understand that if based on... Figure 3 The voltage signal shown, after being quantized by an analog-to-digital converter and converted into a digital signal, cannot be demodulated to obtain an accurate value of the battery impedance. Furthermore, if... Figure 3 The voltage signal shown is directly amplified because it contains a DC component (DC voltage). Even with a magnification factor of 2, the output signal will saturate. Once the signal saturates, the output signal will become a straight line. At this point, the effective signal (weak voltage signal) superimposed on the DC voltage will be lost. Figure 4 It shows the Figure 3 The diagram illustrates a voltage signal that has been directly amplified. This voltage signal is saturated after amplification, meaning that effective information has clearly been lost.

[0048] Therefore, in the technical solution of this application, the DC component in the converted voltage output by the level converter 321 is removed, and only the effective signal is amplified. The DC component is not amplified, thus ensuring that the amplified signal does not saturate. Figure 5 The diagram illustrates a voltage amplification process following the removal of the DC component from the converted voltage output by the level converter 321, according to an embodiment of this disclosure. By amplifying the effective signal after removing the DC component and then quantizing it via an analog-to-digital converter, the resulting impedance detection result will be more accurate.

[0049] exist Figure 6 The figure shows a schematic diagram of a DC-DC de-amplifier according to a specific embodiment of this application. As described above, the DC-DC de-amplifier includes a DC-DC de-amplifier circuit 322, a programmable gain amplifier 323, a digital-to-analog converter 326, and a successive approximation controller 325. The DC-DC de-amplifier circuit 322 can be an amplifier circuit composed of three operational amplifiers. As shown, the amplifier circuit can include a first-stage differential amplifier and a second-stage gain amplifier. The first-stage differential amplifier includes a first operational amplifier 3221 and a second operational amplifier 3222, and the second-stage gain amplifier is a third operational amplifier 3223.

[0050] The positive input terminal of the first operational amplifier 3221 is connected to the voltage signal output by the level shifter 321, and the negative input terminal of the first operational amplifier 3221 is connected to the output terminal of the first operational amplifier 3221 via a first resistor R1. The positive input terminal of the second operational amplifier 3222 is connected to the voltage signal output by the level shifter 321, and the negative input terminal of the second operational amplifier 3222 is connected to the output terminal of the second operational amplifier 3222 via a second resistor R2. The resistance values of the first resistor and the second resistor are generally equal. The negative input terminals of the first operational amplifier 3221 and the second operational amplifier 3222 can be connected via a third resistor R3 and a fourth resistor R4. The third resistor R3 and the fourth resistor R4 can also be one resistor. The output terminal of the first operational amplifier 3221 is connected to the positive input terminal of the third operational amplifier 3223 via a fifth resistor R5, and the output terminal of the second operational amplifier 3222 is connected to the negative input terminal of the third operational amplifier 3223 via a sixth resistor R6. According to the amplification circuit of the present application, common-mode signals can be effectively suppressed, and the signal-to-noise ratio of the signal can be improved.

[0051] In the process of amplifying the voltage signal output by the level shifter 321 by the amplification circuit, it is necessary to consider how to remove the direct current component. Therefore, the utility model person of the present disclosure has made careful research and found that the adjustable common-mode voltage (Vcm) can be used as the input of the amplification circuit. In the present application, the common-mode voltage adjustment circuit can include a programmable gain amplifier 323, a successive approximation controller 325, and a digital-to-analog converter 326. Specifically, the output of the third operational amplifier 3223 is used as the input of the programmable gain amplifier 323, the output of the programmable gain amplifier 323 is used as the input of the successive approximation controller 325, the output of the successive approximation controller 325 is used as the input of the digital-to-analog converter 326, and the output of the digital-to-analog converter 326 is connected to the positive input terminal of the second operational amplifier 3222 of the amplification circuit. In this way, the search for the direct current component is realized by the programmable gain amplifier 323, the successive approximation controller 325, and the digital-to-analog converter 326. The programmable gain amplifier 323 can also be an open-loop comparator. The digital-to-analog converter 326 can also be a resistor divider network. The closeness of the finally adjusted common-mode voltage to the actual direct current component depends on the resolution of the digital-to-analog converter 326. In addition, the programmable gain amplifier 323 and the successive approximation controller 325 in the common-mode voltage adjustment circuit can be multiplexed with the analog-to-digital converter 324, i.e., they can be used as the analog-to-digital converter 324. However, the number of bits of the successive approximation controller needs to be adjusted during use. As another technical solution of the present application, a direct current removal circuit 322, a programmable gain amplifier 323, an analog-to-digital converter 324, and a logic circuit in a microprocessor 400 can constitute a direct current removal loop. Its effect is the same as that of the common-mode voltage adjustment circuit. Figure 6The working principle of the DC-DC de-circuit formed by the DC-DC de-circuit 322, the programmable gain amplifier 323, the successive approximation controller 325, and the digital-to-analog converter 326 is the same.

[0052] According to further embodiments of this application, the following can be employed: Figure 7 The DC-DC decoupling circuit 322 is shown. In Figure 7 In this embodiment, the DC removal circuit 322 is in the form of a single operational amplifier subtractor circuit. The DC removal circuit 322 may include an operational amplifier A1. One input terminal of operational amplifier A1 is connected to the output terminal of level converter 321 via a first resistor R1, and another input terminal of operational amplifier A1 is connected to its output terminal via a second resistor. The other input terminal of operational amplifier A1 is connected to the output terminal of digital-to-analog converter 326 via a third resistor R3, and this other input terminal is grounded via a fourth resistor R4. The resistance of the first resistor R1 is equal to the resistance of the third resistor R3, and the resistance of the second resistor R2 is equal to the resistance of the fourth resistor R4. Thus, the output of operational amplifier A1 will be equal to the ratio of the second resistor to the first resistor multiplied by the difference between the voltage at one input terminal and the voltage at the other input terminal. This achieves the purpose of removing the DC component from the voltage response signal. It can be understood that the DC component can be found by the successive approximation controller 325 and the digital-to-analog converter 326, and the DC component can be used as an input to operational amplifier A1. During impedance detection, the feedback loop formed by the successive approximation controller 325 and the digital-to-analog converter 326 needs to be disconnected, while maintaining the output signal of the digital-to-analog converter 326.

[0053] In various embodiments of this application, the DC removal operation needs to be completed before impedance detection begins. The DC component is first obtained, and then removed during the detection process when impedance detection begins. For example, the DC component corresponding to the output signal of the digital-to-analog converter 326 can be used as an input to the DC removal circuit. If the detection frequency is changed, the DC removal operation is also performed first.

[0054] In the present application, the analog-to-digital converter 324 can be a SAR ADC. In a low-speed case, the time after each conversion is the idle time for impedance detection, during which other state detection of the battery can be performed. According to the technical solution of the present disclosure, impedance detection needs to be performed at different frequencies, which means that the corresponding battery unit needs to be excited by an excitation signal of different frequencies. The higher the frequency of the excitation signal, the higher the sampling frequency of the corresponding analog-to-digital converter. In this paper, an asynchronous clock controlled SAR ADC is used to quantize the impedance detection signal. The conversion speed of the asynchronous SAR ADC is determined by its internal asynchronous comparison loop, and is independent of the control clock of the SAR ADC. Therefore, the time from sampling to obtaining the digital output of the ADC is fixed. When detecting the low-frequency impedance of the battery, the sampling time of the ADC is large, which means that after the asynchronous completion of the ADC quantization output, the remaining idle time before the next sampling is large, and other ADCs (not shown) can be used to monitor the voltage, current or temperature of the same battery unit. Figure 8 The idle time between two samplings of the ADC during low-frequency impedance detection is shown.

[0055] During detection, a current excitation is applied to the battery unit, and the impedance of the battery unit generates a voltage. The impedance value of each battery unit is then inferred by measuring the voltage value. Compared with the normal working state of the battery unit, a current excitation with a value of VDD / Res (Res is the resistance value of the resistor 531 / 532 / 53n) is equivalent to being added to the battery unit. When the switch is off, compared with the normal working state of the battery, a current excitation with a value of 0 is equivalent to being added to the battery unit. The switch is periodically switched between the on and off states under the control of the microcontroller or the clock divider. Compared with the normal working state of the battery, a pulsed excitation current is equivalent to being added to the battery as an excitation signal. The impedance collection work is also synchronized with the pulsed excitation signal of the switch.

[0056] In the present application, the sampling frequency of the analog-to-digital converter needs to be much higher than the frequency of the excitation signal, for example, it can be 50 times higher than the frequency of the excitation signal. In addition, a digital filter can be used to downsample and denoise the output of the analog-to-digital converter.

[0057] The present application proposes to detect the battery impedance when the battery is in the working mode (for example, the motor of the electric vehicle is in the running state). The detection of the battery impedance will inevitably be disturbed by the load voltage, so on the basis of detecting the absolute value of the battery impedance, the change rate of the battery impedance can be used as a variable for battery safety monitoring to avoid false triggering due to load disturbance.

[0058] In the above embodiment, the pulse excitation signal can be generated by a microprocessor. Figure 9 In the above embodiment, the pulse excitation signal can be generated by a clock divider 600. The pulse excitation signal generated by the clock divider 600 is provided to the pulse excitation switch 500. Meanwhile, the pulse excitation signal is also provided to the analog-to-digital converter 324 and the microprocessor 400. As described above, the higher the frequency of the excitation signal, the higher the sampling frequency of the analog-to-digital converter. Therefore, the analog-to-digital converter 324 can adjust the sampling frequency of the analog-to-digital converter according to the frequency of the pulse excitation signal. The microprocessor 400 can calculate and demodulate the battery impedance according to the frequency of the pulse excitation signal.

[0059] In the technical solution of the present disclosure, the pulse excitation current can be generated without complex circuit structure, only by dividing the clock signal through the clock divider or by providing the clock signal through the microprocessor, to generate pulse excitation signals with different frequencies, so as to achieve the purpose of real-time detection of impedance. The impedance acquisition circuit provided by the present disclosure is beneficial to circuit design and implementation, and reduces the corresponding production and manufacturing costs. The anti-saturation DC removal amplification circuit only amplifies the useful signal and removes the DC component. The amplified signal will not be saturated, and after the impedance signal is amplified and then quantized by the ADC, a more accurate impedance detection result can be obtained, and the impedance signal distortion is prevented.

[0060] According to a further embodiment of the present application, a battery management system is also provided. The battery management system can include the battery impedance measurement device as described above.

[0061] In the description of the present specification, the description of the terms "one embodiment / way", "some embodiments / ways", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in connection with the embodiment / way or example are included in at least one embodiment / way or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment / way or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments / ways or examples. In addition, the person skilled in the art can combine and combine the different embodiments / ways or examples described in the present specification and the features of the different embodiments / ways or examples, without contradiction.

[0062] In addition, the terms "first", "second", etc. are used only for the purpose of description, and should not be understood as indicating or implying relative importance or a specific number of the technical features indicated. Thus, the features defined with "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise explicitly and specifically limited.

[0063] Those skilled in the art will understand that the above-mentioned embodiments are only for the purpose of clearly illustrating the present disclosure, and are not intended to limit the scope of the present disclosure. Other changes or modifications can be made on the basis of the above disclosure, and these changes or modifications are still within the scope of the present disclosure.

Claims

1. A battery impedance measurement device, characterized by, The battery impedance measuring device is used for measuring the impedance of battery cells of a battery pack, wherein the battery pack is formed by N battery cells in series, wherein N≥2, and the battery impedance measuring device comprises: N pulse excitation switches controlled on and off by a pulse excitation signal and capable of generating a pulse excitation current as a current excitation of the battery cells; N series resistors forming N series circuits one by one with the N pulse excitation switches, two ends of the N series circuits being connected to positive and negative output terminals of the N battery cells one by one; An impedance acquisition circuit capable of being connected to positive and negative terminals of each battery cell respectively, for acquiring a voltage response signal of a corresponding battery cell when the N battery cells are respectively current excited.

2. The battery impedance measurement device of claim 1, wherein, When the pulse excitation switches are turned on, the amplitude of the pulse excitation current is the ratio of the voltage of the corresponding battery cell to the resistance value of the series resistor.

3. The battery impedance measurement device of claim 2, wherein, The pulse excitation signal is an excitation signal with multiple excitation frequencies, so as to detect the voltage response signals of the battery cells at different excitation frequencies.

4. The battery impedance measurement device of claim 3, wherein, The impedance acquisition circuit comprises a level converter, a DC removal amplifier and an analog-to-digital converter, the level converter is used for the voltage response signal between the positive and negative output terminals of each battery cell, the output signal of the level converter is used as the input signal of the DC removal amplifier, the DC removal amplifier is used for removing the DC component in the input signal, and the analog-to-digital converter is used for converting the output signal of the DC removal amplifier into a digital signal.

5. The battery impedance measuring device of claim 4, wherein Optionally, the battery impedance measuring device further comprises a microprocessor, and the microprocessor is used for determining the battery impedance of each battery cell according to the digital signal, Optionally, the pulse excitation signal is a signal obtained by dividing a clock signal by a clock divider, Optionally, the DC removal amplifier comprises a DC removal circuit and a common-mode voltage adjusting circuit, one input end of the DC removal circuit receives the output signal of the level converter, the common-mode voltage adjusting circuit receives the output signal of the DC removal circuit, and the output of the common-mode voltage adjusting circuit is the DC component, and the DC removal circuit is used for removing the DC component from the output signal of the level converter.

6. The battery impedance measurement device of claim 5, wherein, The common-mode voltage adjusting circuit comprises a comparator, a successive approximation controller and a digital-to-analog converter, the comparator receives the output signal of the DC removal circuit, the successive approximation controller receives the output signal of the comparator, the digital-to-analog converter receives the output signal of the successive approximation controller, and the output signal of the digital-to-analog converter is provided to the other input end of the DC removal circuit, and the DC component in the output signal of the level converter is found through the comparator, the successive approximation controller and the digital-to-analog converter.

7. The battery impedance measurement device of claim 5, wherein, The DC removal circuit comprises a first differential amplifier and a second gain amplifier, the first differential amplifier comprises a first operational amplifier and a second operational amplifier, the negative input terminals of the first operational amplifier and the second operational amplifier are connected through a resistor, the positive input terminal of the first operational amplifier receives the output signal of the level converter, the positive input terminal of the second operational amplifier receives the output signal of the common-mode voltage adjusting circuit, the output terminals of the first operational amplifier and the second operational amplifier are connected to the positive input terminal and the negative input terminal of the second gain amplifier respectively, and the output terminal of the second gain amplifier is connected to the common-mode voltage adjusting circuit.

8. The battery impedance measurement device of claim 5, wherein, The DC removal circuit comprises an operational amplifier, one input terminal of the operational amplifier is connected to the output terminal of the level converter via a first resistor, one input terminal of the operational amplifier is connected to the output terminal of the operational amplifier via a second resistor, the other input terminal of the operational amplifier is connected to the output terminal of the common-mode voltage adjusting circuit via a third resistor, and the other input terminal is grounded via a fourth resistor, and the output terminal of the operational amplifier can be connected to the input terminal of the common-mode voltage adjusting circuit and the input terminal of the analog-to-digital converter.

9. The battery impedance measurement device of claim 4, wherein, The output signal of the DC removal amplifier is converted into a digital signal by the analog-to-digital converter controlled by an asynchronous clock, wherein, in the idle time between two adjacent sampling of the analog-to-digital converter, the voltage, current or temperature of the battery cell is detected.

10. A battery management system, characterized by, A battery impedance measurement device as claimed in any one of claims 1 to 9.

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