Power path management circuit and electronic equipment

Abstract

The utility model provides a power path management circuit and an electronic device, and relates to the technical field of circuits, and the power path management circuit comprises a processing unit and a power path management unit. Through a first level signal output by the general input / output interface of the processing unit, the first management unit establishes a connection relationship between the external connector and the power supply system, the second management unit disconnects the connection relationship between the battery and the power supply system, and an external power supply accessed through the external connector supplies power to the power supply system of the electronic equipment. When the external connector of the electronic equipment is connected with the external power supply, the effects of simultaneously using the electronic equipment and charging the battery can be achieved, and the use experience of a user can be improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to circuit technical field especially relates to a power path management circuit and electronic equipment. BACKGROUND

[0002] The power supply source of electronic equipment when working usually has two kinds, one is through the battery of electronic equipment self -supporting power supply, another is through external power supply. The mode that electronic equipment connects external power supply mainly includes wired and wireless. Among them, electronic equipment can be configured with universal serial bus (Universal Serial Bus, USB) interface, DC JACK interface etc. wired interface, to be connected with external power supply through data line.

[0003] As Figure 1 The prior art, electronic equipment is configured with external connector, external connector is used for connecting with external power supply, and is connected with battery through battery charge and discharge management unit, and the battery is connected with the power system of electronic equipment.

[0004] However, when the external connector of electronic equipment is connected with external power supply, the electronic equipment cannot be used simultaneously and the battery is charged, and only two choices between charging the battery and using the electronic equipment, it is more inconvenient, and affects the use experience of the user. UTILITY MODEL CONTENTS

[0005] The utility model provides a power path management circuit and electronic equipment to solve the defects in the prior art.

[0006] The utility model provides a power path management circuit, which comprises a processing unit and a power path management unit, the power path management unit comprising a first management unit and a second management unit.

[0007] The processing unit comprises an analog-to-digital conversion interface and a general input-output interface.

[0008] The analog-to-digital conversion interface is connected with the external connector of electronic equipment, the external connector is used to access external power supply, and is connected with the battery of the electronic equipment through the battery charge and discharge management unit, and the battery charge and discharge management unit is configured to charge and discharge the battery.

[0009] The processing unit is configured to determine that the input voltage of the analog-to-digital conversion interface is higher than or equal to the target voltage, and output a first level signal from the general input-output interface.

[0010] The first management unit is connected with the general input and output interface, the external connector and a power system of the electronic device respectively; the first management unit is configured to determine that the general input and output interface outputs the first level signal, and establish a connection relationship between the external connector and the power system;

[0011] The second management unit is connected with the general input and output interface, the battery and the power system of the electronic device respectively; the second management unit is configured to determine that the general input and output interface outputs the first level signal, and disconnect the connection relationship between the battery and the power system.

[0012] According to the power path management circuit, the processing unit is further configured to determine that the input voltage of the analog-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal;

[0013] The first management unit is further configured to determine that the general input and output interface outputs the second level signal, and disconnect the connection relationship between the external connector and the power system;

[0014] The second management unit is further configured to determine that the general input and output interface outputs the second level signal, and establish the connection relationship between the battery and the power system.

[0015] According to the power path management circuit, the first management unit comprises a first switch unit and a second switch unit connected;

[0016] The first switch unit is connected with the general input and output interface;

[0017] The second switch unit is connected with the external connector and the power system respectively;

[0018] The first switch unit and the second switch unit are both configured to be turned on when the general input and output interface outputs the first level signal.

[0019] According to the power path management circuit, the first switch unit comprises a first field effect tube;

[0020] The drain of the first field effect tube is connected with the second switch unit;

[0021] The gate of the first field effect tube is connected with the general input and output interface;

[0022] The source of the first field effect tube is grounded.

[0023] The utility model provides a kind of power path management circuit, and the second switch unit includes second field effect tube and third field effect tube;

[0024] The source of the second field effect tube is connected with the source of the third field effect tube;

[0025] The gate of the second field effect tube is connected with the gate of the third field effect tube;

[0026] The drain of the second field effect tube is connected with the external connector;

[0027] The drain of the third field effect tube is connected with the power system.

[0028] The utility model provides a kind of power path management circuit, and the second switch unit further includes pull-up resistance;

[0029] The pull-up resistance is connected between the gate and the source of the second field effect tube.

[0030] The utility model provides a kind of power path management circuit, and the second management unit includes connected fourth switch unit and fifth switch unit;

[0031] The fourth switch unit is connected with the general input and output interface and the battery respectively;

[0032] The fifth switch unit is connected with the battery and the power system respectively;

[0033] The fourth switch unit is configured to be turned on when the general input and output interface outputs the first level signal, and the fifth switch unit is configured to be turned off when the general input and output interface outputs the first level signal.

[0034] The utility model provides a kind of power path management circuit, and the fourth switch unit includes fourth field effect tube and triode;

[0035] The gate of the fourth field effect tube is connected with the general input and output interface;

[0036] The drain of the fourth field effect tube is connected with the battery and the base of the triode respectively;

[0037] The emitter and the collector of the triode are connected with the fifth switch unit;

[0038] The emitter of the triode is also connected with the battery.

[0039] The utility model provides a kind of power path management circuit, and the fifth switch unit includes fifth field effect tube and sixth field effect tube;

[0040] a source of the fifth field effect tube is connected with a source of the sixth field effect tube;

[0041] a gate of the fifth field effect tube is connected with a gate of the sixth field effect tube, and the gates are connected with the third switch unit;

[0042] a drain of the fifth field effect tube is connected with the battery;

[0043] a drain of the sixth field effect tube is connected with the power supply system.

[0044] The utility model also provides an electronic equipment, include: power supply system, battery charge and discharge management unit, battery, external connector and above-mentioned power supply path management circuit.

[0045] The utility model provides a power supply path management circuit and electronic equipment, power supply path management circuit includes processing unit and power supply path management unit. Through the first level signal that processing unit's general input and output interface output, make first management unit establish the connection relation between external connector and power supply system, make second management unit disconnect the connection relation between battery and power supply system, through the external power supply that external connector access is the power supply system power supply of electronic equipment, charges for battery simultaneously, can reach the effect that uses electronic equipment and charges for battery simultaneously when the external power supply of electronic equipment's external connector is connected, can promote the use experience of user. BRIEF DESCRIPTION OF DRAWINGS

[0046] In order to more clearly illustrate the technical scheme in the utility model or related technical scheme, the following will briefly introduce the drawing needed to be used in embodiment or related technical description, obviously, the drawing in the following description is some embodiments of the utility model, for ordinary skilled person in the art, under the premise of not paying creative labor, still can obtain other drawings according to these drawings.

[0047] Figure 1 It is the structural schematic diagram of prior power supply path management circuit.

[0048] Figure 2 It is one of the connection structural schematic diagram of power supply path management circuit in electronic equipment provided by the utility model.

[0049] Figure 3 It is the second connection structural schematic diagram of power supply path management circuit in electronic equipment provided by the utility model.

[0050] Figure 4 It is the external connection relation schematic diagram of wired connector J1 in power supply path management circuit provided by the utility model.

[0051] Figure 5 is the external connection relation schematic diagram of the wireless connector J2 in the power path management circuit.

[0052] Figure 6 is the external connection relation schematic diagram of the micro control unit in the power path management circuit.

[0053] Figure 7 is the external connection relation schematic diagram of the battery charging chip in the power path management circuit.

[0054] Figure 8 is the structure schematic diagram of the first voltage dividing circuit in the power path management circuit.

[0055] Figure 9 is the structure schematic diagram of the second voltage dividing circuit in the power path management circuit.

[0056] Figure 10 is the structure schematic diagram of the first management unit in the power path management circuit.

[0057] Figure 11 is the structure schematic diagram of the first management unit in the power path management circuit.

[0058] Figure 12 is the structure schematic diagram of the second management unit in the power path management circuit.

[0059] Figure 13 is the structure schematic diagram of the second management unit in the power path management circuit. DETAILED DESCRIPTION

[0060] In order to make the purpose, technical scheme and advantages of the utility model clearer, the technical scheme in the utility model will be described clearly and completely in combination with the drawings in the utility model, obviously, the described embodiment is a part of the embodiment of the utility model, rather than all the embodiment. Based on the embodiment in the utility model, all other embodiments obtained by the ordinary skill in the art without making creative labor belong to the scope of the utility model protection.

[0061] Figure 2 is the structure schematic diagram of the power path management circuit provided in the embodiment of the utility model, such as Figure 2As shown, the power path management circuit includes a processing unit 111 and a power path management unit 112. The processing unit 111 includes an analog-to-digital converter (ADC) interface and a general-purpose input / output (GPIO) interface.

[0062] The ADC interface of the processing unit 111 is connected with an external connector 113 of the electronic device; the external connector 113 is used to access an external power supply 114, and is connected with a battery 115 of the electronic device through a battery charging and discharging management unit 116. The battery charging and discharging management unit 116 is configured to charge and discharge the battery 115.

[0063] The processing unit 111 is configured to determine that the input voltage of the ADC interface is higher than or equal to a target voltage, and output a first level signal through the GPIO interface.

[0064] The power path management unit 112 is connected with the battery 115, the external connector 113, the GPIO interface, and a power supply system 117 of the electronic device, respectively.

[0065] The power path management unit 112 is configured to connect the external connector 113 and the power supply system 117 when the GPIO interface outputs the first level signal.

[0066] Specifically, the electronic device can include the external connector 113, the battery 115, and the power supply system 117, and the external connector 113 can access the external power supply 114 through a charging circuit board. The external connector 113 can include a wired connector and a wireless connector, and the wired connector can include at least one of a Type-C connector and a DC JACK connector.

[0067] The charging circuit board can include a wired charging circuit board and a wireless charging circuit board, and the wired charging circuit board can be provided with a first connector connected with the wired connector and a second connector accessing the external power supply 114, and the wireless charging circuit board can be provided with a third connector connected with the wireless connector and a fourth connector accessing the external power supply 114. Here, the wired connector and the wireless connector can be used to access the external power supply 114, and the fourth connector can be a wireless charging coil.

[0068] The wired connector and the wireless connector can be connected with the battery 115 to charge the battery 115 through the external power supply 114. The battery 115 can be a three-section lithium battery, and the battery signal VBAT of the battery 115 can be 12.6V after being fully charged by the external power supply 114.

[0069] The electronic device can further include a master system, and the master system and the power supply system are integrated on a mainboard of the electronic device. The power supply system 117 can include a direct current conversion circuit, configured to convert a received voltage signal into a voltage signal required by the master system of the electronic device.

[0070] In the power path management circuit provided in the embodiment of the utility model, the processing unit 111 includes an ADC interface and a GPIO interface, the ADC interface is connected with the external connector 113 of the electronic device, and the input voltage of the ADC interface can be the output voltage of the wired connector or the output voltage of the wireless connector.

[0071] The processing unit 111 can compare the input voltage of the ADC interface with a target voltage, and the output signal of the GPIO interface is a first level signal when the input voltage is higher than or equal to the target voltage. The first level signal can be a high level signal. The processing unit 111 can be built-in with a conventional comparison program to compare the input voltage of the ADC interface with the target voltage. The processing unit 111 can also be built-in with a comparator, the positive input end of the comparator can receive the input voltage, and the negative input end can access the target voltage. The target voltage can be generated by a target power supply, which can be 9V or other values, which are not limited here. It can be understood that the output signal of the GPIO interface is a second level signal by default, that is, a low level signal.

[0072] The power path management unit 112 can be connected with the battery 115, the external connector 113, the GPIO interface and the power supply system 117 of the electronic device respectively.

[0073] When the external connector 113 of the electronic device is not connected with the external power supply 114, the input voltage of the ADC interface is empty, at this time, the battery 115 is connected with the power supply system 117, and the power supply system 117 is powered by the battery 115.

[0074] When the external connector 113 of the electronic device is connected with the external power supply 114, if the input voltage of the ADC interface is higher than or equal to the target voltage, the output signal of the GPIO interface is the first level signal, which can be used as an enable signal of the power path management unit 112, triggering the power path management unit 112 to switch the connection between the battery 115 and the power supply system 117 to the connection between the external connector 113 and the power supply system 117, and the power supply system 117 is powered by the external power supply 114 connected through the external connector 113. At the same time, the battery 115 can be charged by the external power supply 114.

[0075] It can be understood that the power path management unit 112 can include a switching switch, which can be triggered by the first level signal output by the GPIO interface, and switch the connection relationship between the power supply system 117 and the external connector 113 and the battery 115.

[0076] The power path management circuit provided in the embodiment of the utility model, including processing unit and power path management unit. Through the first level signal output by the general input and output interface of processing unit, make power path management unit connect external power supply and power supply system, through the external power supply accessed by external connector, power supply system of electronic equipment, charge battery at the same time, can reach the effect of using electronic equipment and charging battery at the same time when the external connector of electronic equipment is connected with external power supply, can improve the use experience of user.

[0077] On the basis of the above embodiment, the power path management unit 112 can include a first management unit 121 and a second management unit 122.

[0078] As shown in Figure 3 The ADC interface of the processing unit 111 is connected with the external connector 113 of the electronic device; the external connector 113 is used for connecting the external power supply 114 and is connected with the battery 115 of the electronic device;

[0079] The processing unit 111 is configured to determine that the input voltage of the ADC interface is higher than or equal to the target voltage, and output the first level signal by the GPIO interface.

[0080] The first management unit 121 is connected with the GPIO interface, the external connector 113 and the power supply system 117 of the electronic device respectively; the first management unit 121 is configured to determine that the connection relationship between the external connector 113 and the power supply system 117 is established when the first level signal is output by the GPIO interface.

[0081] The second management unit 122 is connected with the GPIO interface, the battery 115 and the power supply system 117 of the electronic device respectively; the second management unit 122 is configured to determine that the connection relationship between the battery 115 and the power supply system 117 is disconnected when the first level signal is output by the GPIO interface.

[0082] Specifically, the first management unit 121 and the second management unit 122 can be switches, the path between the external connector 113 and the power system 117 is controlled by the first management unit 121, and the path between the battery 115 and the power system 117 is controlled by the second management unit 122. When the output signal of the GPIO interface is the first level signal, the path between the external connector 113 and the power system 117 is controlled to be conductive by the first management unit 121, and the path between the battery 115 and the power system 117 is controlled to be disconnected by the second management unit 122.

[0083] The power path management circuit provided in the embodiment of the utility model, including processing unit and power path management unit. Through the first level signal output by the general input and output interface of processing unit, make first management unit establish the connection relation between external connector and power system, make second management unit disconnect the connection relation between battery and power system, through the external power supply accessed by external connector, power supply for power system of electronic equipment, charge for battery at the same time, can reach the effect of using electronic equipment and charging battery at the same time when the external connector of electronic equipment is connected with external power supply, can improve the use experience of user.

[0084] On the basis of the above embodiment, the processing unit is further configured to determine that the input voltage of the analog-to-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal.

[0085] The power path management unit is further configured to connect the battery and the power system when the general input and output interface outputs the second level signal.

[0086] Specifically, when the external connector 113 of the electronic equipment accesses the external power supply 114, the input voltage of the ADC interface is not empty, and when the input voltage is lower than the target voltage, the output signal of the GPIO interface of the processing unit 111 is a second level signal, which can be lower than the first level signal, i.e. the second level signal can be a low level signal.

[0087] The power path management unit can also connect the battery 115 and the power system 117 when the GPIO interface outputs the second level signal. At this time, the power system 117 is powered by the battery 115, and the battery 115 is charged by the external power supply 114.

[0088] On the basis of the above embodiment, the processing unit is further configured to determine that the input voltage of the analog-to-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal.

[0089] The first management unit is further configured to disconnect the connection between the external connector and the power system when the general-purpose input / output interface outputs the second level signal;

[0090] The second management unit is also configured to establish a connection between the battery and the power system when the general-purpose input / output interface outputs the second level signal.

[0091] Specifically, when the output signal of the GPIO interface of the processing unit 111 is a second-level signal, the first management unit 121 controls the path between the external connector 113 and the power system 117 to be disconnected, while the second management unit 122 controls the path between the battery 115 and the power system 117 to be connected. At this time, the power system 117 is powered by the battery 115, and the battery 115 is charged by the external power supply 114.

[0092] Based on the above embodiments, the external connector 113 includes a wired connector J1 and a wireless connector J2, and the ADC interface includes a first analog-to-digital conversion interface ADC1 and a second analog-to-digital conversion interface ADC2.

[0093] The first analog-to-digital converter interface ADC1 is connected to the wireless connector J2;

[0094] The second analog-to-digital converter interface ADC2 is connected to the wired connector J1.

[0095] Specifically, Figure 4 This is a schematic diagram of the external connection relationships of wired connector J1. (See diagram below.) Figure 4 As shown, pin 1 on the wired connector J1 is connected to the constant power supply of the electronic device, which is 3.3V. Pin 4 can transmit the transmit signal X3M_UARTO_TXD to the main control system, and pin 5 can receive the feedback signal X3M_UARTO_RXD transmitted by the main control system. Pin 7 is the data negative signal line (USB_DM) interface, and pin 8 is the data positive signal line (USB_DP) interface. Pins 7 and 8 can be connected to the data negative signal line interface and data positive signal line interface of the battery discharge chip U1 in the battery charge and discharge management unit 116, respectively. Pins 4, 5, 7, and 8 are also grounded through electrostatic discharge protection diodes.

[0096] Pins 6, 9, 10, 16, and 17 are all grounded. Pin 11 is grounded through capacitor C5, pin 12 through capacitor C4, and pin 13 through capacitor C3. The capacitance values ​​of capacitors C3, C4, and C5 can be 100nF, 10uF, and 10uF, respectively.

[0097] Furthermore, pins 11 and 12 are both connected to the wired power signal VBUS provided by an external power supply. VBUS can be a 12V voltage signal or a 5V voltage signal. Pin 12 is connected to the target power signal VDD provided by the target power supply. VDD can be a 3.3V voltage signal. Pin 14 is used to send the first charging indicator signal Charge_LED_1 to the main control system, and pin 15 is used to send the second charging indicator signal Charge_LED_2 to the main control system.

[0098] Figure 5 This is a schematic diagram of the external connections of the wireless connector J2. Figure 5 As shown, pins 1 and 2 on the wireless connector J2 are connected to the wireless power signal "Wireless" provided by an external power supply. "Wireless" can be a 12V voltage signal. Furthermore, pin 1 is grounded through capacitor C26, and pin 2 is grounded through capacitor C27. The capacitance values ​​of capacitors C26 and C27 can be 10uF and 10uF, respectively.

[0099] Pins 3, 4, 9, and 10 on the wireless connector J2 are all grounded. Pin 6 is the serial data interface, used to transmit the serial data signal Simu_I2C_SDA, and pin 7 is the serial clock interface, used to transmit the serial clock signal Simu_I2C_SCL. Pins 6 and 7 can be connected to the serial data interface and serial clock signal of the battery discharge chip U1 in the battery charge / discharge management unit 116, respectively.

[0100] Processing unit 111 may include a microcontroller unit (MCU) U2, the external connections of U2 being as follows: Figure 6 As shown, pin 1 on U2 is connected to the constant power supply of the electronic device, which is 3.3V. Pin 2 is the first analog-to-digital converter interface ADC1, which receives the first input voltage VCC_ADC. This first input voltage VCC_ADC can be determined by the wireless power signal Wireless provided by the external power supply connected to the wireless connector J2. Pin 3 is the second analog-to-digital converter interface ADC2, which receives the second input voltage USB_ADC. This second input voltage USB_ADC can be determined by the wired power signal VBUS provided by the external power supply connected to the wired connector J1. Pin 4 is a GPIO interface that transmits the output signal PWR_SWITCH_EN. Pin 5 is grounded.

[0101] On the basis of the above embodiment, the input voltage of the wired connector J1 is obtained through the output voltage of the first connector on the wired charging circuit board. The input voltage of the second connector on the wired charging circuit board can obtain different output voltages through the first connector according to whether the battery charging chip and the charging adapter match the PD protocol / QC protocol. When the protocols do not match, the output voltage of the first connector and the input voltage of the wired connector are both 5V. When the protocols match, the output voltage of the first connector and the input voltage of the wired connector are both 12V.

[0102] On the basis of the above embodiment, the battery charging and discharging management unit 116 can include a battery charging chip. The external connection relationship of the battery charging chip U1 is as shown in Figure 7 The pins 1, 2, 3, 9, 10, 22, 23, 24, 26, 31, 33 on the battery charging chip U1 are all grounded. The pins 4, 5 are connected to the charging signal VCC_Charge_Input and grounded through the parallel capacitors C6, C7, C8. The pins 4, 5 are also grounded through the resistors R1, R4. The pin 6 is connected between the resistors R1, R4. The pin 7 is connected to the base of the transistor Q1 through the resistor R6, and the emitter of the transistor Q1 is connected to the 3.3V target power supply. The collector of the transistor Q1 is connected to the main control system for transmitting the charging status signal Charge_Status to the main control system, and the collector of the transistor Q1 is also grounded through the resistor R9. Here, the capacitance values of the capacitors C6, C7, C8 can be 22uF, 1uF, and 10nF respectively, and the resistance values of the resistors R1, R4, R6, R9 can be 300KΩ, 100KΩ, 1KΩ, and 10KΩ respectively.

[0103] The pin 8 can receive the charging enable signal Charge_EN of the main control system and can be grounded through the resistor R5. Here, the resistance value of the resistor R5 can be 100KΩ.

[0104] The pin 9 can be grounded through the capacitor C11. The capacitance value of the capacitor C11 can be 1uF. The pins 11, 12 are serial clock interfaces and serial data interfaces respectively. The pins 14, 15 are data negative signal line interfaces and data positive signal line interfaces respectively.

[0105] The pin 16 is a connection end of a battery voltage detection resistor and an internal switch tube of the chip, which can be connected to the battery 115 through the resistors R7, R8 and access to the battery signal VBAT. The pin 17 is a battery voltage feedback end, which can be connected to the battery 115 through the resistor R8 and access to the battery signal VBAT. The resistors R7, R8 are both battery voltage detection resistors, and their resistance values can be 13KΩ and 150KΩ respectively.

[0106] Pin 18 is a battery connection end, connected with the battery 115, accesses the battery signal VBAT, and is grounded through the capacitor C10. The capacitance of the capacitor C10 can be 1uF.

[0107] Pins 19-21 are battery charging current detection positive input ends, which can be connected with the battery 115 through the resistor R2, and access the battery signal VBAT. The resistance of the resistor R2 can be 40mΩ.

[0108] Pins 22-24 are all grounded, and the battery 115 can also be grounded through the capacitor C9. The capacitance of the capacitor C9 can be 22uF.

[0109] On the basis of the above embodiment, the power path management circuit further includes a first voltage dividing circuit and a second voltage dividing circuit;

[0110] The wireless connector J2 is connected with the first analog-digital conversion interface ADC1 through the first voltage dividing circuit;

[0111] The wired connector J1 is connected with the second analog-digital conversion interface ADC2 through the second voltage dividing circuit.

[0112] In the embodiment of the utility model, the introduction of the first voltage dividing circuit and the second voltage dividing circuit can reduce the calculation complexity of the processing unit, and facilitate subsequent comparison with the target voltage.

[0113] On the basis of the above embodiment, as shown in Figure 8 The first voltage dividing circuit includes a first voltage dividing resistor R1835 and a second voltage dividing resistor R1836;

[0114] The wireless connector J2 is connected with the first analog-digital conversion interface ADC1 through the first voltage dividing resistor R1835; and the wireless connector J2 is grounded through the first voltage dividing resistor R1835 and the second voltage dividing resistor R1836.

[0115] Specifically, the Wireless accessed by the wireless connector J2 obtains a first input voltage VCC_ADC through the first voltage dividing resistor R1835, and the resistances of the R1835 and R1836 can be 30KΩ and 10KΩ respectively.

[0116] On the basis of the above embodiment, as shown in Figure 9 The second voltage dividing circuit includes a third voltage dividing resistor R1913 and a fourth voltage dividing resistor R1914;

[0117] The wired connector J1 is connected with the second analog-digital conversion interface ADC2 through the third voltage dividing resistor R1913; and the wired connector J1 is grounded through the third voltage dividing resistor R1913 and the fourth voltage dividing resistor R1914.

[0118] Specifically, the VBUS accessed by the wired connector J1 obtains a second input voltage VBUS_ADC through a third voltage dividing resistor R1913, and the resistance values of the R1913 and R1914 can be 30KΩ and 10KΩ respectively.

[0119] On the basis of the above embodiment, as shown in Figure 10 The first management unit 121 includes a connected first switch unit 1211 and a second switch unit 1212.

[0120] The first switch unit 1211 is connected with the GPIO interface.

[0121] The second switch unit 1212 is connected with the external connector 113 and the power supply system 117 respectively.

[0122] The first switch unit 1211 and the second switch unit 1212 are both configured to be turned on when the GPIO interface outputs a first level signal.

[0123] Specifically, when the GPIO interface of the processing unit 111 outputs a first level signal, the first switch unit 1211 and the second switch unit 1212 are both turned on, and a connection relationship is established between the external connector 113 and the power supply system 117, and the external power supply 114 accessed through the external connector 113 supplies power to the power supply system 117.

[0124] In addition, the first switch unit 1211 and the second switch unit 1212 are also configured to be turned off when the GPIO interface outputs a second level signal, at which time the connection relationship between the external connector 113 and the power supply system 117 is disconnected, and only the battery 115 can supply power to the power supply system 117, and the external power supply 114 charges the battery 115.

[0125] On the basis of the above embodiment, as shown in Figure 11 The first switch unit 1211 includes a first field effect tube Q8, and the drain 3 of the first field effect tube Q8 is connected with the second switch unit 1212.

[0126] The gate 1 of the first field effect tube Q8 is connected with the GPIO interface, and can access the output signal PWR_SWITCH_EN of the GPIO interface through a resistor R42. The gate 1 of the first field effect tube Q8 can also be grounded through a resistor R43. The resistance values of the resistors R42 and R43 can be 1KΩ and 100KΩ respectively. The source 2 of the first field effect tube Q8 is grounded.

[0127] On the basis of the above embodiment, as shown in Figure 11As shown, the second switch unit 1212 includes a second field effect tube Q6 and a third field effect tube Q7, the second field effect tube Q6 and the third field effect tube Q7 are symmetrically arranged, and the source 2 of the second field effect tube Q6 and the source 2 of the third field effect tube Q7 are connected.

[0128] The gate 1 of the second field effect tube Q6 and the gate 1 of the third field effect tube Q7 are both connected with the first switch unit, that is, both connected with the drain 3 of the first field effect tube Q8.

[0129] The drain 3 of the second field effect tube Q6 is connected with an external connector, the Wireless can access the drain 3 of the second field effect tube Q6 after obtaining the charging signal VCC_Charge_Input through the third diode D3, and the VBUS can access the drain 3 of the second field effect tube Q6 after obtaining the charging signal VCC_Charge_Input through the fourth diode D4.

[0130] The drain 3 of the second field effect tube Q6 can also be grounded through the parallel capacitors C20 and C21. The capacitance values of C20 and C21 can be 10uF and 100nF respectively.

[0131] Capacitors C23 can be connected between the gate 1 and the source 2 of the second field effect tube Q6 and between the gate 1 and the source 2 of the third field effect tube Q7, and the capacitance value of C23 can be 100nF.

[0132] The drain 3 of the third field effect tube Q7 is connected with the power system 117 to provide a power signal VCC for the power system 117. The drain 3 of the third field effect tube Q7 can also be grounded through the parallel capacitors C24 and C25, and the capacitance values of C24 and C25 can be 10uF and 100nF respectively.

[0133] When the output signal PWR_SWITCH_EN at the output end of the comparator 11 is a second level signal, the first field effect tube Q8, the second field effect tube Q6 and the third field effect tube Q7 are all not conductive, at this time the path between the external connector 113 and the power system 117 is disconnected.

[0134] When the output signal PWR_SWITCH_EN at the output end of the comparator 11 is a first level signal, the first field effect tube Q8, the second field effect tube Q6 and the third field effect tube Q7 are all conductive, at this time the path between the external connector 113 and the power system 117 is conductive, and the power system 117 is powered by the external power supply 114.

[0135] On the basis of the above embodiment, as Figure 11As shown, the second switch unit 1212 further includes a pull-up resistor R40, which can be connected between the gate 1 and the source 2 of the second field effect transistor Q6. The resistance of R40 can be 100KΩ.

[0136] On the basis of the above embodiment, as shown in Figure 12 The second management unit 122 can include a connected third switch unit 1221 and a fourth switch unit 1222.

[0137] The third switch unit 1221 is connected with the GPIO interface and the battery 115 respectively;

[0138] The fourth switch unit 1222 is connected with the battery 115 and the power system 117 respectively;

[0139] The third switch unit 1221 is configured to be turned on when the GPIO interface outputs the first level signal, and the fourth switch unit 1222 is configured to be turned off when the GPIO interface outputs the first level signal.

[0140] Specifically, when the GPIO interface outputs the first level signal, the third switch unit 1221 is turned on, the fourth switch unit 1222 is turned off, the connection between the battery 115 and the power system 117 is disconnected, and the power system 117 cannot be powered by the battery 115.

[0141] In addition, when the GPIO interface outputs the second level signal, the third switch unit 1221 is turned off, and the fourth switch unit 1222 is turned on, at this time the connection relationship between the battery 115 and the power system 117 is established, the power system 117 can be powered by the battery 115, and the battery 115 can be charged by the external power supply 114.

[0142] On the basis of the above embodiment, as shown in Figure 13 The third switch unit 1221 includes a fourth field effect transistor Q5 and a triode Q4.

[0143] The gate 1 of the fourth field effect transistor Q5 is connected with the output end of the comparator 11, and can be connected with the output signal PWR_SWITCH_EN of the GPIO interface through the resistor R27. The gate 1 of the fourth field effect transistor Q5 can also be grounded through the resistor R30. The resistances of R27 and R30 can be 1KΩ and 100KΩ respectively. The source 2 of the fourth field effect transistor Q5 is grounded.

[0144] The drain 3 of the fourth field effect transistor Q5 is connected with the battery 115 and the base of the triode Q4 respectively, and can be connected with the battery signal VBAT through the resistor R25 and connected with the base of the triode Q4 through the resistor R26. The resistances of R25 and R26 can be 10KΩ and 10KΩ respectively.

[0145] The emitter of the transistor Q4 is connected to the fourth switch unit.

[0146] The emitter of the transistor Q4 is also connected to the battery 115, and the battery signal VBAT is inputted.

[0147] The collector of the transistor Q4 can be grounded through the resistor R28, and the resistance of the resistor R28 can be 100KΩ.

[0148] On the basis of the above embodiment, as shown in Figure 13 The fourth switch unit 1222 includes the fifth field effect transistor Q2 and the sixth field effect transistor Q3.

[0149] The source 2 of the fifth field effect transistor Q2 is connected to the source 2 of the sixth field effect transistor Q3.

[0150] The gate 1 of the fifth field effect transistor Q2 and the gate 1 of the sixth field effect transistor Q3 are both connected to the third switch unit, i.e. the collector of the transistor Q4.

[0151] The drain 3 of the fifth field effect transistor Q2 is connected to the battery 115, and the battery signal VBAT is inputted.

[0152] The drain 3 of the sixth field effect transistor Q3 is connected to the power supply system 117, and the power supply signal VCC is provided for the power supply system 117. The drain 3 of the sixth field effect transistor Q3 can also be grounded through the parallel capacitors C16, C17 and C18, and the capacitances of the capacitors C16, C17 and C18 can be 220uF, 10uF and 100nF respectively.

[0153] When the output signal PWR_SWITCH_EN of the GPIO interface is the second level signal, the fourth field effect transistor Q5 and the transistor Q4 are both not turned on, and the fifth field effect transistor Q2 and the sixth field effect transistor Q3 are turned on. At this time, the power supply system 117 is powered by the battery signal VBAT provided by the battery 115.

[0154] When the output signal PWR_SWITCH_EN of the GPIO interface is the first level signal, the fourth field effect transistor Q5 and the transistor Q4 are both turned on, and the fifth field effect transistor Q2 and the sixth field effect transistor Q3 are both not turned on. At this time, the power supply system 117 is powered by the external power supply 114 connected by the external connector 113.

[0155] On the basis of the above embodiment, as shown in Figure 2As shown, the utility model embodiment further provides an electronic equipment, include: power supply system 117, battery charge and discharge management unit 116, battery 115, external connector 113 and the power path management circuit provided in each embodiment above, The electronic equipment can be robot equipment, by introducing power path management circuit, can reach the effect that uses electronic equipment and charges battery simultaneously when the external connector of electronic equipment is connected with external power supply, can promote user's use experience.

[0156] Finally, it should be noted that: the above examples are used to illustrate the technical solutions of the present application, but not limited to; Although the present application is described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement for part of the technical features; And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of each embodiment of the present application.

Claims

1. A power path management circuit, characterized in that, include: The processing unit and the power path management unit, wherein the power path management unit includes a first management unit and a second management unit; The processing unit includes an analog-to-digital conversion interface and a general-purpose input / output interface; The analog-to-digital conversion interface is connected to an external connector of the electronic device; the external connector is used to connect to an external power source and is connected to the battery of the electronic device through a battery charge / discharge management unit; the battery charge / discharge management unit is configured to charge and discharge the battery. The processing unit is configured to determine that the input voltage of the analog-to-digital conversion interface is higher than or equal to the target voltage, and output a first level signal by the general-purpose input / output interface; The first management unit is connected to the general-purpose input / output interface, the external connector, and the power system of the electronic device, respectively. The first management unit is configured to establish a connection between the external connector and the power system when the general-purpose input / output interface outputs the first level signal; The second management unit is connected to the general-purpose input / output interface, the battery, and the power system of the electronic device, respectively. The second management unit is configured to disconnect the connection between the battery and the power system when the general-purpose input / output interface outputs the first level signal.

2. The power path management circuit according to claim 1, characterized in that, The processing unit is further configured to determine that the input voltage of the analog-to-digital conversion interface is lower than the target voltage, and output a second level signal; the first level signal is higher than the second level signal; The first management unit is further configured to disconnect the connection between the external connector and the power system when the general-purpose input / output interface outputs the second level signal; The second management unit is also configured to establish a connection between the battery and the power system when the general-purpose input / output interface outputs the second level signal.

3. The power path management circuit according to claim 1, characterized in that, The first management unit includes a first switch unit and a second switch unit connected together; The first switching unit is connected to the general-purpose input / output interface; The second switching unit is connected to both the external connector and the power system. Both the first switching unit and the second switching unit are configured to turn on when the general-purpose input / output interface outputs the first level signal.

4. The power path management circuit according to claim 3, characterized in that, The first switching unit includes a first field-effect transistor; The drain of the first field-effect transistor is connected to the second switching unit; The gate of the first field-effect transistor is connected to the general-purpose input / output interface; The source of the first field-effect transistor is grounded.

5. The power path management circuit according to claim 3, characterized in that, The second switching unit includes a second field-effect transistor and a third field-effect transistor; The source of the second field-effect transistor is connected to the source of the third field-effect transistor; The gates of the second field-effect transistor and the third field-effect transistor are both connected to the first switching unit; The drain of the second field-effect transistor is connected to the external connector; The drain of the third field-effect transistor is connected to the power supply system.

6. The power path management circuit according to claim 5, characterized in that, The second switching unit also includes a pull-up resistor; The pull-up resistor is connected between the gate and source of the second field-effect transistor.

7. The power path management circuit according to any one of claims 1-6, characterized in that, The second management unit includes a fourth switch unit and a fifth switch unit connected together; The fourth switching unit is connected to the general-purpose input / output interface and the battery, respectively. The fifth switching unit is connected to both the battery and the power system. The fourth switch unit is configured to turn on when the general-purpose input / output interface outputs the first level signal, and the fifth switch unit is configured to turn off when the general-purpose input / output interface outputs the first level signal.

8. The power path management circuit according to claim 7, characterized in that, The fourth switching unit includes a fourth field-effect transistor and a triode; The gate of the fourth field-effect transistor is connected to the general-purpose input / output interface; The drain of the fourth field-effect transistor is connected to the base of the battery and the transistor, respectively. The emitter and collector of the transistor are both connected to the fifth switching unit; The emitter of the transistor is also connected to the battery.

9. The power path management circuit according to claim 7, characterized in that, The fifth switching unit includes a fifth field-effect transistor and a sixth field-effect transistor; The source of the fifth field-effect transistor is connected to the source of the sixth field-effect transistor; The gates of the fifth field-effect transistor and the sixth field-effect transistor are both connected to the third switching unit; The drain of the fifth field-effect transistor is connected to the battery; The drain of the sixth field-effect transistor is connected to the power supply system.

10. An electronic device, characterized in that, include: The power system, the battery charge / discharge management unit, the battery, the external connector, and the power path management circuit as described in any one of claims 1-9.

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