High-speed circuit board capable of reducing loss

Abstract

The utility model discloses a high-speed circuit board capable of reducing loss. The high-speed circuit board comprises a main board body, a cavity is formed in the main plate body; the cavity corresponds to a circuit of the main board body; the main plate body comprises an upper plate placing layer, a middle plate placing layer, a lower plate placing layer, a first connecting layer and a second connecting layer; the upper plate placing layer, the middle plate placing layer and the lower plate placing layer are sequentially arranged from top to bottom; the first connecting layer is arranged between the upper plate placing layer and the middle plate placing layer; an upper glue blocking groove is formed in the upper plate placing layer, a middle glue blocking groove is formed in the middle plate placing layer, and a lower glue blocking groove is formed in the lower plate placing layer. According to the utility model, the loss of signal energy can be reduced, that is, the dielectric loss caused by the dielectric is reduced, the purpose of lower loss capability of a high-end high-speed circuit board is achieved under the condition of the same material grade, and the double difficulties of dependence on higher-end materials and high cost during the manufacturing of the traditional PCB are overcome.

Description

TECHNICAL FIELD

[0001] The utility model relates to a kind of high-speed circuit board of reducing loss. BACKGROUND

[0002] Printed Circuit Board (PCB, Printed Circuit Board), also known as printed wiring board. With the high-speed development of communication, cloud computing and other information technologies, AI, cloud server product operation rate is faster and faster, signal transmission rate is continuously improved. But for high-speed circuit board (among them, industry often signal frequency greater than 50MHz, when the rising / falling time is less than 50Ps signal, defined as high-speed signal), transmission loss is often serious, the signal loss of entire transmission link is serious, cause signal integrity problem is more and more highlighted.

[0003] At present, the industry mainly reduces transmission loss by developing PCB substrate material. The influence of substrate material on loss mainly reflects in two indexes of dielectric constant (Dk) and dielectric loss factor (Df). The Dk value of current high-end high-speed material is generally 3.0-3.5, and the Df value is generally 0.002-0.006, but as the main signal transmission carrier in the present development stage, due to the contradiction between the long research and development cycle of PCB board using substrate and other materials and the rapid product replacement and demand, and the inherent properties of PCB board material determine that the research and development of current lower loss material has reached a bottleneck, the difficulty and cost required for further research and development are great, therefore, it is necessary to provide the industry with a kind of high-speed circuit board which can reduce the loss of signal transmission and reduce the cost. UTILITY MODEL CONTENT

[0004] In order to overcome the shortcomings of the prior art, the purpose of the utility model is to provide a kind of high-speed circuit board of reducing loss, which can reduce the loss of signal transmission and reduce the cost.

[0005] The purpose of the utility model is realized by the following technical solutions:

[0006] The utility model provides a high -speed circuit board of reducing loss, including main board body, be provided with cavity on the main board body, the cavity corresponds to the circuit of main board body, the main board body includes the upper plate layer, the middle plate layer, the lower plate layer, first connecting layer and second connecting layer, the upper plate layer, the middle plate layer, the lower plate layer are sequentially arranged from top to bottom, first connecting layer is arranged between the upper plate layer and the middle plate layer, second connecting layer is arranged between the middle plate layer and the lower plate layer, the cavity extends from first connecting layer to the lower plate layer, the upper plate layer is provided with the upper glue resistance groove in the cavity periphery, the middle plate layer is provided with the middle glue resistance groove in the cavity periphery, the lower plate layer is provided with the lower glue resistance groove in the cavity periphery, the upper plate layer, first connecting layer and the middle plate layer surround first communication groove, and the first communication groove is communicated with the upper glue resistance groove, the middle glue resistance groove respectively, the middle plate layer, second connecting layer and the lower plate layer surround second communication groove, and the second communication groove is communicated with the middle glue resistance groove, the lower glue resistance groove respectively.

[0007] The middle plate layer includes a first core plate dielectric layer, a first upper copper foil layer, and a first lower copper foil layer. The first upper copper foil layer is arranged above the first core plate dielectric layer, and the first lower copper foil layer is arranged below the first core plate dielectric layer. The first upper copper foil layer and the first lower copper foil layer are both provided with the middle glue resistance groove.

[0008] The first communication groove is communicated with the middle glue resistance groove of the first upper copper foil layer.

[0009] The second communication groove is communicated with the middle glue resistance groove of the first lower copper foil layer.

[0010] The bottom surface of the upper plate layer, the inner side wall of the first connecting layer, and the top surface of the first upper copper foil layer surround the first communication groove. The distance between the inner side wall of the first connecting layer and the edge of the cavity is 3.5-4.5 mm.

[0011] The top surface of the lower plate layer, the inner side wall of the second connecting layer, and the bottom surface of the first lower copper foil layer surround the second communication groove. The distance between the inner side wall of the second connecting layer and the edge of the cavity is 3.5-4.5 mm.

[0012] The upper glue resistance groove is formed on the upper plate layer by etching. The middle glue resistance groove is formed on the middle plate layer by etching. The lower glue resistance groove is formed on the lower plate layer by etching.

[0013] The distance between the upper glue resistance groove and the edge of the cavity is 1-2 mm.

[0014] The width of the upper glue resistance groove is 1-2 mm.

[0015] Compared with the prior art, the utility model has the advantages that:

[0016] This utility model provides a high-speed circuit board with reduced losses. It features a cavity on the main board body, an upper resist groove on the upper board layer surrounding the cavity, a middle resist groove on the middle board layer surrounding the cavity, and a lower resist groove on the lower board layer surrounding the cavity. It also incorporates a first connecting groove and a second connecting groove. This allows for the embedding of the cavity structure within the main board body, preventing adhesive overflow and depressions into the cavity. Furthermore, by utilizing the inherent air properties of the cavity (Dk≈1, Df≈0 for air), signal energy loss caused by dielectric polarization is avoided on the cavity side, thus reducing signal energy loss and dielectric loss. Under the same material grade, it achieves lower loss capability for high-end high-speed circuit boards, overcoming the dual challenges of relying on higher-end materials and higher costs in traditional PCB manufacturing. This reduces signal transmission loss and lowers costs simultaneously. Attached Figure Description

[0017] Fig. 1 This is a schematic diagram of the structure of this utility model;

[0018] Fig. 2 This is a schematic diagram of the lower plate layer;

[0019] Among them, 10, main board body; 11, cavity; 20, upper board layer; 21, upper adhesive resist groove; 30, middle board layer; 31, middle adhesive resist groove; 32, first core board dielectric layer; 33, first upper copper foil layer; 34, first lower copper foil layer; 40, lower board layer; 41, lower adhesive resist groove; 42, connecting section; 43, first connecting section; 44, second connecting section; 45, third connecting section; 46, fourth connecting section; 47, connecting unit; 50, first connecting layer; 51, first connecting groove; 60, second connecting layer; 61, second connecting groove; 70, circuit. Detailed Implementation

[0020] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments. It should be noted that, without conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0021] like Figs. 1-2As shown, a high-speed circuit board capable of reducing loss comprises a main board body 10; the main board body 10 is provided with a cavity 11; the cavity 11 corresponds to a circuit 70 of the main board body 10; the main board body 10 comprises an upper plate layer 20, a middle plate layer 30, a lower plate layer 40, a first connecting layer 50 and a second connecting layer 60; the upper plate layer 20, the middle plate layer 30 and the lower plate layer 40 are sequentially arranged from top to bottom; the first connecting layer 50 is arranged between the upper plate layer 20 and the middle plate layer 30; the second connecting layer 60 is arranged between the middle plate layer 30 and the lower plate layer 40; the cavity 11 extends downward from the first connecting layer 50 to the lower plate layer 40; the upper plate layer 20 is provided with an upper glue blocking groove 21 located at the periphery of the cavity 11, the middle plate layer 30 is provided with a middle glue blocking groove 31 located at the periphery of the cavity 11, and the lower plate layer 40 is provided with a lower glue blocking groove 41 located at the periphery of the cavity 11; the upper plate layer 20, the first connecting layer 50 and the middle plate layer 30 surround a first communication groove 51, and the first communication groove 51 is in communication with the upper glue blocking groove 21 and the middle glue blocking groove 31 respectively; the middle plate layer 30, the second connecting layer 60 and the lower plate layer 40 surround a second communication groove 61, and the second communication groove 61 is in communication with the middle glue blocking groove 31 and the lower glue blocking groove 41 respectively.

[0022] The high-speed circuit board capable of reducing loss provided by the utility model has the advantages that the cavity 11 is arranged on the main board body 10, the upper glue blocking groove 21, the middle glue blocking groove 31 and the lower glue blocking groove 41 are arranged on the upper plate layer 20, the middle plate layer 30 and the lower plate layer 40 respectively, the first communication groove 51 and the second communication groove 61 are combined, the cavity 11 structure is processed inside the main board body 10, glue overflow and recess in the cavity 11 are avoided, the air inherent properties Dk and Df of the cavity 11 are small (the Dk of air is approximately equal to 1, and the Df of air is approximately equal to 0), signal energy loss caused by medium polarization on one side of the cavity 11 is avoided when the signal is transmitted from the transmitting end to the receiving end through the transmission line, the transmission line loss is reduced by using the internal cavity 11, the signal energy loss is reduced, the medium loss caused by the medium is reduced, the purpose of lower loss of high-end high-speed circuit board is achieved under the condition of the same material grade, the double difficulties of relying on higher-end materials and high cost in traditional PCB manufacturing are overcome, the waste cost of using higher grade materials under the same loss requirement is avoided, the signal transmission loss is reduced, and the cost is reduced.

[0023] The middle plate layer 30 comprises a first core plate medium layer 32, a first upper copper foil layer 33 and a first lower copper foil layer 34; the first upper copper foil layer 33 is arranged above the first core plate medium layer 32, and the first lower copper foil layer 34 is arranged below the first core plate medium layer 32; the first upper copper foil layer 33 and the first lower copper foil layer 34 are both provided with a middle glue blocking groove 31.

[0024] Specifically, the first communication groove 51 is in communication with the middle glue blocking groove 31 of the first upper copper foil layer 33, and the second communication groove 61 is in communication with the middle glue blocking groove 31 of the first lower copper foil layer 34.

[0025] The bottom surface of the upper plate layer 20, the inner side wall of the first connecting layer 50 and the top surface of the first upper copper foil layer 33 form the first communication groove 51, and the distance D1 between the inner side wall of the first connecting layer 50 and the edge of the cavity 11 is 3.5-4.5 mm. Through the above arrangement, the formation of the first communication groove 51 is facilitated, the structural stability is ensured, and the glue of the first connecting layer 50 during pressing can be prevented from flowing into the cavity 11 due to the pressure and structural characteristics during pressing, thereby causing failure and ensuring the effect of reducing consumption. As the most preferred embodiment of the present application, the distance between the inner side wall of the first connecting layer 50 and the edge of the cavity 11 is 4 mm.

[0026] The top surface of the lower plate layer 40, the inner side wall of the second connecting layer 60 and the bottom surface of the first lower copper foil layer 34 form the second communication groove 61, and the distance between the inner side wall of the second connecting layer 60 and the edge of the cavity 11 is 3.5-4.5 mm. Through the above arrangement, the formation of the second communication groove 61 is facilitated, the structural stability is ensured, and the glue of the second connecting layer 60 during pressing can be prevented from flowing into the cavity 11 due to the pressure and structural characteristics during pressing, thereby causing failure and ensuring the effect of reducing consumption. As the most preferred embodiment of the present application, the distance between the inner side wall of the second connecting layer 60 and the edge of the cavity 11 is 4 mm.

[0027] The upper glue blocking groove 21 is formed on the upper plate layer 20 by etching, the middle glue blocking groove 31 is formed on the middle plate layer 30 by etching, and the lower glue blocking groove 41 is formed on the lower plate layer 40 by etching. Through the above arrangement, the formation of the upper glue blocking groove 21, the middle glue blocking groove 31 and the lower glue blocking groove 41 is facilitated.

[0028] The distance D2 between the upper glue blocking groove 21 and the edge of the cavity 11 is 1-2mm. Through the above setting, the processing is convenient, and the overflow of the glue of the first connecting layer 50 to the inside of the cavity 11 during the pressing can be further prevented. As the most preferred embodiment of the present application, the distance between the upper glue blocking groove 21 and the edge of the cavity 11 is 1.5mm.

[0029] The width L of the upper glue blocking groove 21, the middle glue blocking groove 31 and the lower glue blocking groove 41 is 1-2mm. As the most preferred embodiment of the present application, the width of the upper glue blocking groove 21, the middle glue blocking groove 31 and the lower glue blocking groove 41 is 1.5mm.

[0030] As the preferred embodiment of the present application, the lower glue blocking groove 41 comprises a communicating section 42, a first communicating section 43, a second communicating section 44, a third communicating section 45, a fourth communicating section 46 and a connecting unit 47. The first communicating section 43 and the second communicating section 44 are in communication, and the first communicating section 43 and the second communicating section 44 are arranged in a V shape. The communicating section 42 is communicated between the first communicating section 43 and the second communicating section 44. The third communicating section 45 is communicated with one end of the first communicating section 43 away from the second communicating section 44. The fourth communicating section 46 is communicated with one end of the second communicating section 44 away from the first communicating section 43. The connecting unit 47 is communicated with the third communicating section 45 and the fourth communicating section 46. The line 70 comprises a signal line, and the signal line is located inside the area surrounded by the first communicating section 43, the second communicating section 44, the third communicating section 45, the fourth communicating section 46 and the connecting unit 47.

[0031] Of course, in addition to this, the structure of the lower glue blocking groove 41 can be set according to the actual situation, and the upper glue blocking groove 21 and the middle glue blocking groove 31 can be correspondingly set. However, the structure of the lower glue blocking groove 41 using the first communicating section 43, the second communicating section 44, the third communicating section 45, the fourth communicating section 46 and the connecting unit 47 is the preferred embodiment of the present application, which can play a role in blocking glue in all directions and facilitate processing and manufacturing.

[0032] In the present embodiment, the first connecting layer 50 and the second connecting layer 60 are both prepreg layers. Of course, in addition to this, the first connecting layer 50 and the second connecting layer 60 can also be set to other structures, but the first connecting layer 50 and the second connecting layer 60 are both set to prepreg layers, which is the most preferred embodiment of the present application, and can ensure the stability of the connection.

[0033] The above-mentioned embodiments are only the preferred embodiments of the present application, and cannot be used to limit the scope of protection of the present application. Any non-essential changes and substitutions made by those skilled in the art on the basis of the present application all belong to the scope of protection required by the present application.

Claims

1. A high-speed circuit board with reduced losses, characterized in that: The motherboard includes a motherboard body; the motherboard body has a cavity; the cavity corresponds to the circuitry of the motherboard body; the motherboard body includes an upper board layer, a middle board layer, a lower board layer, a first connection layer, and a second connection layer; the upper board layer, middle board layer, and lower board layer are arranged sequentially from top to bottom; the first connection layer is disposed between the upper board layer and the middle board layer; the second connection layer is disposed between the middle board layer and the lower board layer; the cavity extends downward from the first connection layer to the lower board layer; the upper board layer... The upper plate has an upper adhesive-blocking groove located around the cavity, the middle plate has a middle adhesive-blocking groove located around the cavity, and the lower plate has a lower adhesive-blocking groove located around the cavity. The upper plate, the first connecting layer, and the middle plate form a first connecting groove, which is connected to the upper adhesive-blocking groove and the middle adhesive-blocking groove, respectively. The middle plate, the second connecting layer, and the lower plate form a second connecting groove, which is connected to the middle adhesive-blocking groove and the lower adhesive-blocking groove, respectively.

2. The high-speed circuit board with reduced losses as described in claim 1, characterized in that: The central board layer includes a first core board dielectric layer, a first upper copper foil layer, and a first lower copper foil layer; the first upper copper foil layer is disposed above the first core board dielectric layer, and the first lower copper foil layer is disposed below the first core board dielectric layer; a central adhesive resist groove is provided on both the first upper copper foil layer and the first lower copper foil layer.

3. The high-speed circuit board with reduced losses as described in claim 2, characterized in that: The first connecting groove is connected to the middle resist groove of the first upper copper foil layer.

4. The high-speed circuit board with reduced losses as described in claim 2, characterized in that: The second connecting groove is connected to the middle resist groove of the first lower copper foil layer.

5. The high-speed circuit board with reduced losses as described in claim 2, characterized in that: The bottom surface of the upper plate layer, the inner sidewall of the first connecting layer, and the top surface of the first upper copper foil layer form a first connecting groove; the distance between the inner sidewall of the first connecting layer and the edge of the cavity is 3.5-4.5mm.

6. The high-speed circuit board with reduced losses as described in claim 2, characterized in that: The top surface of the lower plate layer, the inner wall of the second connecting layer, and the bottom surface of the first lower copper foil layer form a second connecting groove; the distance between the inner wall of the second connecting layer and the edge of the cavity is 3.5-4.5mm.

7. The high-speed circuit board with reduced losses as described in claim 1, characterized in that: The upper resist groove is formed on the upper board layer by etching; the middle resist groove is formed on the middle board layer by etching; and the lower resist groove is formed on the lower board layer by etching.

8. The high-speed circuit board with reduced losses as described in claim 1, characterized in that: The distance between the upper adhesive-resistant groove and the edge of the cavity is 1-2 mm.

9. The high-speed circuit board with reduced losses as described in claim 1, characterized in that: The width of the upper adhesive-resistant groove is 1-2 mm.

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