Counter electromotive force electric energy recovery circuit of unmanned aerial vehicle and unmanned aerial vehicle

Abstract

The utility model provides a back electromotive force electric energy recovery circuit of an unmanned aerial vehicle and the unmanned aerial vehicle. The multiple battery voltages are combined through the combining output circuit to supply power to the load, when back electromotive force exists due to deceleration of the unmanned aerial vehicle, the multiple battery voltages are detected through the comparison circuit, and if the back electromotive force voltage is larger than the voltage of each battery, at least one reverse charging circuit is opened to charge the battery. According to the embodiment, when the multiple batteries supply power to the unmanned aerial vehicle, mutual charging between the batteries can be prevented, counter electromotive force electric energy generated when the motor slows down can be absorbed through the batteries, uninterruptible power supply of the unmanned aerial vehicle can be achieved through hot plugging of the batteries when the unmanned aerial vehicle is in a standby state, and the unmanned aerial vehicle is convenient to use. The time for starting up, shutdown and initialization of the unmanned aerial vehicle due to battery replacement is shortened, and the working efficiency of the unmanned aerial vehicle is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronics, in particular to a back electromotive force electric energy recovery circuit of a UAV and the UAV. BACKGROUND

[0002] It is a common phenomenon that a multi-rotor UAV generates back electromotive force during deceleration. If the high back electromotive force voltage is not well handled, it will damage electronic devices and affect the normal operation of the circuit, and even directly cause the UAV to explode.

[0003] Currently, for a single-battery-powered UAV, the back electromotive force generated by the motor during deceleration can be directly absorbed by the battery, and the back electromotive force has little effect on the electronic circuit.

[0004] However, for a multi-battery-powered UAV that supports battery hot replacement, the back electromotive force cannot be directly absorbed by the battery. Because the battery needs to be hot replaced, that is, the batteries cannot charge each other during hot replacement, thereby blocking the charging circuit of the battery, that is, the back electromotive force generated during deceleration cannot be absorbed by the battery, so that the back electromotive force has no place to release and will damage the electronic devices in the UAV. The commonly used protection method is to increase a high-power TVS tube at the voltage input port to discharge the instantaneous back electromotive force voltage, and maintain the voltage within the normal power supply range to ensure the stable operation of the electronic circuit. CONTENT OF THE INVENTION

[0005] The purpose of the embodiments of the present application is to provide a back electromotive force electric energy recovery circuit of a UAV and the UAV, to solve the problem that the existing multi-battery-powered UAV that supports battery hot replacement is difficult to recover back electromotive force electric energy.

[0006] The back electromotive force electric energy recovery circuit of the UAV provided by the embodiments of the present application comprises at least two combining output circuits, at least two comparison circuits, and at least two reverse charging circuits.

[0007] The first end of the combining output circuit is used for connecting the output end of a battery module, the first end of the combining output circuit is also connected to the first end of the comparison circuit, the second end of the combining output circuit is connected to the third end of the comparison circuit, the third end of the combining output circuit is connected to the second end of the comparison circuit, the fourth end of the comparison circuit is connected to the second end of the reverse charging circuit, the second end of the combining output circuit is also connected to the third end of the reverse charging circuit, and the first end of the reverse charging circuit is used for connecting the input end of the battery module; and the second end of the combining output circuit is also used for connecting a flight control system.

[0008] The at least two combining output circuits are used for combining at least two battery voltages and outputting a first battery voltage to a load for power supply; wherein the first battery voltage is the highest voltage among the at least two battery voltages.

[0009] at least two comparison circuits for detecting whether each battery voltage is less than the back electromotive voltage when the flight control system generates the back electromotive voltage;

[0010] at least two reverse charging circuits for opening the corresponding reverse charging circuit of at least one battery module to charge the battery module by the back electromotive voltage when each battery voltage is less than the back electromotive voltage.

[0011] In the technical solution, the multiple battery voltages are combined by the combining output circuit to supply power to the load. When the back electromotive force exists due to the speed reduction of the unmanned aerial vehicle, the multiple battery voltages are detected by the comparison circuit. If the back electromotive voltage is greater than each battery voltage, at least one reverse charging circuit is opened to charge the battery. The embodiment realizes that when the multiple batteries supply power to the unmanned aerial vehicle, the mutual charging between the batteries is prevented, the back electromotive energy generated by the motor speed reduction is absorbed by the battery, and the unmanned aerial vehicle is kept powered on by hot swapping the battery in the standby state, the time of turning on and off and initializing the unmanned aerial vehicle due to replacing the battery is reduced, and the work efficiency of the unmanned aerial vehicle is improved.

[0012] In some optional embodiments, the control signal logic circuit is further included.

[0013] The output end of the first comparison circuit is connected to the first end of the control signal logic circuit, the output end of the second comparison circuit is connected to the second end of the control signal logic circuit, the third end of the control signal logic circuit is connected to the second end of the first reverse charging circuit, and the third end of the control signal logic circuit is also connected to the second end of the second reverse charging circuit.

[0014] In the technical solution, the control signal logic circuit outputs the corresponding control signal according to the comparison results of the first comparison circuit and the second comparison circuit to control the opening or closing of the first reverse charging circuit and the second reverse charging circuit.

[0015] In some optional embodiments, the first comparison circuit includes a first comparator and a third comparator, and the second comparison circuit includes a second comparator and a fourth comparator.

[0016] The output end Vbat1 of the first battery module is connected to the VIN- end of the first comparator, and the VIN+ end of the first comparator is connected to the output voltage end VCC_POWER.

[0017] The output end Vbat1 of the first battery module is connected to the VIN- end of the third comparator, and the VIN+ end of the third comparator is connected to the third end of the first combining output circuit.

[0018] The output end Vbat2 of the second battery module is connected to the VIN- end of the second comparator, and the VIN+ end of the second comparator is connected to the output voltage end VCC_POWER.

[0019] The output end Vbat2 of the second battery module is connected to the VIN- end of the fourth comparator, and the VIN+ end of the fourth comparator is connected to the third end of the second combining output circuit.

[0020] In the first comparison circuit, the voltage Vbat1 of the first battery module is compared with the output voltage Vout of the output voltage end VCC_POWER, and the voltage Vbat1 of the first battery module is compared with the third end voltage Vgate1 of the first combining output circuit. When Vout>Vbat1, the first comparator output end OUT_O_1 outputs a high level signal; when VoutVbat1, the third comparator outputs a high level signal; and when Vgate1Vbat1, the third comparator outputs a low level signal.

[0021] In the second comparison circuit, the voltage Vbat2 of the second battery module is compared with the output voltage Vout of the output voltage end VCC_POWER, and the voltage Vbat2 of the second battery module is compared with the third end voltage Vgate2 of the second combining output circuit. When Vout>Vbat2, the second comparator output end OUT_O_2 outputs a high level signal; when VoutVbat2, the fourth comparator outputs a high level signal; and when Vgate2Vbat2, the fourth comparator outputs a low level signal.

[0022] In some optional embodiments, the control signal logic circuit comprises an AND gate module and an OR gate module.

[0023] The output end of the first comparator is connected to the first end of the AND gate module, and the output end of the second comparator is connected to the second end of the AND gate module.

[0024] The output end of the third comparator is connected to the first end of the OR gate module, and the output end of the fourth comparator is connected to the second end of the OR gate module.

[0025] In the above technical solution, Vout>Vbat1 and Vout>Vbat2, the AND gate module outputs a high level; VoutVbat1 and / or Vout>Vbat2, the AND gate module outputs a low level; Vgate1>Vbat1 and / or Vgate2>Vbat2, the OR gate module outputs a high level; Vgate1Vbat1 and Vgate2Vbat2, the OR gate module outputs a low level.

[0026] In some alternative embodiments, the first combining output circuit includes a first MOS tube, a third MOS tube, and a first ORing controller.

[0027] The GATE end Vgate1 of the first ORing controller is connected to the G pole of the first MOS tube and the G pole of the third MOS tube, the S pole of the first MOS tube and the S pole of the third MOS tube are connected to the output end Vbat1 of the first battery module, and the D pole of the first MOS tube and the D pole of the third MOS tube are connected to the output voltage end VCC_POWER.

[0028] In the above technical solution, two MOSFETs are connected in parallel outside the first ORing controller, which improves the current carrying capacity of the circuit. The first ORing controller provides charge pump gate drive for the external N-channel MOSFET (the first MOS tube and the third MOS tube) to turn off the first MOS tube and the third MOS tube when the current flows in the opposite direction.

[0029] In some alternative embodiments, the second combining output circuit includes a second MOS tube, a fourth MOS tube, and a second ORing controller.

[0030] The GATE end Vgate2 of the second ORing controller is connected to the G pole of the second MOS tube and the G pole of the fourth MOS tube, the S pole of the second MOS tube and the S pole of the fourth MOS tube are connected to the output end Vbat2 of the second battery module, and the D pole of the second MOS tube and the D pole of the fourth MOS tube are connected to the output voltage end VCC_POWER.

[0031] In the above technical solution, two MOSFETs are connected in parallel outside the second ORing controller, which improves the current carrying capacity of the circuit. The second ORing controller provides charge pump gate drive for the external N-channel MOSFET (the second MOS tube and the fourth MOS tube) to turn off the second MOS tube and the fourth MOS tube when the current flows in the opposite direction.

[0032] In some alternative embodiments, the first reverse charging circuit includes a fifth MOS tube, a sixth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a fifteenth MOS tube, and a sixteenth MOS tube.

[0033] The output end Vbat1 of the first battery module is connected to the D pole of the fifth MOS tube, the S pole of the fifth MOS tube is connected to the S pole of the sixth MOS tube, and the D pole of the sixth MOS tube is connected to the output voltage end VCC_POWER.

[0034] The G pole of the fifth MOS tube is connected with the D pole of the eleventh MOS tube, the S pole of the eleventh MOS tube is grounded, the G pole of the eleventh MOS tube is connected with the D pole of the fifteenth MOS tube, the S pole of the fifteenth MOS tube is grounded, the G pole of the fifteenth MOS tube is connected with the output end of the OR module, and the G pole of the eleventh MOS tube is also connected with the output end of the AND module;

[0035] The G pole of the sixth MOS tube is connected with the D pole of the twelfth MOS tube, the S pole of the twelfth MOS tube is grounded, the G pole of the twelfth MOS tube is connected with the D pole of the sixteenth MOS tube, the S pole of the sixteenth MOS tube is grounded, and the G pole of the sixteenth MOS tube is connected with the output end of the OR module, and the G pole of the twelfth MOS tube is also connected with the output end of the AND module.

[0036] In the technical scheme, Vout < Vbat1 and / or Vout < Vbat2, the AND module outputs a low level, the eleventh MOS tube and the twelfth MOS tube are closed, the fifth MOS tube and the sixth MOS tube are closed, and the first reverse charging circuit is closed.

[0037] Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first battery module and the second battery module normally supplies power, the OR module outputs a high level, the fifteenth MOS tube and the sixteenth MOS tube are opened, the eleventh MOS tube and the twelfth MOS tube are closed, the fifth MOS tube and the sixth MOS tube are closed, and the first reverse charging circuit is closed.

[0038] Vgate1 < Vbat1 and Vgate2 < Vbat2, neither of the first battery module and the second battery module supplies power, the OR module outputs a low level, the fifteenth MOS tube and the sixteenth MOS tube are closed, at this time, if Vout > Vbat1 and Vout > Vbat2, the AND module outputs a high level, the eleventh MOS tube and the twelfth MOS tube are opened, and the output voltage end VCC_POWER charges the first battery module through the first reverse charging circuit.

[0039] In some optional embodiments, the second reverse charging circuit comprises a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, a thirteenth MOS tube and a fourteenth MOS tube.

[0040] The output end Vbat2 of the second battery module is connected with the D pole of the seventh MOS tube, the S pole of the seventh MOS tube is connected with the S pole of the eighth MOS tube, and the D pole of the eighth MOS tube is connected with the output voltage end VCC_POWER.

[0041] The G pole of the seventh MOS is connected with the D pole of the ninth MOS, the S pole of the ninth MOS is grounded, the G pole of the ninth MOS is connected with the D pole of the thirteenth MOS, the S pole of the thirteenth MOS is grounded, the G pole of the thirteenth MOS is connected with the output end of the OR gate module, and the G pole of the ninth MOS is also connected with the output end of the AND gate module;

[0042] The G pole of the eighth MOS is connected with the D pole of the tenth MOS, the S pole of the tenth MOS is grounded, the G pole of the tenth MOS is connected with the D pole of the fourteenth MOS, the S pole of the fourteenth MOS is grounded, and the G pole of the fourteenth MOS is connected with the output end of the OR gate module, and the G pole of the tenth MOS is also connected with the output end of the AND gate module.

[0043] In the technical solution, Vout < Vbat1 and / or Vout < Vbat2, the AND gate module outputs a low level, the ninth MOS and the tenth MOS are closed, the seventh MOS and the eighth MOS are closed, and the second reverse charging circuit is closed.

[0044] Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first battery module and the second battery module normally supplies power, the OR gate module outputs a high level, the thirteenth MOS and the fourteenth MOS are opened, the ninth MOS and the tenth MOS are closed, the seventh MOS and the eighth MOS are closed, and the second reverse charging circuit is closed.

[0045] Vgate1 < Vbat1 and Vgate2 < Vbat2, neither of the first battery module and the second battery module supplies power, the OR gate module outputs a low level, the thirteenth MOS and the fourteenth MOS are closed, at this time, if Vout > Vbat1 and Vout > Vbat2, the AND gate module outputs a high level, the ninth MOS and the tenth MOS are opened, and the output voltage end VCC_POWER charges the second battery module through the second reverse charging circuit.

[0046] In some optional embodiments, the control signal logic circuit further comprises: a ninth comparator and a tenth comparator.

[0047] The VIN+ end of the ninth comparator is connected with the output end of the second battery module, the VIN- end of the ninth comparator is connected with the output end of the first comparator; the VIN+ end of the tenth comparator is connected with the output end of the first battery module, and the VIN- end of the tenth comparator is connected with the output end of the second battery module.

[0048] In some optional embodiments, the first reverse charging circuit comprises: a fifth MOS, a sixth MOS, an eleventh MOS, a twelfth MOS, a fifteenth MOS and a sixteenth MOS.

[0049] The output end of the first battery module is connected to the D pole of the fifth MOS tube, the S pole of the fifth MOS tube is connected to the S pole of the sixth MOS tube, and the D pole of the sixth MOS tube is connected to the output voltage end.

[0050] The G pole of the fifth MOS tube is connected to the D pole of the eleventh MOS tube, the S pole of the eleventh MOS tube is grounded, the G pole of the eleventh MOS tube is connected to the D pole of the fifteenth MOS tube, and the S pole of the fifteenth MOS tube is grounded; or the output end of the AND gate module is connected to the G pole of the fifteenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the fifteenth MOS tube through a diode; the output end of the NAND gate module is connected to the G pole of the eleventh MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the eleventh MOS tube through a diode.

[0051] The G pole of the sixth MOS tube is connected to the D pole of the twelfth MOS tube, the S pole of the twelfth MOS tube is grounded, the G pole of the twelfth MOS tube is connected to the D pole of the sixteenth MOS tube, and the S pole of the sixteenth MOS tube is grounded; or the output end of the AND gate module is connected to the G pole of the sixteenth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the sixteenth MOS tube through a diode; the output end of the NAND gate module is connected to the G pole of the twelfth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the twelfth MOS tube through a diode.

[0052] In some optional embodiments, the second reverse charging circuit comprises: a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube, a thirteenth MOS tube, and a fourteenth MOS tube.

[0053] The output end of the second battery module is connected to the D pole of the seventh MOS tube, the S pole of the seventh MOS tube is connected to the S pole of the eighth MOS tube, and the D pole of the eighth MOS tube is connected to the output voltage end.

[0054] The G pole of the seventh MOS tube is connected to the D pole of the ninth MOS tube, the S pole of the ninth MOS tube is grounded, the G pole of the ninth MOS tube is connected to the D pole of the thirteenth MOS tube, and the S pole of the thirteenth MOS tube is grounded; or the output end of the AND gate module is connected to the G pole of the thirteenth MOS tube through a diode, and the output end of the ninth comparator is connected to the G pole of the thirteenth MOS tube through a diode; the output end of the NAND gate module is connected to the G pole of the ninth MOS tube through a diode, and the output end of the tenth comparator is connected to the G pole of the ninth MOS tube through a diode.

[0055] The G pole of the eighth MOS transistor is connected to the D pole of the tenth MOS transistor, the S pole of the tenth MOS transistor is grounded, the G pole of the tenth MOS transistor is connected to the D pole of the fourteenth MOS transistor, the S pole of the fourteenth MOS transistor is grounded; or the output end of the AND gate module is connected to the G pole of the fourteenth MOS transistor through a diode, and the output end of the ninth comparator is connected to the G pole of the fourteenth MOS transistor through a diode; the output end of the OR gate module is connected to the G pole of the tenth MOS transistor through a diode, and the output end of the tenth comparator is connected to the G pole of the tenth MOS transistor through a diode.

[0056] In the technical solution, the ninth comparator and the tenth comparator are configured to open or close the first reverse charging circuit and the second reverse charging circuit: if Vout>Vbat1, Vout>Vbat2, and Vbat2>Vbat1, the first battery module is charged; if Vout>Vbat1, Vout>Vbat2, and Vbat1>Vbat2, the second battery module is charged. The embodiment can ensure that the low-voltage battery is preferentially charged when reverse electromotive force electric energy is absorbed.

[0057] The embodiment of the application provides a kind of unmanned plane, comprising: at least two battery modules, flight control system, and the reverse electromotive force electric energy recovery circuit of any one of the unmanned plane of above.

[0058] The embodiment of the application provides a kind of reverse electromotive force electric energy recovery method of unmanned plane, comprising:

[0059] Utilize the combined output circuit, output the first battery voltage to load power supply after the combination of at least two battery voltages;Wherein, the first battery voltage is the highest voltage in the at least two battery voltages;

[0060] When the reverse electromotive force voltage is generated when the unmanned plane slows down, the comparison circuit is used to detect each battery voltage, if each battery voltage is less than the reverse electromotive force voltage, the reverse charging circuit corresponding to at least one battery module is opened, and the reverse electromotive force voltage is charged to the battery module.

[0061] In some optional embodiments, opening the reverse charging circuit corresponding to at least one battery module comprises:

[0062] Opening the reverse charging circuit corresponding to all battery modules;

[0063] Or, opening the reverse charging circuit corresponding to the battery module with the lowest battery voltage. BRIEF DESCRIPTION OF DRAWINGS

[0064] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments of the present application. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be regarded as a limitation to the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0065] Figure 1 A connection diagram of a back electromotive force electric energy recovery circuit of a UAV provided by an embodiment of the present application;

[0066] Figure 2 A structural diagram of a back electromotive force electric energy recovery circuit including two battery modules provided by an embodiment of the present application;

[0067] Figure 3 A structural diagram of a first combining output circuit provided by an embodiment of the present application;

[0068] Figure 4 A structural diagram of a second combining output circuit provided by an embodiment of the present application;

[0069] Figure 5 A structural diagram of a first comparison circuit provided by an embodiment of the present application;

[0070] Figure 6 A structural diagram of a second comparison circuit provided by an embodiment of the present application;

[0071] Figure 7 A structural diagram of a control signal logic circuit provided by an embodiment of the present application;

[0072] Figure 8 A structural diagram of a first reverse charging circuit provided by an embodiment of the present application;

[0073] Figure 9 A structural diagram of a second reverse charging circuit provided by an embodiment of the present application;

[0074] Figure 10 A structural diagram of a control signal logic circuit provided by another embodiment of the present application;

[0075] Figure 11 A structural diagram of a first reverse charging circuit provided by another embodiment of the present application;

[0076] Figure 12 A structural diagram of a second reverse charging circuit provided by another embodiment of the present application. DETAILED DESCRIPTION

[0077] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

[0078] Please refer toFigure 1 , Figure 1 A connection diagram of a back electromotive force electric energy recovery circuit of a UAV is provided in the embodiment, comprising: at least two combining output circuits, at least two comparison circuits, and at least two reverse charging circuits.

[0079] The first end of the combining output circuit is used for connecting the output end of a battery module, the first end of the combining output circuit is also connected to the first end of the comparison circuit, the second end of the combining output circuit is connected to the third end of the comparison circuit, the third end of the combining output circuit is connected to the second end of the comparison circuit, the fourth end of the comparison circuit is connected to the second end of the reverse charging circuit, the second end of the combining output circuit is also connected to the third end of the reverse charging circuit, and the first end of the reverse charging circuit is used for connecting the input end of the battery module; and the second end of the combining output circuit is also used for connecting a flight control system.

[0080] The at least two combining output circuits are used for combining at least two battery voltages and outputting a first battery voltage to a load for power supply; and the first battery voltage is the highest voltage among the at least two battery voltages.

[0081] The at least two comparison circuits are used for detecting whether each battery voltage is less than a back electromotive force voltage generated by the flight control system when the back electromotive force voltage is generated.

[0082] The at least two reverse charging circuits are used for opening at least one reverse charging circuit corresponding to a battery module when each battery voltage is less than the back electromotive force voltage, and the back electromotive force voltage charges the battery module.

[0083] In the above technical solution, the multiple battery voltages are combined by the combining output circuit and supplied to the load, when the back electromotive force exists due to the deceleration of the UAV, the multiple battery voltages are detected by the comparison circuit, if the back electromotive force voltage is greater than each battery voltage, at least one reverse charging circuit is opened to charge the battery. The embodiment realizes that when the multiple batteries supply power to the UAV, the mutual charging between the batteries is prevented, the back electromotive force electric energy generated when the motor is decelerated is absorbed by the battery, and the UAV is kept powered on by hot-swapping the battery in the standby state, the time of switching on and off and initialization of the UAV caused by replacing the battery is reduced, and the work efficiency of the UAV is improved.

[0084] It should be noted that each battery module is provided with one combining output circuit, one comparison circuit, and one reverse charging circuit. The battery module can be multiple, and the corresponding combining output circuit, comparison circuit, and reverse charging circuit are also provided multiple. In the following embodiment, the back electromotive force electric energy recovery circuit including two battery modules is taken as an example for detailed description.

[0085] Please refer to Figure 2 , Figure 2The application provides a back electromotive force electric energy recovery circuit structure diagram including two battery modules. The back electromotive force electric energy recovery circuit includes a first battery module, a second battery module, a first combined output circuit, a second combined output circuit, a first comparison circuit, a second comparison circuit, a first reverse charging circuit and a second reverse charging circuit.

[0086] In some optional embodiments, a control signal logic circuit is further included; an output end of the first comparison circuit is connected to a first end of the control signal logic circuit, an output end of the second comparison circuit is connected to a second end of the control signal logic circuit, a third end of the control signal logic circuit is connected to a second end of the first reverse charging circuit, and the third end of the control signal logic circuit is also connected to a second end of the second reverse charging circuit.

[0087] In the technical scheme, the control signal logic circuit outputs corresponding control signals according to comparison results of the first comparison circuit and the second comparison circuit, and controls the opening or closing of the first reverse charging circuit and the second reverse charging circuit.

[0088] Please refer to Figure 5 and Figure 6 , Figure 5 The application provides a first comparison circuit structure diagram, Figure 6 The application provides a second comparison circuit structure diagram.

[0089] In some optional embodiments, the first comparison circuit includes a first comparator U1 and a third comparator U3; the second comparison circuit includes a second comparator U2 and a fourth comparator U4; an output end Vbat1 of the first battery module is connected to a VIN- end of the first comparator U1, a VIN+ end of the first comparator U1 is connected to an output voltage end VCC_POWER; the output end Vbat1 of the first battery module is connected to a VIN- end of the third comparator U3, a VIN+ end of the third comparator U3 is connected to a third end of the first combined output circuit; an output end Vbat2 of the second battery module is connected to a VIN- end of the second comparator U2, a VIN+ end of the second comparator U2 is connected to the output voltage end VCC_POWER; the output end Vbat2 of the second battery module is connected to a VIN- end of the fourth comparator U4, and a VIN+ end of the fourth comparator U4 is connected to a third end of the second combined output circuit.

[0090] In the above technical solution, in the first comparison circuit, the voltage Vbat1 of the first battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat1 of the first battery module is compared with the third terminal voltage Vgate1 of the first combined output circuit. When Vout>Vbat1, the first comparator U1 output end OUT_O_1 outputs a high level signal; when VoutVbat1, the third comparator U3 outputs a high level signal; when Vgate1Vbat1, the third comparator U3 outputs a low level signal.

[0091] In the second comparison circuit, the voltage Vbat2 of the second battery module is compared with the output voltage Vout of the output voltage terminal VCC_POWER, and the voltage Vbat2 of the second battery module is compared with the third terminal voltage Vgate2 of the second combined output circuit. When Vout>Vbat2, the second comparator U2 output end OUT_O_2 outputs a high level signal; when VoutVbat2, the fourth comparator U4 outputs a high level signal; when Vgate2Vbat2, the fourth comparator U4 outputs a low level signal.

[0092] Among them, the first comparator U1, the second comparator U2, the third comparator U3 and the fourth comparator U4 can adopt the rail-to-rail low delay high-speed comparator SGM8743, which can quickly respond to the change of voltage in this circuit application, so as to quickly and effectively open the MOS tube in the reverse charging circuit.

[0093] Please refer to Figure 7 , Figure 7 The control signal logic circuit structure diagram provided by an embodiment of the application.

[0094] In some optional embodiments, the control signal logic circuit includes an AND gate module U7 and an OR gate module U8; the output end of the first comparator U1 is connected to the first end (A pin) of the AND gate module U7, and the output end of the second comparator U2 is connected to the second end (B pin) of the AND gate module U7; the output end of the third comparator U3 is connected to the first end (A pin) of the OR gate module U8, and the output end of the fourth comparator U4 is connected to the second end (B pin) of the OR gate module U8.

[0095] In the technical solution, Vout>Vbat1 and Vout>Vbat2, the AND gate module U7 outputs high level; VoutVbat1 and / or Vout>Vbat2, the AND gate module U7 outputs low level; Vgate1>Vbat1 and / or Vgate2>Vbat2, the OR gate module U8 outputs high level; Vgate1Vbat1 and Vgate2Vbat2, the OR gate module U8 outputs low level. Please refer to Figure 3 , Figure 3 The first combined output circuit structure diagram provided by the embodiment of the application is shown in FIG. 2.

[0096] In some optional embodiments, the first combined output circuit includes a first MOS tube Q1, a third MOS tube Q3 and a first ORing controller U5.

[0097] The GATE end Vgate1 of the first ORing controller U5 is connected to the G end of the first MOS tube Q1 and the G end of the third MOS tube Q3, the S end of the first MOS tube Q1 and the S end of the third MOS tube Q3 are connected to the output end Vbat1 of the first battery module, and the D end of the first MOS tube Q1 and the D end of the third MOS tube Q3 are connected to the output voltage end VCC_POWER.

[0098] In the technical solution, two MOSFETs are connected in parallel outside the first ORing controller U5, which improves the current carrying capacity of the circuit. The first ORing controller U5 provides charge pump gate drive for the external N-channel MOSFET (the first MOS tube Q1 and the third MOS tube Q3) to turn off the first MOS tube Q1 and the third MOS tube Q3 when the current flows in the opposite direction.

[0099] The ORing (multiple selection) controller can intelligently select the conduction path between multiple input sources while avoiding the generation of reverse current. This feature makes the ORing circuit have wide application prospects in power management and signal transmission.

[0100] Please refer to Figure 4 , Figure 4 The second combined output circuit structure diagram provided by the embodiment of the application is shown in FIG. 3.

[0101] In some optional embodiments, the second combined output circuit includes a second MOS tube Q2, a fourth MOS tube Q4 and a second ORing controller U6.

[0102] The GATE end Vgate2 of the second ORing controller U6 is connected with the G end of the second MOS Q2 and the G end of the fourth MOS Q4, the S end of the second MOS Q2 and the S end of the fourth MOS Q4 are connected with the output end Vbat2 of the second battery module, and the D end of the second MOS Q2 and the D end of the fourth MOS Q4 are connected with the output voltage end VCC_POWER.

[0103] In the technical solution, the second ORing controller U6 is connected with two MOSFETs in parallel, thereby improving the current passing capacity of the circuit. The second ORing controller U6 provides charge pump gate drive for the external N-channel MOSFET (the second MOS Q2 and the fourth MOS Q4) to turn off the second MOS Q2 and the fourth MOS Q4 when the current flows reversely.

[0104] The first ORing controller U5 and the second ORing controller U6 can adopt a high-side ORing FET controller LM5050MK. When the LM5050MK is connected with the power supply in series, it is used as an ideal diode rectifier. The ORing controller can replace the diode rectifier in the power distribution network with the MOSFET, thereby reducing the power loss and the voltage drop. The device can be connected with a power supply of 5V to 75V and can withstand a transient voltage of up to 100V. The back electromotive force energy recovery circuit of the embodiment supports the hot plug of the battery, that is, the first battery module and the second battery module are completely separated. After one battery is removed, the other battery can still make the system work normally. Therefore, when the unmanned aerial vehicle ends one flight, the full battery can be replaced in sequence, so that the unmanned aerial vehicle can work continuously and the work efficiency is improved.

[0105] It should be noted that the first combining output logic circuit and the second combining output logic circuit of the embodiment are two MOS tubes connected in parallel outside the ORing controller. In some embodiments, a single MOS tube or a triode can also be connected outside the ORing controller.

[0106] Please refer to Figure 8 , Figure 8 The first reverse charging circuit structure diagram provided by the embodiment of the application.

[0107] In some optional embodiments, the first reverse charging circuit comprises: a fifth MOS Q5, a sixth MOS Q6, an eleventh MOS Q11, a twelfth MOS Q12, a fifteenth MOS Q15 and a sixteenth MOS Q16.

[0108] The output end Vbat1 of the first battery module is connected with the D end of the fifth MOS Q5, the S end of the fifth MOS Q5 is connected with the S end of the sixth MOS Q6, and the D end of the sixth MOS Q6 is connected with the output voltage end VCC_POWER.

[0109] The G pole of the fifth MOS Q5 is connected with the D pole of the eleventh MOS Q11, the S pole of the eleventh MOS Q11 is grounded, the G pole of the eleventh MOS Q11 is connected with the D pole of the fifteenth MOS Q15, the S pole of the fifteenth MOS Q15 is grounded, the G pole of the fifteenth MOS Q15 is connected with the output terminal OUT2 of the OR module U8, and the G pole of the eleventh MOS Q11 is also connected with the output terminal OUT1 of the AND module U7.

[0110] The G pole of the sixth MOS Q6 is connected with the D pole of the twelfth MOS Q12, the S pole of the twelfth MOS Q12 is grounded, the G pole of the twelfth MOS Q12 is connected with the D pole of the sixteenth MOS Q16, the S pole of the sixteenth MOS Q16 is grounded, and the G pole of the sixteenth MOS Q16 is connected with the output terminal OUT2 of the OR module U8. The G pole of the twelfth MOS Q12 is also connected with the output terminal OUT1 of the AND module U7.

[0111] In the above technical solution, Vout < Vbat1 and / or Vout < Vbat2, the AND module U7 outputs low level, the eleventh MOS Q11 and the twelfth MOS Q12 are closed, so that the fifth MOS Q5 and the sixth MOS Q6 are closed, and the first reverse charging circuit is closed.

[0112] Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first battery module and the second battery module is normally powered, the OR module U8 outputs high level, the fifteenth MOS Q15 and the sixteenth MOS Q16 are opened, the eleventh MOS Q11 and the twelfth MOS Q12 are closed, so that the fifth MOS Q5 and the sixth MOS Q6 are closed, and the first reverse charging circuit is closed.

[0113] Vgate1 < Vbat1 and Vgate2 < Vbat2, neither the first battery module nor the second battery module is powered, the OR module U8 outputs low level, the fifteenth MOS Q15 and the sixteenth MOS Q16 are closed, at this time, if Vout > Vbat1 and Vout > Vbat2, the AND module U7 outputs high level, the eleventh MOS Q11 and the twelfth MOS Q12 are opened, and the output voltage terminal VCC_POWER charges the first battery module through the first reverse charging circuit.

[0114] Please refer to Figure 9 , Figure 9 The second reverse charging circuit structure diagram provided by an embodiment of the present application.

[0115] In some alternative embodiments, the second reverse charging circuit comprises a seventh MOS Q7, an eighth MOS Q8, a ninth MOS Q9, a tenth MOS Q10, a thirteenth MOS Q13 and a fourteenth MOS Q14;

[0116] The output end Vbat2 of the second battery module is connected to the D pole of the seventh MOS Q7, the S pole of the seventh MOS Q7 is connected to the S pole of the eighth MOS Q8, and the D pole of the eighth MOS Q8 is connected to the output voltage end VCC_POWER.

[0117] The G pole of the seventh MOS Q7 is connected to the D pole of the ninth MOS Q9, the S pole of the ninth MOS Q9 is grounded, the G pole of the ninth MOS Q9 is connected to the D pole of the thirteenth MOS Q13, the S pole of the thirteenth MOS Q13 is grounded, the G pole of the thirteenth MOS Q13 is connected to the output end OUT2 of the OR module U8, and the G pole of the ninth MOS Q9 is also connected to the output end OUT1 of the AND module U7.

[0118] The G pole of the eighth MOS Q8 is connected to the D pole of the tenth MOS Q10, the S pole of the tenth MOS Q10 is grounded, the G pole of the tenth MOS Q10 is connected to the D pole of the fourteenth MOS Q14, the S pole of the fourteenth MOS Q14 is grounded, the G pole of the fourteenth MOS Q14 is connected to the output end OUT2 of the OR module U8, and the G pole of the tenth MOS Q10 is also connected to the output end OUT1 of the AND module U7.

[0119] In the above technical solution, Vout < Vbat1 and / or Vout < Vbat2, the AND module U7 outputs a low level, the ninth MOS Q9 and the tenth MOS Q10 are closed, the seventh MOS Q7 and the eighth MOS Q8 are closed, and the second reverse charging circuit is closed.

[0120] Vgate1 > Vbat1 and / or Vgate2 > Vbat2, at least one of the first battery module and the second battery module is normally powered, the OR module U8 outputs a high level, the thirteenth MOS Q13 and the fourteenth MOS Q14 are opened, the ninth MOS Q9 and the tenth MOS Q10 are closed, the seventh MOS Q7 and the eighth MOS Q8 are closed, and the second reverse charging circuit is closed.

[0121] Vgate1 < Vbat1 and Vgate2 < Vbat2, the first battery module and the second battery module are not powered, or the gate module U8 outputs a low level, the thirteenth MOS Q13 and the fourteenth MOS Q14 are closed, at this time, if Vout > Vbat1 and Vout > Vbat2, the gate module U7 outputs a high level, the ninth MOS Q9 and the tenth MOS Q10 are opened; the output voltage end VCC_POWER charges the second battery module through the second reverse charging circuit.

[0122] Wherein, the fifth MOS Q5 and the sixth MOS Q6 are P-channel MOS, the ninth MOS Q9, the tenth MOS Q10, the eleventh MOS Q11, the twelfth MOS Q12, the thirteenth MOS Q13, the fourteenth MOS Q14, the fifteenth MOS Q15 and the sixteenth MOS Q16 are N-channel MOS.

[0123] It should be clear that the first reverse charging circuit and the second reverse charging circuit of the embodiment both adopt the mode of symmetric P-channel MOS and two-stage N-channel MOS, in some other embodiments, MOS and two-stage MOS mode can also be used, and a transistor can also be used.

[0124] In the embodiment, if Vout > Vbat1 and Vout > Vbat2, the first reverse charging circuit and the second reverse charging circuit are opened, and the first battery module and the second battery module are charged.

[0125] Please refer to Figure 10 , Figure 11 and Figure 12 , Figure 10 the control signal logic circuit structure diagram provided by another embodiment of the application; Figure 11 the first reverse charging circuit structure diagram provided by another embodiment of the application; Figure 12 the second reverse charging circuit structure diagram provided by another embodiment of the application.

[0126] The difference between the embodiment and the above embodiments is:

[0127] The control signal logic circuit of the embodiment further comprises a ninth comparator U9 and a tenth comparator U10.

[0128] Wherein, the VIN+ end of the ninth comparator U9 is connected with the output end Vbat2 of the second battery module, and the VIN- end of the ninth comparator U9 is connected with the output end of the first comparator U1; the VIN+ end of the tenth comparator U10 is connected with the output end Vbat1 of the first battery module, and the VIN- end of the tenth comparator U10 is connected with the output end Vbat2 of the second battery module.

[0129] The first reverse charging circuit of the embodiment comprises a fifth MOS tube Q5, a sixth MOS tube Q6, an eleventh MOS tube Q11, a twelfth MOS tube Q12, a fifteenth MOS tube Q15 and a sixteenth MOS tube Q16.

[0130] The output end Vbat1 of the first battery module is connected to the D pole of the fifth MOS tube Q5, the S pole of the fifth MOS tube Q5 is connected to the S pole of the sixth MOS tube Q6, the D pole of the sixth MOS tube Q6 is connected to the output voltage end VCC_POWER; the G pole of the fifth MOS tube Q5 is connected to the D pole of the eleventh MOS tube Q11, the S pole of the eleventh MOS tube Q11 is grounded, the G pole of the eleventh MOS tube Q11 is connected to the D pole of the fifteenth MOS tube Q15, the S pole of the fifteenth MOS tube Q15 is grounded; the output end OUT2 of the OR module is connected to the G pole of the fifteenth MOS tube Q15 through a diode D8, the output end OUT_BB2 of the tenth comparator U10 is connected to the G pole of the fifteenth MOS tube Q15 through the diode D8; the output end OUT1 of the AND module is connected to the G pole of the eleventh MOS tube Q11 through a diode D4, the output end OUT_BB1 of the ninth comparator U9 is connected to the G pole of the eleventh MOS tube Q11 through the diode D4; the G pole of the sixth MOS tube Q6 is connected to the D pole of the twelfth MOS tube Q12, the S pole of the twelfth MOS tube Q12 is grounded, the G pole of the twelfth MOS tube Q12 is connected to the D pole of the sixteenth MOS tube Q16, the S pole of the sixteenth MOS tube Q16 is grounded; the output end OUT2 of the OR module is connected to the G pole of the sixteenth MOS tube Q16 through a diode D9, the output end OUT_BB2 of the tenth comparator U10 is connected to the G pole of the sixteenth MOS tube through the diode D9; the output end OUT1 of the AND module is connected to the G pole of the twelfth MOS tube through a diode D5, the output end OUT_BB1 of the ninth comparator U9 is connected to the G pole of the twelfth MOS tube Q12 through the diode D5.

[0131] The second reverse charging circuit of the embodiment comprises a seventh MOS tube Q7, an eighth MOS tube Q8, a ninth MOS tube Q9, a tenth MOS tube Q10, a thirteenth MOS tube Q13 and a fourteenth MOS tube Q14.

[0132] The output end Vbat2 of the second battery module is connected to the D pole of the seventh MOS tube Q7, the S pole of the seventh MOS tube Q7 is connected to the S pole of the eighth MOS tube Q8, the D pole of the eighth MOS tube Q8 is connected to the output voltage end VCC_POWER; the G pole of the seventh MOS tube Q7 is connected to the D pole of the ninth MOS tube Q9, the S pole of the ninth MOS tube Q9 is grounded, the G pole of the ninth MOS tube Q9 is connected to the D pole of the thirteenth MOS tube Q13, the S pole of the thirteenth MOS tube Q13 is grounded; the G pole of the thirteenth MOS tube is connected to the G pole of the thirteenth MOS tube Q13 through the diode D10 after the output end OUT2 of the OR module, the G pole of the thirteenth MOS tube Q13 is connected to the G pole of the thirteenth MOS tube Q13 through the diode D10 after the output end OUT_BB1 of the ninth comparator U9; the G pole of the ninth MOS tube Q9 is connected to the G pole of the ninth MOS tube Q9 through the diode D6 after the output end OUT1 of the AND module, the G pole of the ninth MOS tube Q9 is connected to the G pole of the ninth MOS tube Q9 through the diode D6 after the output end OUT_BB2 of the tenth comparator U10; the G pole of the eighth MOS tube Q8 is connected to the D pole of the tenth MOS tube Q10, the S pole of the tenth MOS tube Q10 is grounded, the G pole of the tenth MOS tube Q10 is connected to the D pole of the fourteenth MOS tube Q14, the S pole of the fourteenth MOS tube Q14 is grounded; the G pole of the fourteenth MOS tube Q14 is connected to the G pole of the fourteenth MOS tube Q14 through the diode D11 after the output end OUT2 of the OR module, the G pole of the fourteenth MOS tube Q14 is connected to the G pole of the fourteenth MOS tube Q14 through the diode D11 after the output end OUT_BB1 of the ninth comparator U9; the G pole of the tenth MOS tube Q10 is connected to the G pole of the tenth MOS tube Q10 through the diode D7 after the output end OUT1 of the AND module, the G pole of the tenth MOS tube Q10 is connected to the G pole of the tenth MOS tube Q10 through the diode D7 after the output end OUT_BB2 of the tenth comparator U10.

[0133] In the embodiment, the ninth comparator U9 and the tenth comparator U10 are arranged to open or close the first reverse charging circuit and the second reverse charging circuit: if Vout>Vbat1, Vout>Vbat2, Vbat2>Vbat1, the first battery module is charged; if Vout>Vbat1, Vout>Vbat2, Vbat1>Vbat2, the second battery module is charged. The embodiment can ensure that the low-voltage battery is preferentially charged when the reverse electromotive force electric energy is absorbed.

[0134] The embodiment of the present application provides a kind of unmanned plane, comprising: at least two battery modules, flight control system, and the reverse electromotive force electric energy recovery circuit of any one of the unmanned plane of above.

[0135] The embodiment of the present application provides a kind of reverse electromotive force electric energy recovery method of unmanned plane, comprising:

[0136] Utilize the combined output circuit, and the first battery voltage is output to load power supply after the multiple battery voltages are combined; wherein, first battery voltage is the highest voltage in multiple battery voltages;

[0137] When the unmanned aerial vehicle is decelerated to generate a back electromotive force voltage, each battery voltage is detected by using a comparison circuit, if each battery voltage is less than the back electromotive force voltage, the reverse charging circuit corresponding to at least one battery module is opened, and the back electromotive force voltage charges the battery module.

[0138] In some optional embodiments, opening the reverse charging circuit corresponding to at least one battery module comprises:

[0139] opening the reverse charging circuit corresponding to all battery modules;

[0140] or, opening the reverse charging circuit corresponding to the battery module with the lowest battery voltage.

[0141] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only illustrative, for example, the division of the units is only a logical function division, and in actual implementation, another division mode can be used, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some communication interfaces, devices or units, which can be electrical, mechanical or other forms.

[0142] In addition, the units described as separate components can or can not be physically separate, and the components shown as units can or can not be physical units, that is, they can be located in one place, or they can be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiments.

[0143] Furthermore, the functional modules in each embodiment of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0144] In this paper, the relationship terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between the entities or operations.

[0145] The above description is only for the embodiments of the present application and is not used to limit the protection scope of the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A back EMF energy recovery circuit for a drone, characterized in that, include: At least two combined output circuits, at least two comparator circuits, and at least two reverse charging circuits; The first terminal of the combining output circuit is connected to the output terminal of a battery module. The first terminal of the combining output circuit is also connected to the first terminal of the comparator circuit. The second terminal of the combining output circuit is connected to the third terminal of the comparator circuit. The third terminal of the combining output circuit is connected to the second terminal of the comparator circuit. The fourth terminal of the comparator circuit is connected to the second terminal of the reverse charging circuit. The second terminal of the combining output circuit is also connected to the third terminal of the reverse charging circuit. The first terminal of the reverse charging circuit is connected to the input terminal of the battery module. The second terminal of the combining output circuit is also connected to the flight control system. The at least two combined output circuits are used to combine at least two battery voltages and output a first battery voltage to power the load; wherein, the first battery voltage is the highest voltage among the at least two battery voltages; The at least two comparison circuits are used to detect whether the voltage of each battery is less than the back electromotive force voltage when the flight control system generates a back electromotive force voltage. The at least two reverse charging circuits are used to open at least one of the reverse charging circuits corresponding to the battery module when the voltage of each battery is less than the back electromotive force voltage, so that the back electromotive force voltage charges the battery module.

2. The circuit as described in claim 1, characterized in that, It also includes control signal logic circuits; The output of the first comparator circuit is connected to the first terminal of the control signal logic circuit, the output of the second comparator circuit is connected to the second terminal of the control signal logic circuit, the third terminal of the control signal logic circuit is connected to the second terminal of the first reverse charging circuit, and the third terminal of the control signal logic circuit is also connected to the second terminal of the second reverse charging circuit.

3. The circuit as described in claim 2, characterized in that, The first comparison circuit includes a first comparator and a third comparator; the second comparison circuit includes a second comparator and a fourth comparator. The output terminal of the first battery module is connected to the VIN- terminal of the first comparator, and the VIN+ terminal of the first comparator is connected to the output voltage terminal. The output terminal of the first battery module is connected to the VIN- terminal of the third comparator, and the VIN+ terminal of the third comparator is connected to the third terminal of the first combined output circuit. The output terminal of the second battery module is connected to the VIN- terminal of the second comparator, and the VIN+ terminal of the second comparator is connected to the output voltage terminal. The output terminal of the second battery module is connected to the VIN- terminal of the fourth comparator, and the VIN+ terminal of the fourth comparator is connected to the third terminal of the second combined output circuit.

4. The circuit as described in claim 3, characterized in that, The control signal logic circuit includes an AND gate module and an OR gate module; The output of the first comparator is connected to the first terminal of the AND gate module, and the output of the second comparator is connected to the second terminal of the AND gate module; The output of the third comparator is connected to the first terminal of the OR gate module, and the output of the fourth comparator is connected to the second terminal of the OR gate module.

5. The circuit as described in claim 4, characterized in that, The first output circuit includes a first MOSFET, a third MOSFET, and a first ORing controller; The GATE terminal of the first ORing controller is connected to the gate (G) of the first MOSFET and the gate (G) of the third MOSFET. The source (S) terminals of the first MOSFET and the third MOSFET are connected to the output terminal of the first battery module. The drain (D) terminals of the first MOSFET and the third MOSFET are connected to the output voltage terminal.

6. The circuit as described in claim 4, characterized in that, The second output circuit includes a second MOSFET, a fourth MOSFET, and a second ORing controller; The GATE terminal of the second ORing controller is connected to the gate (G) of the second MOSFET and the gate (G) of the fourth MOSFET. The source (S) terminals of the second MOSFET and the fourth MOSFET are connected to the output terminal of the second battery module. The drain (D) terminals of the second MOSFET and the fourth MOSFET are connected to the output voltage terminal.

7. The circuit as described in claim 4, characterized in that, The first reverse charging circuit includes: a fifth MOSFET, a sixth MOSFET, an eleventh MOSFET, a twelfth MOSFET, a fifteenth MOSFET, and a sixteenth MOSFET; The output terminal of the first battery module is connected to the drain (D) of the fifth MOSFET, the source (S) of the fifth MOSFET is connected to the source (S) of the sixth MOSFET, and the drain (D) of the sixth MOSFET is connected to the output voltage terminal. The gate (G) of the fifth MOSFET is connected to the drain (D) of the eleventh MOSFET, the source (S) of the eleventh MOSFET is grounded, the gate (G) of the eleventh MOSFET is connected to the drain (D) of the fifteenth MOSFET, the source (S) of the fifteenth MOSFET is grounded, the gate (G) of the fifteenth MOSFET is connected to the output of the OR gate module, and the gate (G) of the eleventh MOSFET is also connected to the output of the AND gate module. The gate (G) of the sixth MOSFET is connected to the drain (D) of the twelfth MOSFET, the source (S) of the twelfth MOSFET is grounded, the gate (G) of the twelfth MOSFET is connected to the drain (D) of the sixteenth MOSFET, the source (S) of the sixteenth MOSFET is grounded, the gate (G) of the sixteenth MOSFET is connected to the output of the OR gate module, and the gate (G) of the twelfth MOSFET is also connected to the output of the AND gate module.

8. The circuit as described in claim 4, characterized in that, The second reverse charging circuit includes: a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET; The output terminal of the second battery module is connected to the drain (D) of the seventh MOSFET, the source (S) of the seventh MOSFET is connected to the source (S) of the eighth MOSFET, and the drain (D) of the eighth MOSFET is connected to the output voltage terminal. The gate (G) of the seventh MOS transistor is connected to the drain (D) of the ninth MOS transistor, the source (S) of the ninth MOS transistor is grounded, the gate (G) of the ninth MOS transistor is connected to the drain (D) of the thirteenth MOS transistor, the source (S) of the thirteenth MOS transistor is grounded, the gate (G) of the thirteenth MOS transistor is connected to the output of the OR gate module, and the gate (G) of the ninth MOS transistor is also connected to the output of the AND gate module. The gate (G) of the eighth MOS transistor is connected to the drain (D) of the tenth MOS transistor, the source (S) of the tenth MOS transistor is grounded, the gate (G) of the tenth MOS transistor is connected to the drain (D) of the fourteenth MOS transistor, the source (S) of the fourteenth MOS transistor is grounded, the gate (G) of the fourteenth MOS transistor is connected to the output of the OR gate module, and the gate (G) of the tenth MOS transistor is also connected to the output of the AND gate module.

9. The circuit as described in claim 4, characterized in that, The control signal logic circuit further includes: a ninth comparator and a tenth comparator; The VIN+ terminal of the ninth comparator is connected to the output terminal of the second battery module, and the VIN- terminal of the ninth comparator is connected to the output terminal of the first comparator; the VIN+ terminal of the tenth comparator is connected to the output terminal of the first battery module, and the VIN- terminal of the tenth comparator is connected to the output terminal of the second battery module.

10. The circuit as described in claim 9, characterized in that, The first reverse charging circuit includes: a fifth MOSFET, a sixth MOSFET, an eleventh MOSFET, a twelfth MOSFET, a fifteenth MOSFET, and a sixteenth MOSFET; The output terminal of the first battery module is connected to the drain (D) of the fifth MOSFET, the source (S) of the fifth MOSFET is connected to the source (S) of the sixth MOSFET, and the drain (D) of the sixth MOSFET is connected to the output voltage terminal. The gate (G) of the fifth MOSFET is connected to the drain (D) of the eleventh MOSFET, the source (S) of the eleventh MOSFET is grounded, the gate (G) of the eleventh MOSFET is connected to the drain (D) of the fifteenth MOSFET, and the source (S) of the fifteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the fifteenth MOSFET via a diode; the output of the tenth comparator is connected to the gate (G) of the fifteenth MOSFET via a diode; the output of the AND gate module is connected to the gate (G) of the eleventh MOSFET via a diode; and the output of the ninth comparator is connected to the gate (G) of the eleventh MOSFET via a diode. The gate (G) of the sixth MOSFET is connected to the drain (D) of the twelfth MOSFET, the source (S) of the twelfth MOSFET is grounded, the gate (G) of the twelfth MOSFET is connected to the drain (D) of the sixteenth MOSFET, and the source (S) of the sixteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the sixteenth MOSFET via a diode, the output of the tenth comparator is connected to the gate (G) of the sixteenth MOSFET via a diode, the output of the AND gate module is connected to the gate (G) of the twelfth MOSFET via a diode, and the output of the ninth comparator is connected to the gate (G) of the twelfth MOSFET via a diode.

11. The circuit as described in claim 9, characterized in that, The second reverse charging circuit includes: a seventh MOSFET, an eighth MOSFET, a ninth MOSFET, a tenth MOSFET, a thirteenth MOSFET, and a fourteenth MOSFET; The output terminal of the second battery module is connected to the drain (D) of the seventh MOSFET, the source (S) of the seventh MOSFET is connected to the source (S) of the eighth MOSFET, and the drain (D) of the eighth MOSFET is connected to the output voltage terminal. The gate (G) of the seventh MOSFET is connected to the drain (D) of the ninth MOSFET, the source (S) of the ninth MOSFET is grounded, the gate (G) of the ninth MOSFET is connected to the drain (D) of the thirteenth MOSFET, and the source (S) of the thirteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the thirteenth MOSFET via a diode, the output of the ninth comparator is connected to the gate (G) of the thirteenth MOSFET via a diode, the output of the AND gate module is connected to the gate (G) of the ninth MOSFET via a diode, and the output of the tenth comparator is connected to the gate (G) of the ninth MOSFET via a diode. The gate (G) of the eighth MOSFET is connected to the drain (D) of the tenth MOSFET, the source (S) of the tenth MOSFET is grounded, the gate (G) of the tenth MOSFET is connected to the drain (D) of the fourteenth MOSFET, and the source (S) of the fourteenth MOSFET is grounded; the output of the OR gate module is connected to the gate (G) of the fourteenth MOSFET via a diode, the output of the ninth comparator is connected to the gate (G) of the fourteenth MOSFET via a diode; the output of the AND gate module is connected to the gate (G) of the tenth MOSFET via a diode, and the output of the tenth comparator is connected to the gate (G) of the tenth MOSFET via a diode.

12. A drone, characterized in that, include: At least two battery modules, a flight control system, and a back EMF energy recovery circuit for a drone as described in any one of claims 1-11.

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