Radio frequency arbitrary waveform transmitting unit, related device, quantum analyzer and quantum measurement and control cabinet

Abstract

The utility model discloses a radio frequency arbitrary waveform transmitting unit, a related device and a quantum measurement and control cabinet. The radio frequency arbitrary waveform transmitting unit comprises a first functional mainboard and at least one first mixer arranged outside the first functional mainboard; the first function mainboard is used for receiving radio frequency waveform parameter information sent by the upper computer, generating at least one pair of first direct current signals and at least two pairs of first differential pulse signals with preset waveforms according to the radio frequency waveform parameter information after receiving the trigger signal, and generating a first microwave signal, mixing each pair of first differential pulse signals with an adaptive first direct current signal to obtain at least two paths of first single-ended pulse signals with the phase difference of 90 degrees, outputting the first single-ended pulse signals to the corresponding first frequency mixers, and outputting the generated first microwave signals to the corresponding first frequency mixers; and the first mixer is used for mixing the two paths of first single-ended pulse signals and the first microwave signal to obtain a radio frequency signal.

Description

Technical Field

[0001] This utility model relates to the field of quantum computing technology, and in particular to a radio frequency arbitrary waveform transmitting unit, related devices, and quantum measurement and control cabinet for use in quantum measurement and control systems. Background Technology

[0002] A quantum computer mainly consists of a quantum processor, a quantum measurement and control system, and quantum software algorithms. The quantum processor is composed of a series of qubits (qubits) and performs calculations through quantum gate operations. A qubit is the basic unit of quantum information. Unlike classical computers, which can only represent 0 or 1, a qubit can simultaneously represent both 0 and 1. This property is called quantum superposition, which makes its computational performance more powerful. Furthermore, increasing the number of qubits can exponentially improve the performance of a quantum computer.

[0003] Quantum measurement and control systems are important tools for testing, screening, performance characterization, and calibration of quantum processors. They allow users to test and calibrate quantum processors using classical experiments, support automatic data processing and analysis, and enable users to create custom experiments to test quantum processors. They also enable comprehensive control and measurement of quantum processors. Utility Model Content

[0004] This utility model provides a radio frequency arbitrary waveform transmitting unit, related devices, and a quantum measurement and control cabinet.

[0005] In a first aspect, this utility model provides a radio frequency arbitrary waveform transmitting unit, including: a first functional motherboard and at least one first mixer disposed outside the first functional motherboard;

[0006] The first functional motherboard is connected to the at least one first mixer;

[0007] The first functional motherboard is used to receive radio frequency waveform parameter information sent by the host computer, and after receiving the trigger signal, generate at least one pair of first DC signals and at least two pairs of preset waveform first differential pulse signals according to the radio frequency waveform parameter information, and generate a first microwave signal. Each pair of first differential pulse signals is mixed with a phase-matched first DC signal to obtain at least two first single-ended pulse signals with a phase difference of 90°, and output to the corresponding first mixer. The first microwave signal generated is also output to the corresponding first mixer.

[0008] The first mixer has a co-phase port and a quadrature phase port on one side of its cavity, and a local oscillator port and a radio frequency port on the other side. The co-phase port and the quadrature phase port are respectively connected to two signal output ports on the first functional motherboard to receive two first single-ended pulse signals with a 90° phase difference output from the two signal output ports. The local oscillator port is used to receive the first microwave signal. The first mixer performs mixing processing on the received two first single-ended pulse signals with a 90° phase difference and the first microwave signal to obtain a radio frequency signal, which is output through the radio frequency port.

[0009] In one embodiment, the first functional motherboard includes a first carrier board and a first main control chip, a first digital-to-analog converter, a first DC generation chip, a first local oscillator microwave source, and at least one pair of first combiners disposed on the first carrier board;

[0010] The first main control chip is connected to the first digital-to-analog converter, the first DC generator chip, and the first local oscillator microwave source, respectively;

[0011] The first digital-to-analog converter is connected to the at least one pair of first combiners;

[0012] The output of each pair of the first combiners is connected to the in-phase port and the quadrature-phase port of the corresponding first mixer, respectively, wherein the in-phase port and the quadrature-phase port are used to receive the two first single-ended pulse signals with a phase difference of 90°.

[0013] The first DC generating chip is connected to the at least one pair of first combiners;

[0014] The first local oscillator microwave source is connected to the at least one first mixer;

[0015] The first main control chip is used to receive radio frequency waveform parameter information sent by the host computer, and after receiving the trigger signal, according to the radio frequency waveform parameter information, send a first pulse signal generation instruction signal to the first digital-to-analog converter, send a first microwave signal generation instruction to the first local oscillator microwave source, and send a first DC generation control instruction to the first DC generation chip.

[0016] The first digital-to-analog converter is used to generate at least two pairs of preset waveforms of first differential pulse signals according to the first pulse signal generation instruction;

[0017] The first DC generation chip is used to generate at least one pair of first DC signals according to the first DC generation control command;

[0018] The first combiner is used to mix a pair of the first differential pulse signals and a phase-matched first DC signal to obtain one of the two first single-ended pulse signals with a 90° phase difference, and outputs it to the corresponding first mixer.

[0019] The first local oscillator microwave source is used to generate at least one first microwave signal according to the first microwave signal generation instruction, and output them to the corresponding first mixer.

[0020] In one embodiment, the first combiner includes a first operational amplifier;

[0021] The first functional motherboard also includes at least one pair of first filters disposed on the first carrier board;

[0022] The first DC generation chip is connected to the at least one pair of first filters;

[0023] The first filter is connected to the corresponding first operational amplifier;

[0024] The first filter is used to filter the first DC signal to obtain a filtered first DC signal;

[0025] The first operational amplifier is used to combine a pair of the first differential pulse signals and a filtered first DC signal with phase adaptation to obtain one of the two first single-ended pulse signals with a 90° phase difference.

[0026] In one embodiment, the non-inverting input of the first operational amplifier is used to receive one of a pair of first differential pulse signals and a filtered, phase-matched first DC signal, and the inverting input of the first operational amplifier is used to receive the other of the pair of first differential pulse signals.

[0027] In one embodiment, the first functional motherboard further includes a first network port chip disposed on the first carrier board;

[0028] The first network port chip is connected to the first main control chip and is used to communicate with the host computer through an external network communication device. The chip receives the radio frequency waveform parameter information sent by the host computer through the network communication device and outputs it to the first main control chip.

[0029] In one embodiment, the first functional motherboard further includes a first RS485 / 422 communication interface disposed on the first carrier board;

[0030] The first RS485 / 422 communication interface is connected to the first main control chip and is used for communication with the host computer.

[0031] In one embodiment, the first functional motherboard further includes a first clock chip disposed on the first carrier board, used to convert the second clock signal into a third clock signal and output the third clock signal to the first main control chip, the first digital-to-analog converter and the first local oscillator microwave source.

[0032] In one embodiment, the first functional motherboard further includes a first trigger buffer chip disposed on the first carrier board, used to receive the trigger signal, perform buffer enhancement processing on the received trigger signal, and output the processed trigger signal to the first main control chip.

[0033] In one embodiment, the first functional motherboard further includes a first synchronization buffer chip disposed on the first carrier board, used to receive a synchronization signal, perform buffering and enhancement processing on the synchronization signal, and output the processed synchronization signal to the first main control chip.

[0034] In one embodiment, the cavity of the first mixer includes a circuit board and an IQ mixer chip.

[0035] The IQ mixer chip is disposed on the circuit board. The in-phase pin of the IQ mixer chip is connected to the in-phase port, the quadrature phase pin of the IQ mixer chip is connected to the quadrature phase port, the local oscillator pin of the IQ mixer chip is connected to the local oscillator port, and the radio frequency pin of the IQ mixer chip is connected to the radio frequency port.

[0036] The in-phase port and the quadrature phase port are respectively connected to the corresponding first combiner. The in-phase port is used to receive one of the two first single-ended pulse signals with a phase difference of 90°, and the quadrature phase port is used to receive the other of the two first single-ended pulse signals with a phase difference of 90°.

[0037] The local oscillator port is connected to the first local oscillator microwave source and is used to receive the first microwave signal;

[0038] The radio frequency port is used to output radio frequency signals.

[0039] In one embodiment, the circuit board has a ground hole, and the unused pins of the IQ mixer chip are grounded through the ground hole of the circuit board.

[0040] In one embodiment, the second clock signal is a source clock signal, and the third clock signal includes any one or more of the system clock signal, device clock signal, and sampling clock signal;

[0041] The first functional motherboard further includes a first buffer circuit for receiving a first clock signal output from an external clock distribution unit and buffering and enhancing the first clock signal to obtain a second clock signal. The first buffer circuit is disposed outside the first clock chip or integrated into the first clock chip.

[0042] The first local oscillator microwave source is a chip, which is disposed on the first carrier board.

[0043] In one embodiment, the radio frequency arbitrary waveform transmitting unit further includes at least one first attenuator disposed outside the first functional motherboard;

[0044] The first attenuator is connected to the corresponding first mixer and is used to adjust the amplitude of the radio frequency signal.

[0045] In one embodiment, the radio frequency signal generated by the radio frequency arbitrary waveform transmitting unit is used to provide a quantum processor, and the radio frequency signal is used as a quantum bit driving signal to drive the quantum bit to switch between the |0> state and the |1> state.

[0046] In one embodiment, the frequency range of the radio frequency signal is 4 GHz to 6 GHz.

[0047] In one embodiment, the radio frequency signal is used as a read-in signal to read the frequency of the resonant cavity coupled to the quantum bit.

[0048] In one embodiment, the frequency range of the radio frequency signal is 6 GHz to 8 GHz.

[0049] In one embodiment, the frequency range of the radio frequency signal output by the radio frequency arbitrary waveform transmitting unit is 3GHz to 8GHz, and the first mixer is an IQ mixer.

[0050] Secondly, this utility model provides a radio frequency arbitrary waveform transmitting device, including: a first drawer box and the above-mentioned radio frequency arbitrary waveform transmitting unit;

[0051] The first functional motherboard of the radio frequency arbitrary waveform transmitting unit is housed in the first drawer box;

[0052] Furthermore, at least one of the first mixers connected to the first functional motherboard is housed in the first drawer box or disposed outside the first drawer box.

[0053] In one embodiment, the radio frequency arbitrary waveform transmitter is a radio frequency arbitrary waveform transmitter used in a quantum measurement and control system.

[0054] Thirdly, this utility model embodiment provides a quantum analyzer, including the above-mentioned radio frequency arbitrary waveform transmitting unit and acquisition subunit. The radio frequency arbitrary waveform transmitting unit is used to transmit a read-in signal to the resonant cavity in the quantum processor, and the acquisition subunit is used to receive the read-out signal output from the quantum processor to obtain quantum computing results.

[0055] In one embodiment, the quantum analyzer further includes: a third drawer box;

[0056] The first functional motherboard of the radio frequency arbitrary waveform transmitting unit is housed in the third drawer box;

[0057] Furthermore, at least one of the first mixers connected to the first functional motherboard is housed in the third drawer box or disposed outside the third drawer box.

[0058] Fourthly, this utility model embodiment provides a quantum measurement and control cabinet, including a rack, a radio frequency arbitrary waveform transmitting device as described above, and / or a quantum analyzer as described above;

[0059] The first drawer box of the radio frequency arbitrary waveform transmitter and / or the third drawer box of the quantum analyzer are arranged inside the rack.

[0060] The beneficial effects of the above-mentioned technical solutions provided by the embodiments of this utility model include at least the following:

[0061] The radio frequency arbitrary waveform transmitting unit for a quantum measurement and control system provided in this embodiment generates a first differential pulse signal, a first DC signal, and a first microwave signal through a first functional motherboard. It mixes corresponding numbers of the first differential pulse signals and the first DC signal to obtain two first single-ended pulse signals with a 90° phase difference, which are output to a first mixer. Further, the first mixer has a co-phase port and a quadrature phase port on one side of its cavity, and a local oscillator port and a radio frequency port on the other side. The co-phase port and the quadrature phase port are respectively connected to two signal output ports on the first functional motherboard to receive the two first single-ended pulse signals with a 90° phase difference output from the two signal output ports. The local oscillator port receives the first microwave signal. The first mixer mixes the received two first single-ended pulse signals with a 90° phase difference with the first microwave signal to obtain the radio frequency signal. Compared with existing discrete RF generators, this invention achieves high integration of the arbitrary waveform RF transmitting unit, eliminating the need for complex cabling and saving storage space, thus making full use of space resources. Furthermore, since the first functional motherboard implements multiple signal generation and processing functions, it communicates with the host computer without requiring each device to communicate with the host computer separately, as is the case in existing technologies. This saves communication switching time and improves real-time performance. At the same time, compared with discrete RF generators, it significantly reduces the number of cables, lowers signal cable loss, reduces signal attenuation, thereby improving signal effectiveness, reducing signal noise, and increasing the signal-to-noise ratio. Furthermore, the inventors have innovatively proposed improving the shape of the first mixer, for example, changing the shape of the first mixer from π-type to H-type. That is, the in-phase port and quadrature-phase port of the first mixer are located on the same side of the cavity, while the local oscillator port and RF port are located on the opposite side of the cavity. This avoids the ports from being squeezed between the sides of other adjacent first mixers, allowing multiple first mixers to be arranged compactly and housed together with the devices mounted on the first functional motherboard in a drawer box, thereby meeting the high-density installation requirements of the quantum measurement and control system. In addition, no additional cables are required, or even if cables are required, they do not occupy additional space and are easy to route, thus facilitating the miniaturization and integration of the entire quantum measurement and control system and the quantum computing device with the quantum measurement and control system.

[0062] The radio frequency arbitrary waveform transmitting unit provided in this embodiment of the utility model, when applied in a quantum measurement and control system, can improve the integration of the entire quantum measurement and control system. On the one hand, it greatly reduces the space required by the quantum measurement and control system, lowers hardware costs, and makes it easier to quickly build the quantum measurement and control system. On the other hand, the high integration also greatly reduces the amount of complex cables used, and the measurement and control capacity of the qubits can be greatly increased in the same physical space, thereby improving the function and application range of the measurement and control system.

[0063] Other features and advantages of this invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of this invention may be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings.

[0064] The technical solution of this utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0065] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0066] Figure 1 A structural block diagram of the quantum measurement and control system provided in this embodiment of the utility model;

[0067] Figure 2 A structural block diagram of the radio frequency arbitrary waveform transmission unit included in the quantum measurement and control system provided in this embodiment of the utility model;

[0068] Figure 3 A structural block diagram of the radio frequency arbitrary waveform transmission unit included in the quantum measurement and control system provided in this embodiment of the utility model;

[0069] Figure 4 A structural block diagram of the quantum analysis unit included in the quantum measurement and control system provided in this embodiment of the utility model;

[0070] Figure 5 A three-dimensional structural diagram of an IQ mixer provided for an embodiment of this utility model;

[0071] Figure 6 and Figure 7 These are schematic diagrams illustrating two different connection methods for the first functional motherboard and the first mixer provided in this embodiment of the utility model;

[0072] Figure 8 for Figure 5 The diagram shows the exploded structure of the IQ mixer.

[0073] Figure 9 for Figure 8 The layout of the circuit board module for the IQ mixer shown is shown.

[0074] Figure 10 for Figure 9 A schematic diagram of the circuit structure of the IQ mixer chip on the circuit board module shown.

[0075] Figure 11 for Figure 10 The diagram shown is a circuit structure diagram of a double-balanced mixer using an IQ mixer chip.

[0076] Figure 12 A structural block diagram of the trigger allocation unit of the quantum measurement and control system provided in this embodiment of the present invention;

[0077] Figure 13 A structural block diagram of the clock distribution unit of the quantum measurement and control system provided in this embodiment of the present invention;

[0078] Figure 14 A structural block diagram of the power distribution unit of the quantum measurement and control system provided in this embodiment of the utility model;

[0079] Figure 15 A structural block diagram of a quantum measurement and control cabinet employing a quantum measurement and control system provided for an embodiment of this utility model;

[0080] Figure 16 A schematic diagram of the layout of a quantum measurement and control cabinet using a quantum measurement and control system, provided for an embodiment of this utility model;

[0081] In the picture:

[0082] 100. Quantum measurement and control system; 200. Rack;

[0083] 1. Host computer;

[0084] 2. Transmitting unit; 21. Radio frequency arbitrary waveform transmitting unit; 2101. First main control chip; 2102. First digital-to-analog converter; 2103. First combiner; 2104. First mixer; 21041. Circuit board; 21042. IQ mixer chip; 21043. In-phase port; 21044. Quadrature-phase port; 21045. Local oscillator port; 21046. Radio frequency port; 21047. Microstrip line; 21048. Base; 210481. Groove; 21049. Cover plate; 210410. Cavity; 210411. Ground hole; 210412. Pad; 210413. Mounting hole; 2105. First local oscillator microwave source; 2106. First DC generator chip; 2107. First filter; 2108. First attenuator; 109. First memory chip; 2110. First network port chip; 2111. First RS485 / 422 communication interface; 2112. First synchronization buffer chip; 2113. First trigger buffer chip; 2114. First clock chip; 2100. First drawer box; 22. Intermediate frequency arbitrary waveform transmitting unit; 2201. Second main control chip; 2202. Second digital-to-analog converter; 2203. Second combiner; 2204. Second DC generator chip; 2205. Second filter; 2206. Second memory chip; 2207. Second network port chip; 2208. Second RS485 / 422 communication interface; 2209. Second synchronization buffer chip; 2210. Second trigger buffer chip; 2211. Second clock chip; 2200. Second drawer box;

[0085] 3. Quantum analysis unit; 31. Radio frequency transmission subunit; 3101. Third main control chip; 3102. Third digital-to-analog converter; 3103. Third combiner; 3104. Second mixer; 3105. Second local oscillator microwave source; 3106. Third DC generation chip; 3107. Third filter; 3108. Second attenuator; 3109. Third memory chip; 3110. Third network port chip; 3111. Third RS485 / 422 communication interface; 3112. Third synchronization buffer chip; 3113. 3114. Third trigger buffer chip; 3115. Third clock chip; 3100. Third drawer box; 32. Acquisition subunit; 3201. Fourth main control chip; 3202. Trigger control pulse chip; 3203. Synchronization signal buffer distribution chip; 3204. Analog-to-digital converter; 3205. Demodulator; 3206. Third local oscillator microwave source; 3207. Low frequency amplifier; 3208. Fourth memory chip; 3209. Fourth network port chip; 3210. Single-ended to differential converter; 3211. Fourth clock chip;

[0086] 4. Trigger allocation unit; 401. Main trigger buffer; 402. Sub-trigger buffer; 410. Fourth drawer box;

[0087] 5. Clock distribution unit; 501. Master clock buffer; 502. Sub-clock buffer; 510. Fifth drawer box;

[0088] 6. Power distribution unit; 601. Mechanical power switch; 602. Power filter; 603. Fuse; 604. Self-locking push-button switch; 605. Splitter; 606. Power conversion module; 607. Power output connector; 610. Sixth drawer box;

[0089] 7. Clock switching module;

[0090] 8. Network communication equipment; 710. Seventh drawer box. Detailed Implementation

[0091] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0092] The inventors of this application have discovered that existing quantum measurement and control systems suffer from low integration. Setting up a quantum measurement and control system requires numerous external components, such as attenuators, single-ended to differential converters, mixers, power dividers, couplers, and bandpass filters, in a traditional discrete room-temperature measurement and control scheme using an arbitrary waveform generator, microwave source, and IQ mixer. These numerous, functionally diverse components are interconnected via cables to drive the qubits. This not only makes the setup process complex and time-consuming but also hinders expansion due to physical space limitations. These factors necessitate extensive debugging before quantum measurement and control experiments can begin, significantly restricting the development of quantum computers.

[0093] In view of the above-mentioned problems existing in the prior art, this utility model proposes a quantum measurement and control system 100. (Refer to...) Figure 1 As shown, the quantum measurement and control system 100 includes: at least one transmission unit 2, at least one quantum analysis unit 3, at least one trigger distribution unit 4, and at least one clock distribution unit 5.

[0094] The at least one quantum analysis unit 3 and the at least one transmission unit 2 are used to communicate with the external host computer 1, respectively.

[0095] The trigger distribution unit 4 is connected to at least one of the quantum analysis units 3 and at least one of the transmission units 2, and is used to divide a trigger signal into synchronous multiple trigger signals and output the multiple trigger signals to the quantum analysis unit 3 and the transmission unit 2 connected to the trigger distribution unit 4.

[0096] The clock distribution unit 5 is connected to at least one of the quantum analysis units 3 and at least one of the transmitting units 2, and is used to divide a first clock signal into multiple synchronous first clock signals, and output the multiple first clock signals to the quantum analysis unit 3 and the transmitting unit 2 connected to the clock distribution unit 5. The first clock signal is a base clock signal.

[0097] The transmitting unit 2 is used to receive the measurement and control signal waveform parameter information sent by the host computer 1, and after receiving the trigger signal, generate the measurement and control signal and transmit the measurement and control signal to the quantum processor (not shown) so that the qubits in the quantum processor oscillate between the ground state |0> and the excited state |1> to realize various quantum logic gates.

[0098] The quantum analysis unit 3 is used to receive the read signal waveform parameter information sent by the host computer 1, and after receiving the trigger signal, generate the read signal and transmit the read signal to the resonant cavity in the quantum processor, and receive the read signal output from the quantum processor, perform data processing on the read signal, and return the processed quantum computing result to the host computer 1.

[0099] The quantum processor is equipped with qubits, which may be, for example, artificial qubits or naturally occurring physical particles (such as electrons, photons, etc.). In this application, a superconducting quantum chip is used as an example of the quantum processor. However, it is understood that the technical solution of this application can also be applied to other suitable types of quantum processors.

[0100] In this embodiment of the present invention, when the host computer 1 communicates with the quantum analysis unit 3 and the transmission unit 2 through a data transmission network, a network communication device 8, such as a switch or router, can be used to achieve good matching and compatibility between different units.

[0101] The transmitting unit 2 communicates with the host computer 1 through the network communication device 8. Specifically, the transmitting unit 2 receives the measurement and control signal waveform parameter information sent from the host computer 1 through the network communication device 8, and generates corresponding measurement and control signals to send to the quantum processor.

[0102] The quantum analysis unit 3 communicates with the host computer 1 through the network communication device 8. Specifically, the quantum analysis unit 3 receives the waveform parameter information of the read signal sent from the host computer 1 through the network communication device 8, generates a corresponding read signal and sends it to the quantum processor, and outputs the quantum calculation result to the host computer 1 through the network communication device 8.

[0103] In this embodiment of the present invention, the waveform parameter information of the aforementioned measurement and control signal includes, for example, the waveform data to be transmitted by the transmitting unit, such as the amplitude, frequency, and phase of the waveform, as well as various preset parameter information, such as the waveform length parameter.

[0104] In this embodiment of the invention, the aforementioned measurement and control signals include, for example, a quantum bit frequency modulation signal (commonly referred to as the Z signal) and a quantum bit driving signal (commonly referred to as the XY signal). The Z signal is used to adjust the frequency of the quantum bit (i.e., to adjust the energy level spacing of the quantum bit), while the XY signal is used to drive the quantum bit to switch between the ground state |0> and the excited state |1>. Specifically, by applying a mid-frequency Z signal and a high-frequency XY signal with a frequency close to the quantum bit energy level spacing, the quantum bit can oscillate between the ground state |0> and the excited state |1>, thereby realizing various quantum logic gates. Precise control of these two signals, XY and Z, is crucial for the successful implementation of quantum computing and quantum information processing. The frequency range of the Z signal is, for example, but not limited to, 0 to 500 MHz, and the frequency range of the XY signal is, for example, but not limited to, 4 GHz to 6 GHz.

[0105] In this embodiment of the present invention, the above-mentioned read signal waveform parameter information includes, for example, the waveform data to be transmitted by the quantum analysis unit, such as the amplitude, frequency, and initial phase of the waveform, as well as various preset parameter information, such as the waveform length parameter.

[0106] The frequency range of the read-in signal generated by the quantum analysis unit 3 is, for example, but not limited to, 6 GHz to 8 GHz. The read-in signal is transmitted to the quantum processor, enters the resonant cavity, is indirectly capacitively coupled to the qubit, and is reflected by the resonant cavity to become the read-out signal carrying the information of the resonant cavity and the qubit. The quantum analysis unit 3 reads the read-out signal, performs data processing on the read-out signal to obtain the quantum computing result, and transmits the quantum computing result to the host computer 1 for display through the network communication device 8.

[0107] The quantum measurement and control system 100 provided in this embodiment of the invention includes a quantum analysis unit 3 and a transmission unit 2 that can communicate with a host computer 1. A trigger allocation unit 4 and a clock allocation unit 5 are connected to the quantum analysis unit 3 and the transmission unit 2. During quantum processor measurement and control, the number of quantum analysis units 3, transmission units 2, trigger allocation units 4, and clock allocation units 5 can be selected according to the number of qubits. The host computer 1 programs the qubits to be measured and controlled, and the quantum processor measurement and control is achieved through communication with the quantum analysis units 3 and the transmission unit 2. With the expansion of the number of qubits, an unlimited superposition of quantum analysis units 3, transmission units 2, trigger allocation units 4, and clock allocation units 5 can be achieved, without being limited by physical space.

[0108] Furthermore, by dividing a trigger signal into multiple synchronous trigger signals and sending them to the quantum analysis unit 3 and the transmission unit 2 through the trigger allocation unit 4, the real-time synchronous start-up of the transmission alignment function can be achieved. The trigger signal allocation process does not cause any attenuation, ensuring that the amplitude of the output multiple trigger signals meets the requirements. Similarly, the clock allocation unit 5 divides a first clock signal into multiple synchronous first clock signals and outputs them to the quantum analysis unit 3 and the transmission unit 2, enabling real-time synchronous clock alignment. The clock allocation process does not cause any attenuation, ensuring that the amplitude of the output multiple clock signals meets the requirements. The signals allocated by the trigger allocation unit 4 and the clock allocation unit 5 have high synchronization performance and can meet the synchronization requirements of multi-bit synchronous transmission control. Therefore, they are suitable for the measurement and control of quantum processors with any number of qubits.

[0109] In one embodiment, the measurement and control signal waveform parameter information includes radio frequency waveform parameter information and intermediate frequency waveform parameter information; the measurement and control signal includes a quantum bit driving signal and a quantum bit frequency modulation signal; refer to Figure 2 and Figure 3 As shown, the transmitting unit 2 includes at least one intermediate frequency arbitrary waveform transmitting unit 22 and at least one radio frequency arbitrary waveform transmitting unit 21;

[0110] The radio frequency arbitrary waveform transmitting unit 21 is used to receive the radio frequency waveform parameter information sent by the host computer 1, and after receiving the trigger signal, it generates the quantum bit driving signal according to the radio frequency waveform parameter information and sends the quantum bit driving signal to the quantum processor.

[0111] The intermediate frequency arbitrary waveform transmitting unit 22 is used to receive intermediate frequency waveform parameter information sent by the host computer 1, and after receiving the trigger signal, it generates the quantum bit frequency modulation signal according to the intermediate frequency waveform parameter information, and sends the quantum bit frequency modulation signal to the quantum processor.

[0112] In one embodiment, refer to Figure 4 As shown, the quantum analysis unit 3 includes a radio frequency transmission subunit 31 and a collection subunit 32;

[0113] The radio frequency transmitting subunit 31 is used to receive the read signal waveform parameter information sent by the host computer 1, and after receiving the trigger signal, generate the read signal and transmit the read signal to the resonant cavity in the quantum processor;

[0114] The acquisition subunit 32 is used to receive the readout signal output from the quantum processor, process the readout signal, and return the processed quantum computing result to the host computer 1.

[0115] The inventors discovered that as the number of qubits (qubit count) increases dramatically, the technical challenges and key points of quantum measurement and control systems become clearer, mainly in the following two aspects: First, the measurement and control fidelity of quantum logic gates, i.e., whether the waveform loaded onto the qubits is the desired ideal waveform. This can be measured by the fidelity data of single or dual gates (e.g., 99.9% for a single gate) and the ideality of the waveform (e.g., signal-to-noise ratio and SFDR). Second, the capacity and integration of the quantum measurement and control system, i.e., the number of qubits the quantum measurement and control system can control and the integration solution. In conventional discrete room temperature measurement and control schemes using an arbitrary waveform generator (AWG) + microwave source + IQ mixer, assuming three AWG channels control one qubit, the AWG uses a 4-channel waveform generator, the microwave source uses an independent 4-channel microwave source, and the IQ mixer uses an external discrete mixer. Furthermore, cables are needed to connect the various instruments, occupying significant storage space. Controlling one qubit requires approximately 1.75U of space. If the quantum measurement and control system is installed in a 19-inch 42U rack, the rack's measurement and control capacity is limited to approximately 24 qubits. This is far from meeting the needs of quantum computing applications. Moreover, in conventional discrete room temperature measurement and control schemes, each instrument needs to be controlled separately, and the synchronization methods between instruments are complex, resulting in poor synchronization performance. Additionally, each instrument needs to communicate and control independently, requiring the host computer to constantly switch between instruments, leading to low communication efficiency. Furthermore, due to insufficient real-time performance, and the introduction of environmental noise and microwave signal attenuation by the cables connecting various devices, the functionality and applications of the quantum measurement and control system are very limited.

[0116] Based on this, in this embodiment of the invention, the inventors have made technical improvements to the transmitting unit 2, quantum analysis unit 3, trigger allocation unit 4, clock allocation unit 5, power allocation unit 6, etc., in the quantum measurement and control system. For example, but not limited to, improvements have been made to the structure of the radio frequency arbitrary waveform transmitting unit 21 and the intermediate frequency arbitrary waveform transmitting unit 22 in the transmitting unit 2, and to the radio frequency transmitting subunit 31 and the acquisition subunit 32 in the quantum analysis unit 3. These improvements are described in detail below:

[0117] In one embodiment, refer to Figure 2 As shown, the radio frequency arbitrary waveform transmitting unit 21 includes a first functional motherboard (not shown) and at least one first mixer 2104 disposed outside the first functional motherboard; the first mixer 2104 is, for example, but not limited to, an IQ mixer.

[0118] The first functional motherboard is connected to the at least one first mixer 2104.

[0119] The first functional motherboard is used to receive radio frequency waveform parameter information sent by the host computer 1, and after receiving the trigger signal, generate at least one pair of first DC signals and at least two pairs of first differential pulse signals with preset waveforms according to the radio frequency waveform parameter information, and generate a first microwave signal. Each pair of first differential pulse signals and a phase-matched first DC signal are mixed to obtain at least two first single-ended pulse signals with a phase difference of 90°, and output to the corresponding first mixer 2104. The generated first microwave signal is also output to the first mixer 2104.

[0120] The first mixer 2104 is used to perform frequency mixing processing on the two single-ended pulse signals with a phase difference of 90° and the first microwave signal to obtain the quantum bit driving signal, and send the quantum bit driving signal to the quantum processor.

[0121] In this embodiment of the invention, after receiving a trigger signal based on radio frequency waveform parameter information, the first functional motherboard generates an even number of pairs of first differential pulse signals. Each pair of first differential pulse signals includes two pulse signals with equal amplitude and opposite phase. Each pair of first differential pulse signals corresponds to one first DC signal. Every two pairs of first differential pulse signals and one matched first DC signal are mixed to obtain two first single-ended pulse signals with a 90° phase difference. That is, every pair of first differential pulse signals and one matched first DC signal are mixed to obtain one of the two first single-ended pulse signals with a 90° phase difference. These two first single-ended pulse signals with a 90° phase difference are output to the same first mixer 2104 and mixed with one first microwave signal. For example, assuming that the first functional motherboard is connected to h first mixers 2104, the first functional motherboard will generate 2h pairs of first differential pulse signals, h pairs of first DC signals, and h first microwave signals, where h is a positive integer.

[0122] In this embodiment of the present invention, the radio frequency arbitrary waveform transmitting unit 21 generates a first differential pulse signal, a first DC signal and a first microwave signal through a first functional motherboard. By mixing the corresponding number of first differential pulse signals and the first DC signal, two first single-ended pulse signals with a 90° phase difference are output to the first mixer 2104. Then, they are mixed with a first microwave signal to obtain a quantum bit driving signal. Compared with the discrete RF generators in the prior art, this invention achieves high integration of the RF arbitrary waveform transmitting unit 21, eliminating the need for complex cabling and saving storage space. When configuring a quantum measurement and control cabinet, it saves rack space, fully utilizing space resources. Without changing the rack size, it significantly increases the measurement and control capacity of the quantum bits in the quantum measurement and control cabinet. Furthermore, since the first functional motherboard implements multiple signal generation and processing functions, communication with the host computer 1 is achieved through the first functional motherboard, eliminating the need for each device to communicate with the host computer 1 individually as in the prior art. This saves communication switching time and improves real-time performance. Simultaneously, compared with discrete RF generators, it significantly reduces the number of cables, lowers signal cable loss, reduces signal attenuation, thereby improving signal effectiveness, reducing signal noise, and increasing the signal-to-noise ratio, which is beneficial for improving the measurement and control fidelity of the quantum logic gates of the quantum processor.

[0123] Reference Figure 2As shown, the first functional motherboard includes a first carrier board (not shown) and a first main control chip 2101, a first digital-to-analog converter 2102, a first DC generation chip 2106, a first local oscillator microwave source 2105, and at least one pair of first combiners 2103 disposed on the first carrier board. The first carrier board may be, for example, but is not limited to, a printed circuit board or other suitable component.

[0124] The first main control chip 2101 is connected to the first digital-to-analog converter 2102, the first DC generation chip 2106, and the first local oscillator microwave source 2105, respectively.

[0125] The first digital-to-analog converter 2102 is connected to the at least one pair of first combiners 2103.

[0126] The output of each pair of first combiners 2103 is connected to the in-phase port and quadrature-phase port of the corresponding first mixer 2104, wherein the in-phase port and quadrature-phase port of the first mixer 2104 are used to receive the two first single-ended pulse signals with a phase difference of 90°.

[0127] The first DC generating chip 2106 is connected to the at least one pair of first combiners 2103.

[0128] The first local oscillator microwave source 2105 is connected to the first mixer 2104.

[0129] The first main control chip 2101 is used to receive radio frequency waveform parameter information sent by the host computer 1, and after receiving the trigger signal, according to the radio frequency waveform parameter information, send a first pulse signal generation instruction to the first digital-to-analog converter 2102, send a first microwave signal generation instruction to the first local oscillator microwave source 2105, and send a first DC generation control instruction to the first DC generation chip 2106.

[0130] The first digital-to-analog converter 2102 is used to generate at least two pairs of preset waveforms of first differential pulse signals according to the first pulse signal generation instruction.

[0131] The first DC generation chip 2106 is used to generate at least one pair of first DC signals according to the first DC generation control command.

[0132] The first combiner 2103 is used to mix a pair of first differential pulse signals and a phase-matched first DC signal to obtain one of the two first single-ended pulse signals with a phase difference of 90°, and output it to the corresponding first mixer 2104.

[0133] The first local oscillator microwave source 2105 is used to generate at least one first microwave signal according to the first microwave signal generation instruction, and output them to the corresponding first mixer 2104 respectively.

[0134] In one specific embodiment, in the above-described quantum measurement and control system, reference is made to... Figure 2 As shown, the first combiner 2103 includes a first operational amplifier (not shown).

[0135] The first functional motherboard also includes at least one pair of first filters 2107 disposed on the first carrier board.

[0136] The first DC generation chip 2106 is connected to the at least one pair of first filters 2107;

[0137] The first filter 2107 is connected to the corresponding first operational amplifier;

[0138] The first filter 2107 is used to filter the first DC signal to obtain a filtered first DC signal;

[0139] The first operational amplifier is used to combine a pair of the first differential pulse signals and a filtered one-phase adapted first DC signal to obtain one of the two first single-ended pulse signals with a 90° phase difference.

[0140] In one specific embodiment, the non-inverting input of the first operational amplifier is used to receive one of the pair of the first differential pulse signals and the filtered phase-matched first DC signal, and the inverting input of the first operational amplifier is used to receive the other of the pair of the first differential pulse signals.

[0141] In one specific embodiment, in the above-described quantum measurement and control system, reference is made to... Figure 2 As shown, the radio frequency arbitrary waveform transmitting unit 21 also includes at least one first attenuator 2108 disposed outside the first functional motherboard.

[0142] The first attenuator 2108 is connected to the first mixer 2104 and is used to adjust the amplitude of the qubit drive signal. The first attenuator 2108 can adjust the amplitude of the qubit drive signal, improving impedance matching.

[0143] In this embodiment of the invention, for example, the first attenuator 2108 may be disposed on one side of a dilution refrigerator having a quantum processor.

[0144] In this embodiment of the utility model, reference is made to Figure 2As shown, the first main control chip 2101 of the above-mentioned radio frequency arbitrary waveform transmission unit 21 can be implemented by an FPGA, for example, but not limited to. The FPGA can be equipped with a first memory chip 2109. For example, the first memory chip 2109 includes two 8GB DDR4 high-speed running memory chips, providing sufficient hardware margin in terms of computing power, and each port can output an arbitrary waveform of up to 128ms.

[0145] In this embodiment of the utility model, reference is made to Figure 2 As shown, the first digital-to-analog converter 2102 of the above-mentioned radio frequency arbitrary waveform transmitting unit 21 can be a four-channel high-speed DAC with a bandwidth of 2.4 GSPS 16-bit, thereby meeting the requirement of synchronously transmitting arbitrary waveforms and DC waveforms, including sine waves, square waves and higher-order waves, during measurement and control operations.

[0146] In this embodiment of the utility model, reference is made to Figure 2 As shown, the first combiner 2103 in the above-mentioned radio frequency arbitrary waveform transmitting unit 21, which converts differential signals to single-ended signals, adopts an operational amplifier. Furthermore, a first DC signal is generated by a first DC generation chip 2106, and then filtered by a first filter 2107. The first operational amplifier combines a pair of arbitrary waveform first differential pulse signals output by the first digital-to-analog converter 2102 with a filtered first phase-matched DC signal. This not only improves the quality of the quantum bit driving signal and ensures that the signal is not distorted, but also eliminates the need for an additional differential-to-single-ended converter when building a quantum measurement and control cabinet, as is the case with existing technologies, thereby reducing hardware costs and realizing the integration of the radio frequency arbitrary waveform transmitting unit 21.

[0147] In this embodiment of the utility model, reference is made to Figure 2 As shown, the first mixer 2104 of the aforementioned radio frequency arbitrary waveform transmitting unit 21 can be a passive I / Q mixer. This first mixer 2104 can mix with the first microwave signal generated by the onboard first local oscillator microwave source 2105, or with an externally extended local oscillator microwave signal, to produce the quantum bit driving signal required by the radio frequency arbitrary waveform transmitting unit 21 (RF-AWG). In this embodiment of the invention, the first mixer 2104 can be a passive I / Q mixer with a suitable shape, depending on the integration requirements.

[0148] In this embodiment of the utility model, reference is made to Figure 2As shown, the first local oscillator microwave source 2105 of the aforementioned radio frequency arbitrary waveform transmitting unit 21 can be a chip. This chip can be, for example, but not limited to, a 2-channel 3.5GHz-8.5GHz onboard microwave source, thereby saving the cost of purchasing additional microwave source equipment and further saving the storage space of the radio frequency arbitrary waveform transmitting unit 21. Furthermore, since the first main control chip 2101 is connected to the first local oscillator microwave source 2105, the first local oscillator microwave source 2105 can be controlled by the first main control chip 2101, further reducing the communication switching time and thus improving the real-time performance of measurement and control.

[0149] As a specific example of the radio frequency arbitrary waveform transmitting unit 21 in this embodiment of the present invention, refer to... Figure 2 As shown, corresponding to the same first functional motherboard in the RF arbitrary waveform transmitting unit 21, the first digital-to-analog converter 2102 uses a 2.4 GSPS 16-bit four-channel high-speed DAC to generate four pairs of first differential pulse signals; the first DC generation chip 2106 generates two pairs of first DC signals, i.e., four first DC signals. The four first filters 2107 of the RF arbitrary waveform transmitting unit 21 filter these four first DC signals respectively. Then, the four first operational amplifiers are divided into two pairs, and each pair of first operational amplifiers filters the two pairs of first differential pulse signals and the signals filtered by the first DC generation chip 2106. The two filtered first DC signals are combined to obtain two first single-ended pulse signals with a 90° phase difference, resulting in two pairs of first single-ended pulse signals with a 90° phase difference. The first local oscillator microwave source 2105 generates two first microwave signals. The first functional motherboard is connected to two first mixers 2104. Each first mixer 2104 mixes the two first single-ended pulse signals with a matching first microwave signal to obtain one quantum bit drive signal, which is then sent to the quantum processor. Assuming the radio frequency arbitrary waveform transmitting unit 21 contains n first functional motherboards, 2n quantum bit drive signals can ultimately be obtained, where n is a positive integer.

[0150] In this embodiment of the invention, the first functional motherboard of the radio frequency arbitrary waveform transmitting unit 21 has two pairs of first operational amplifiers and two pairs of first filters 2107. In other embodiments, the first functional motherboard may be provided with at least one pair of first operational amplifiers and at least one corresponding pair of first filters 2107, and each pair of first operational amplifiers and each pair of first filters 2107 is connected to a first mixer 2104.

[0151] In this embodiment of the utility model, reference is made to Figure 2As shown, in the aforementioned arbitrary waveform radio frequency (RF) transmitter 21, the first functional motherboard further includes a first network port chip 2110 disposed on the first carrier board. This first network port chip 2110 is connected to the first main control chip 2101 and is used to communicate with the host computer 1 via an external network communication device 8. It receives the RF waveform parameter information sent by the host computer 1 through the network communication device 8 and outputs it to the first main control chip 2101. Through the connection between the first network port chip 2110 and the network communication device 8, network communication with the host computer 1 is achieved. The first network port chip 2110 receives the RF waveform parameter information from the network communication device 8 and outputs it to the first main control chip 2101. The network communication device 8 is communicatively connected to the host computer 1. Through network communication interaction via the network communication device 8, the host computer 1 can control different RF arbitrary waveform transmitter units 21 separately, achieve the superposition and connection of multiple RF arbitrary waveform transmitter units 21, realize unrestricted superconducting multi-bit connections, and achieve quantum processor measurement and control with an unlimited number of bits.

[0152] In this embodiment of the utility model, reference is made to Figure 2 As shown, in the aforementioned radio frequency arbitrary waveform transmitting unit 21, the first functional motherboard further includes a first clock chip 2114 disposed on the first carrier board, used to convert the second clock signal into a third clock signal and output the third clock signal to devices such as the first main control chip 2101, the first digital-to-analog converter 2102, and the first local oscillator microwave source 2105. The third clock signal is the operating clock of devices such as the first main control chip 2101, the first digital-to-analog converter 2102, and the first local oscillator microwave source 2105. The first clock chip 2114 can, for example, perform frequency division / multiplication operations on the second clock signal to obtain a third clock signal with the frequency required by the other devices in the radio frequency arbitrary waveform transmitting unit 21. The second clock signal is, for example, a source clock signal. The third clock signal includes, for example, any one or more of clock signals such as a system clock signal, a device clock signal, and a sampling clock signal. The second clock signal is, for example, a clock signal after the first clock signal has been buffered and enhanced by a buffer circuit. The first functional motherboard may further include a first buffer circuit (not shown) for receiving a first clock signal output from the clock distribution unit 5 and performing buffer enhancement processing on the first clock signal to obtain a second clock signal. The first buffer circuit is disposed outside the first clock chip 2114 or integrated in the first clock chip 2114.

[0153] In this embodiment of the invention, the first buffer circuit may be integrated into the first clock chip 2114, disposed in other circuit modules or chips, or be an independent circuit module. Preferably, the first clock chip 2114 has the function of the first buffer circuit, thereby further improving the integration of the entire device.

[0154] In this embodiment of the utility model, reference is made to Figure 2 As shown, in the above-mentioned radio frequency arbitrary waveform transmitting unit 21, the first functional motherboard also includes a first trigger buffer chip 2113 disposed on the first carrier board. The first trigger buffer chip 2113 is used to receive the trigger signal output from the trigger allocation unit 4, perform buffer enhancement processing on the received trigger signal, and output the processed trigger signal to the first main control chip 2101.

[0155] Optionally, refer to Figure 2 As shown, in the above-mentioned radio frequency arbitrary waveform transmitting unit 21, the first functional motherboard further includes a first synchronization buffer chip 2112 disposed on the first carrier board. The first synchronization buffer chip 2112 is used to receive signals from the synchronization signal buffer distribution chip 3203 (see...). Figure 4 The output synchronization signal is used to buffer and enhance the synchronization signal, and the processed synchronization signal is output to corresponding devices including the first main control chip 2101. The synchronization signal has the same or similar function as the trigger signal.

[0156] In one embodiment, refer to Figure 2 As shown, in the aforementioned radio frequency arbitrary waveform transmitting unit 2, the first functional motherboard further includes a first RS485 / 422 communication interface 2111 disposed on the first carrier board. The first RS485 / 422 communication interface 2111 is connected to the first main control chip 2101 and is used for communication with the host computer 1. The first RS485 / 422 communication interface 2111 is a spare interface.

[0157] Specifically, for example, when the first unit network port (not shown) of the radio frequency arbitrary waveform transmitting unit 21 is in service communication, the host computer 1 can monitor the first functional motherboard (e.g., monitor the temperature of the first main control chip 2101), issue commands, or restart and other related operations through the first RS485 / 422 communication interface 2111.

[0158] The first unit network port is, for example, a 1-to-more switch. The first unit network port serves as an interface between the internal and external systems. The 1-to-more switch is a 1-to-2, 1-to-3, or 1-to-3 or higher switch.

[0159] In the embodiments of this application, the first unit network port is a 1-to-2 switch. Accordingly, the first unit network port is connected to two first functional motherboards inside the radio frequency arbitrary waveform transmitting unit 21, and externally connected to an external network communication device 8.

[0160] The quantum measurement and control system provided in this embodiment of the invention achieves high integration of the radio frequency arbitrary waveform transmission unit 21 by arranging different components such as the first main control chip 2101, the first digital-to-analog converter 2102, the first combiner 2103, the first DC generation chip 2106, and the first local oscillator microwave source 2105 on the same first functional motherboard. This saves rack space when configuring the quantum measurement and control cabinet, fully utilizing space resources. Compared to the discrete radio frequency generators used in the prior art, this significantly improves the quantum measurement and control system's performance while maintaining the same rack size. The cabinet's quantum bit measurement and control capacity is increased. Furthermore, since multiple devices of the radio frequency arbitrary waveform transmission unit 21 are set on the same first functional motherboard and communicate with the host computer 1 through the first main control chip 2101, each device does not need to communicate with the host computer 1 separately. Therefore, communication switching time is saved, and real-time performance is higher. At the same time, compared with the discrete radio frequency generator, the number of cables can be greatly reduced, the cable loss of the signal is reduced, the signal attenuation is reduced, thereby improving the effectiveness of the signal, reducing signal noise, and improving the signal-to-noise ratio, which is conducive to improving the measurement and control fidelity of the quantum logic gate of the quantum processor.

[0161] Furthermore, in this embodiment of the invention, the inventors have innovatively proposed improving the shape of the IQ mixer, for example, changing the shape of the first mixer 2104 from π-type to H-type (see...). Figure 5 This design avoids squeezing between the ports of adjacent first mixers 2104, allowing multiple first mixers 2104 to be arranged compactly and housed together with the devices on the first functional motherboard in a drawer box, thus meeting the high-density installation requirements of the radio frequency arbitrary waveform transmission unit 21. In addition, no additional cables are required, or even if cables are required, they do not occupy additional space and are easy to route, which is beneficial for the miniaturization and integration of the entire quantum measurement and control system and the quantum computing device with the quantum measurement and control system.

[0162] However, alternatively, the first mixer 2104 may also be located outside the drawer box as needed. Specifically, the first mixer 2104 and the first attenuator 2108 may not be located on the first functional motherboard, and correspondingly, the first functional motherboard may not include the first mixer 2104 and the first attenuator 2108.

[0163] Specifically, such as Figure 5 As shown, the first mixer 2104 provided in this application is an H-type IQ mixer. The port layout of the H-type IQ mixer is as follows: on one side of the cavity 210410 of the IQ mixer, a non-phase port 21043 and a quadrature phase port 21044 are provided opposite to each other, and on the other side, a local oscillator port 21045 and a radio frequency port 21046 are provided.

[0164] At this time, the in-phase port 21043 and the quadrature phase port 21044, the local oscillator port 21045 and the radio frequency port 21046 are located on two opposite sides of the IQ mixer cavity 210410, respectively. The in-phase port 21043, the quadrature phase port 21044, the local oscillator port 21045, the radio frequency port 21046 and the cavity 210410 can form an H-type IQ mixer.

[0165] In this embodiment of the utility model, the first mixer 2104 is disposed outside the first functional motherboard. Regardless of the specific shape of the first mixer 2104, including but not limited to the aforementioned H-type, π-type, etc., there can be multiple ways to connect the first mixer 2104 and the first functional motherboard.

[0166] Taking the first mixer as an H-type mixer as an example, for instance, refer to... Figure 6 As shown, when the RF arbitrary waveform transmitting unit 21 adopts edge-emitting mode, the first mixer 2104 and the first functional motherboard are connected horizontally, or, as shown in the figure... Figure 7 As shown, when the radio frequency arbitrary waveform transmitting unit 21 adopts a vertical transmission mode, the first mixer 2104 and the first functional motherboard can be connected in a vertical direction. The above-mentioned horizontal and vertical connection methods include, but are not limited to, plug-in, soldering, and direct connection methods such as using wires or cables (e.g., coaxial cables).

[0167] Other shapes of first mixers and first functional motherboards besides the H-type described above can also be used. Figure 6 and Figure 7 Similar connection methods are used for connection; however, this embodiment of the utility model does not limit the specific connection method. Figure 6 and Figure 7 This is just an example.

[0168] Of course, in the case where the first mixer is an H-type mixer, regardless of whether the RF arbitrary waveform transmitting unit 21 uses edge transmission or vertical transmission, the first mixer 2104 can be well connected to the first functional motherboard. This avoids the ports between adjacent first mixers 2104 being squeezed, allowing multiple first mixers 2104 to be compactly arranged on the signal transmission module of the quantum measurement and control system. This enables the first mixers 2104 to be highly integrated into the RF arbitrary waveform transmitting unit 21 of the quantum measurement and control system, meeting the high-density installation requirements of the RF arbitrary waveform transmitting unit 21. In addition, no additional cables are needed, or even if cables are needed, they do not occupy additional space and are easy to route, thus facilitating the miniaturization and integration of the entire quantum measurement and control system.

[0169] In this embodiment of the utility model, reference is made to Figure 5 As shown, the first mixer 2104 has a cavity with a non-phase port 21043 and a quadrature phase port 21044 on one side opposite to the other side, and a local oscillator port 21045 and a radio frequency port 21046 on the other side. Further, referring to... Figure 6 and Figure 7 As shown, the in-phase port 21043 and the quadrature-phase port 21044 are respectively connected to the two signal output ports (not shown) on the first functional motherboard to receive the two first single-ended pulse signals with a 90° phase difference output from the two signal output ports. The local oscillator port 21045 is used to receive the first microwave signal. The first mixer 2104 performs mixing processing on the received two first single-ended pulse signals with a 90° phase difference and the first microwave signal to obtain the quantum bit driving signal.

[0170] Specifically, such as Figure 8 As shown in this embodiment, the cavity of the IQ mixer includes a circuit board module. The circuit board module includes a circuit board 21041 (PCB) and an IQ mixer chip 21042. On one side of the cavity, opposite to each other, are a non-phase port 21043 (I-channel port) and a quadrature phase port 21044 (Q-channel port), and on the other side are a local oscillator port 21045 (LO port) and a radio frequency port 21046 (RF port). The ports on the cavity can be SMA antenna mounts or IPX antenna mounts; specific options are not limited here.

[0171] It is understood that in this embodiment of the present invention, the two single-ended pulse signals with a 90° phase difference include an in-phase intermediate frequency signal and a quadrature phase intermediate frequency signal. The H-type IQ mixer performs up-conversion. The in-phase port 21043 (I-port) and the quadrature phase port 21044 (Q-port) of the IQ mixer respectively input (IN) the in-phase intermediate frequency signal and the quadrature phase intermediate frequency signal transmitted by a pair of first combiners 2103. At the same time, the local oscillator port 21045 (LO port) inputs the first microwave signal, i.e., the local oscillator signal. After the IQ mixer mixes the in-phase intermediate frequency signal and the quadrature phase intermediate frequency signal with the first microwave signal, it outputs (OUT) the XY signal through the radio frequency port 21046 (RF port).

[0172] The IQ mixer chip 21042 is disposed on the circuit board 21041. The in-phase pin and quadrature-phase pin of the IQ mixer chip 21042 are connected to the corresponding in-phase port 21043 and quadrature-phase port 21044, respectively, via microstrip line 21047 (microwave source cable). The local oscillator pin of the IQ mixer chip is connected to the local oscillator port 21045, for example, but not limited to, via a local oscillator microstrip line; the RF pin of the IQ mixer chip is connected to the RF port 21046, for example, but not limited to, via an RF microstrip line.

[0173] In this embodiment of the present invention, the in-phase port 21043 and the quadrature phase port 21044 of the first mixer 2104 are respectively connected to the corresponding first combiner 2103. The in-phase port 21043 is used to receive one of the two first single-ended pulse signals with a phase difference of 90°, and the quadrature phase port 21044 is used to receive the other of the two first single-ended pulse signals with a phase difference of 90°.

[0174] The local oscillator port 21045 is connected to the first local oscillator microwave source 2105 and is used to receive the first microwave signal;

[0175] The radio frequency port 21046 is used to output XY signals.

[0176] As can be seen, in this embodiment of the application, by setting an in-phase port and a quadrature phase port on one side of the cavity of the IQ mixer and setting a local oscillator port and a radio frequency port on the other side, when the IQ mixer is applied to the quantum measurement and control system, the compression between the ports of adjacent IQ mixer sides can be avoided, and multiple IQ mixers can be compactly arranged in the quantum measurement and control system.

[0177] It should be noted that in this embodiment of the present invention, the H-type IQ mixer can also perform down-conversion. In this case, the IQ mixer is applied to the acquisition subunit 32 of the quantum analysis unit 3 of the quantum measurement and control system. The in-phase port 21043 and the quadrature phase port 21044 of the IQ mixer are connected to the single-ended to differential converter 3210 of the acquisition subunit 32. At the same time, the local oscillator port 21045 (LO port) inputs the third microwave signal (local oscillator signal), and the radio frequency port 21046 (RF port) reads the readout signal.

[0178] Furthermore, through extensive experiments and research, the inventors discovered that when the local oscillator port and the radio frequency (RF) port are located on the same side of the IQ mixer, the distance between the local oscillator microstrip line connected to the local oscillator port and the radio frequency microstrip line connected to the RF port is relatively short. This can easily increase the signal radiation between the first microwave signal transmitted on the local oscillator microstrip line and the XY signal transmitted on the RF outer band line. The first microwave signal and the XY signal couple together, generating crosstalk and affecting the normal operation of the IQ mixer. Therefore, this application further provides an IQ mixer that can compactly arrange multiple IQ mixers in a quantum measurement and control system while avoiding adverse effects such as crosstalk between the first microwave signal and the XY signal in the IQ mixer. A detailed description follows:

[0179] In this embodiment of the application, the IQ mixer chip 21042 on the IQ mixer is a passive mixer chip, such as... Figure 10 As shown, the IQ mixer chip includes a first double-balanced mixer N1, a second double-balanced mixer N2, and a 90° hybrid bridge. The input terminal of the 90° hybrid bridge is connected to the local oscillator (LO) pin of the IQ mixer chip, and its isolation terminal is grounded. The 0° terminal of the 90° hybrid bridge is connected to the local oscillator terminal of the first double-balanced mixer N1, and the 90° terminal is connected to the local oscillator terminal of the second double-balanced mixer N2. The intermediate frequency (IF) terminal of the first double-balanced mixer N1 is connected to the in-phase pin IF1 of the IQ mixer chip, and the IF terminal of the second double-balanced mixer N2 is connected to the quadrature-phase pin IF2 of the IQ mixer chip. After the RF terminals of the first and second double-balanced mixers N1 and N2 are connected, they are then connected to the RF pins of the IQ mixer chip. In the diagram, GND is the ground pin, and NIC is an empty pin.

[0180] The circuit structures of the first double-balanced mixer and the second double-balanced mixer are similar. The first double-balanced mixer is as follows: Figure 11 As shown, it includes: a first transformer T1, a second transformer T2, and a balancing bridge; the balancing bridge is composed of multiple diodes D1, D2, D3, and D4 connected in series.

[0181] Specifically, the primary winding of the first transformer T1 is connected to the 0-degree end of the 90-degree mixing bridge, meaning one end of the primary winding of the first transformer T1 is the local oscillator end of the first double-balanced mixer. The secondary winding of the first transformer T1 is connected to the first diagonal of the balanced bridge. The second diagonal of the balanced bridge is connected to the primary winding of the second transformer. The midpoint of the primary winding of the second transformer T2 is connected to the in-phase pin of the IQ mixer chip, meaning the midpoint of the primary winding of the second transformer T2 is the intermediate frequency (IF) end of the first double-balanced mixer. The secondary winding of the second transformer T2 is connected to the radio frequency (RF) end of the second double-balanced mixer, meaning one end of the secondary winding of the second transformer T2 is the RF end of the first double-balanced mixer.

[0182] When the IQ mixer chip performs upconversion, the first microwave signal (LO signal) is divided into two local oscillator signal components with a 90-degree phase difference by a 90-degree mixing bridge. These two local oscillator signal components are mixed with the in-phase signal (I-channel signal) input from the in-phase pin and the quadrature-phase signal (Q-channel signal) input from the quadrature-phase pin in the double-balanced mixer, respectively, and then added together to obtain the output XY signal (RF signal).

[0183] In this embodiment of the application, extensive experiments have shown that grounding the unused pin NIC of the IQ mixer chip can effectively suppress signal radiation between the first microwave signal transmitted on the local oscillator microstrip line and the XY signal transmitted on the radio frequency outer band line, thereby improving the isolation of the first microwave signal to the radio frequency port; such as Figure 9 As shown, a ground hole 210411 is provided on the circuit board 21041. The unused pin NIC of the IQ mixer chip 21042 can be grounded through the ground hole 210411 of the circuit board 21041. By grounding all the unused pin NICs of the IQ mixer chip 21042, the signal radiation between the first microwave signal transmitted on the local oscillator microstrip line and the XY signal transmitted on the radio frequency outer band line can be further reduced, the isolation of the first microwave signal to the radio frequency port can be improved, and the adverse effects such as crosstalk between the first microwave signal and the XY signal in the IQ mixer can be avoided.

[0184] In one feasible approach, in order to further reduce signal radiation between the first microwave signal transmitted on the local oscillator microstrip line and the radio frequency signal transmitted on the radio frequency outer band line, it is necessary to determine the optimal impedance values ​​of the local oscillator microstrip line and the radio frequency microstrip line based on the worst isolation of the first microwave signal input to the local oscillator port leaking to the radio frequency port, and the conversion loss (up-conversion loss or down-conversion loss) of the IQ mixer.

[0185] It can be understood that, whether in up-conversion or down-conversion, the IQ mixer needs to input a first microwave signal from the local oscillator port. The isolation degree of the first microwave signal input from the local oscillator port leaking to the radio frequency port is specifically the ratio of the power of the first microwave signal leaking to the radio frequency port to the input power of the first microwave signal, with the unit of dB. The larger this isolation degree is, the lower the signal radiation between the first microwave signal transmitted on the local oscillator microstrip line and the XY signal transmitted on the radio frequency outer strip line; and when the impedance values of the local oscillator microstrip line and the radio frequency microstrip line change, the isolation degree of the first microwave signal input from the local oscillator port leaking to the radio frequency port also changes accordingly. In order to achieve a smaller conversion loss and an optimal isolation degree for the IQ mixer, the worst isolation degree of the first microwave signal input from the local oscillator port leaking to the radio frequency port and the corresponding conversion loss of the IQ mixer can be obtained when the local oscillator microstrip line and the radio frequency microstrip line have multiple different impedance values; for example, by adjusting the diameter of the microstrip line, the impedance value of the microstrip line can be adjusted, that is, the wider the diameter of the microstrip line, the smaller the impedance value, and the narrower the diameter of the microstrip line, the larger the impedance value; and the corresponding worst isolation degree and the conversion loss of the IQ mixer are detected, as shown in Table 1:

[0186] Table 1

[0187] microstrip line impedance value - Ω Conversion loss - dB Worst isolation - dB A 7.1 33.7 B 6.1 34.8 C 11.1 33.5

[0188] In Table 1, A < B < C; based on the worst isolation degree and the corresponding conversion loss, the impedance values of the local oscillator microstrip line and the radio frequency microstrip line can be determined from multiple different impedance values. For example, by matching the impedance value with the conversion loss and the worst isolation degree, it can be known that when the impedance value of the microstrip line is BΩ, the conversion loss of the IQ mixer is the lowest and the worst isolation degree is the largest, that is, the impedance values of the local oscillator microstrip line and the radio frequency microstrip line can be determined as BΩ; so that, while improving the isolation degree, the conversion loss is also reduced as much as possible, and the signal radiation between the first microwave signal transmitted on the local oscillator microstrip line and the XY signal transmitted on the radio frequency outer strip line is further reduced.

[0189] Furthermore, as Figure 9 shown, in the embodiment of the present application, the microstrip line 21047 in the cavity of the IQ mixer is welded to the port on the side of the cavity through the pad 210412. At this time, an absorbing material can be provided at the pad 210412; this absorbing material can be a graphene-based absorbing material, ferrite, SiC ceramic or Si3N4 ceramic material, etc., and specific details are not limited here. That is, an absorbing material can be provided near the port, and the signal radiation of the first microwave signal and the XY signal is absorbed by the absorbing material, further improving the isolation degree of the first microwave signal to the radio frequency port.

[0190] Combined with Figure 8As shown, the cavity of the IQ mixer further includes a base 21048; wherein, the circuit board 21041 is provided with a mounting hole 210413, through which the circuit board 21041 is mounted on the base 21048; wherein, absorbing material can be provided in the mounting hole 210413 to further reduce the signal radiation of the first microwave signal and the XY signal.

[0191] Furthermore, the cavity of the IQ mixer may also include a base 21048 and a cover plate 21049; a circuit board 21041 is disposed between the base 21048 and the cover plate 21049, and the base 21048 is provided with a groove 210481 corresponding to the circuit board 21041, that is, the volume of the groove 210481 matches the volume of the circuit board 21041, and the circuit board 21041 can be embedded in the groove 210481; the cover plate 21049 is fitted onto the end face of the opening of the groove 210481, wherein the cover plate 21049 can be installed by screws through threaded holes or by snap-fit, the specific method is not limited here. By mounting the circuit board 21041 within the recess 210481 and fitting the cover plate 21049 onto the end face of the opening of the recess 210481, a seamless seal can be achieved between the circuit board 21041, the base 21048, and the cover plate 21049. This ensures a seamless seal within the cavity structure of the IQ mixer, reducing the reflection of electromagnetic microwaves (the first microwave signal and the XY signal) within the cavity and thus minimizing the signal radiation of the first microwave signal and the XY signal. Furthermore, the ground hole of the circuit board 21041 is well-connected to the base 21048 to ensure proper grounding of the unused pins of the IQ mixer chip.

[0192] As can be seen, through the above embodiments, the signal radiation of the first microwave signal and the XY signal can be further reduced, and the isolation of the first microwave signal to the radio frequency port can be maintained above 40dB, effectively avoiding crosstalk between the first microwave signal and the XY signal in the IQ mixer.

[0193] In one feasible approach, when the pins of the IQ mixer chip are connected to the various ports of the IQ mixer via microstrip lines, the microstrip lines introduce environmental noise. Furthermore, the microstrip lines experience microwave signal attenuation when transmitting microwave signals (the first microwave signal or the XY signal), thus limiting the functionality of the IQ mixer in a quantum measurement and control system and reducing the signal-to-noise ratio (SNR) of the measurement and control. However, by reducing the signal radiation of the first microwave signal and the XY signal through the above embodiment, the environmental noise introduced by the microstrip lines can be effectively reduced, thus significantly improving the SNR of the measurement and control.

[0194] In one embodiment, the above-described quantum measurement and control system, referencing Figure 3As shown, the intermediate frequency arbitrary waveform transmitting unit 22 includes: a second functional motherboard (not shown); the second functional motherboard is used to receive intermediate frequency waveform parameter information sent by the host computer 1, and after receiving the trigger signal, generate at least one second DC signal and at least one pair of second differential pulse signals with preset waveforms according to the intermediate frequency waveform parameter information, mix each pair of second differential pulse signals with a phase-matched second DC signal to obtain a quantum bit frequency modulation signal, and send it to the quantum processor.

[0195] In this embodiment of the present invention, after receiving a trigger signal based on intermediate frequency waveform parameter information, the second functional motherboard generates at least one pair of first differential pulse signals. Each pair of second differential pulse signals includes two pulse signals with equal amplitude and opposite phase. Each pair of second differential pulse signals corresponds to a second DC signal. Each pair of second differential pulse signals and a matching second DC signal are mixed to obtain a quantum bit frequency modulation signal.

[0196] In this embodiment of the invention, the intermediate frequency arbitrary waveform transmitting unit 22 generates a second differential pulse signal and a second DC signal through a second functional motherboard. By mixing a pair of second differential pulse signals and a second DC signal, a quantum bit frequency modulation signal is obtained. Compared with the discrete intermediate frequency generators in the prior art, this invention achieves high integration of the intermediate frequency arbitrary waveform transmitting unit 22, eliminating the need for complex cabling and saving storage space. When configuring a quantum measurement and control cabinet, it saves rack space, fully utilizing space resources. With the rack size remaining unchanged, it can significantly improve efficiency. The quantum control cabinet increases the measurement and control capacity of qubits. Furthermore, since the second functional motherboard realizes the generation and processing of various signals, it communicates and interacts with the host computer 1 through the second functional motherboard. Unlike the existing technology where each device communicates and interacts with the host computer 1 separately, it saves communication switching time and improves real-time performance. At the same time, compared with the discrete intermediate frequency generator, it can significantly reduce the number of cables, reduce signal cable loss, reduce signal attenuation, thereby improving signal effectiveness, reducing signal noise, and improving the signal-to-noise ratio. This is beneficial to improving the measurement and control fidelity of the quantum logic gates of the quantum processor.

[0197] In one embodiment, the above-described quantum measurement and control system, referencing Figure 3 As shown, in the intermediate frequency arbitrary waveform transmitting unit 22, the second functional main board includes a second carrier board (not shown) and a second main control chip 2201, a second digital-to-analog converter 2202, a second DC generation chip 2204, and at least one second combiner 2203 disposed on the second carrier board. The second carrier board may be, for example, but is not limited to, a printed circuit board or other suitable component.

[0198] The second main control chip 2201 is connected to the second DC generation chip 2204 and the second digital-to-analog converter 2202 respectively.

[0199] The second DC generation chip 2204 and the second digital-to-analog converter 2202 are respectively connected to each of the second combiners 2203.

[0200] The second main control chip 2201 is used to receive the intermediate frequency waveform parameter information sent by the host computer 1, and after receiving the trigger signal, according to the intermediate frequency waveform parameter information, send a second pulse signal generation command to the second digital-to-analog converter 2202, and send a second DC generation control command to the second DC generation chip 2204.

[0201] The second digital-to-analog converter 2202 is used to generate at least one pair of second differential pulse signals with preset waveforms according to the second pulse signal generation instruction.

[0202] The second DC generation chip 2204 is used to generate at least one second DC signal according to the second DC generation control command;

[0203] The second combiner 2203 is used to mix a pair of second differential pulse signals and a phase-matched second DC signal to obtain the quantum bit frequency modulation signal.

[0204] In one specific embodiment, in the above-described quantum measurement and control system, reference is made to... Figure 3 As shown, the second combiner 2203 includes a second operational amplifier (not shown).

[0205] The second functional motherboard also includes at least one second filter 2205 disposed on the second carrier board.

[0206] The second filter 2205 is connected between the second DC generation chip 2204 and the corresponding second operational amplifier;

[0207] The second filter 2205 is used to filter the second DC signal to obtain a filtered second DC signal;

[0208] The second operational amplifier is used to combine a pair of second differential pulse signals and a filtered, phase-matched second DC signal to obtain the quantum bit frequency modulation signal.

[0209] In this embodiment of the utility model, reference is made to Figure 3As shown, the second main control chip 2201 of the above-mentioned intermediate frequency arbitrary waveform transmission unit 22 can be implemented by an FPGA, for example, but not limited to. The FPGA can be equipped with a second memory chip 2206. For example, the second memory chip 2206 includes two 8GB DDR4 high-speed running memory chips, providing sufficient hardware margin in terms of computing power, and each port can output an arbitrary waveform of up to 128ms.

[0210] In this embodiment of the utility model, reference is made to Figure 3 As shown, the second digital-to-analog converter 2202 of the above-mentioned intermediate frequency arbitrary waveform transmitting unit 22 can be a four-channel high-speed DAC with a bandwidth of 2.4 GSPS 16-bit, so as to meet the requirement of synchronously transmitting arbitrary waveforms and DC waveforms, including sine waves, square waves and higher-order waves, during measurement and control operations.

[0211] In this embodiment of the utility model, reference is made to Figure 3 As shown, the second combiner 2203 of the intermediate frequency arbitrary waveform transmitting unit 22, which converts differential signals to single-ended signals, adopts an operational amplifier. Furthermore, a second DC signal is generated by a second DC generation chip 2204, and then filtered by a second filter 2205. The second operational amplifier combines a pair of arbitrary waveform second differential pulse signals output by the second digital-to-analog converter 2202 with a filtered, phase-matched second DC signal. This not only improves the quality of the radio frequency signal and ensures that the signal is not distorted, but also eliminates the need for an additional differential-to-single-ended converter when building a quantum measurement and control cabinet, as is the case with existing technologies, thus reducing hardware costs and achieving the integration of the intermediate frequency arbitrary waveform transmitting unit 22.

[0212] As a specific example of the intermediate frequency arbitrary waveform transmitting unit 22 in this embodiment of the present invention, refer to... Figure 3 As shown, corresponding to the same second functional motherboard in the intermediate frequency arbitrary waveform transmitting unit 22, the second digital-to-analog converter 2202 uses a four-channel high-speed DAC with a bandwidth of 2.4 GSPS 16-bit to generate four pairs of second differential pulse signals; the second DC generation chip 2204 generates four channels of second DC signals. The four second filters 2205 of the intermediate frequency arbitrary waveform transmitting unit 22 filter these four channels of second DC signals respectively. Then, the four second operational amplifiers combine the four pairs of first differential pulse signals and the four filtered channels of second DC signals respectively to obtain four channels of second single-ended pulse signals, that is, four channels of quantum bit frequency modulation signals, which are then sent to the quantum processor. Assuming that the intermediate frequency arbitrary waveform transmitting unit 22 contains m second functional motherboards, then 4m channels of quantum bit frequency modulation signals can be obtained in the end, where m is a positive integer.

[0213] In some other embodiments, the second functional motherboard of the intermediate frequency arbitrary waveform transmitting unit 22 may be provided with at least one second operational amplifier and at least one corresponding number of second filters 2205.

[0214] In this embodiment of the utility model, reference is made to Figure 3 As shown, in the aforementioned intermediate frequency arbitrary waveform transmitting unit 22, the second functional motherboard further includes a second network port chip 2207 disposed on the second carrier board. This second network port chip 2207 is connected to the second main control chip 2201 and is used to communicate with the host computer 1 via an external network communication device 8. It receives the radio frequency waveform parameter information sent by the host computer 1 through the network communication device 8 and outputs it to the second main control chip 2201. The second network port chip 2207 connects to the network communication device 8 to achieve network communication with the host computer 1, receiving the intermediate frequency waveform parameter information from the network communication device 8 and outputting it to the second main control chip 2201. The network communication device 8 is communicatively connected to the host computer 1. Through network communication interaction via the network communication device 8, the host computer 1 can control different intermediate frequency arbitrary waveform transmitting units 22 separately, realize the superposition and connection of multiple intermediate frequency arbitrary waveform transmitting units 22, achieve unlimited superconducting multi-bit connections, and realize quantum processor measurement and control with an unlimited number of bits.

[0215] In this embodiment of the utility model, reference is made to Figure 3As shown, the intermediate frequency arbitrary waveform transmitting unit 22, the second functional motherboard further includes a second clock chip 2211 disposed on the second carrier board, used to convert the fourth clock signal into a fifth clock signal and output the fifth clock signal to the second main control chip 2201 and the second digital-to-analog converter 2202, etc. The fifth clock signal is the operating clock of the second main control chip 2201 and the second digital-to-analog converter 2202, etc. The second clock chip 2211 can, for example, perform frequency division / multiplication operations on the fourth clock signal to obtain a fifth clock signal with the frequency required by the other devices in the intermediate frequency arbitrary waveform transmitting unit 22. The fourth clock signal is, for example, a source clock signal. The fifth clock signal includes, for example, any one or more of the following clock signals: system clock signal, device clock signal, sampling clock signal, etc. The fourth clock signal is, for example, a clock signal after the first clock signal has been buffered and enhanced by a buffer circuit. The second functional motherboard may further include a second buffer circuit (not shown) for receiving a first clock signal output from the clock distribution unit 5 and performing buffer enhancement processing on the first clock signal to obtain the fourth clock signal. The second buffer circuit is disposed outside the second clock chip 2211 or integrated into the second clock chip 2211.

[0216] In this embodiment of the invention, the second buffer circuit may be integrated into the second clock chip 2211, disposed in other circuit modules or chips, or be an independent circuit module. Preferably, the second clock chip 2211 has the function of the second buffer circuit, thereby further improving the integration of the entire device.

[0217] In this embodiment of the utility model, reference is made to Figure 3 As shown, in the above-mentioned intermediate frequency arbitrary waveform transmission unit 22, the second functional motherboard also includes a second trigger buffer chip 2210 disposed on the second carrier board. The second trigger buffer chip 2210 is used to receive the trigger signal output from the trigger allocation unit 4, perform buffer enhancement processing on the received trigger signal, and output the processed trigger signal to the second main control chip 2201.

[0218] Optionally, refer to Figure 3 As shown, in the aforementioned intermediate frequency arbitrary waveform transmitting unit 22, the second functional motherboard further includes a second synchronization buffer chip 2209 disposed on the second carrier board. The second synchronization buffer chip 2209 is used to receive signals from the synchronization signal buffer distribution chip 3203 (see...). Figure 4The output synchronization signal is used to buffer and enhance the synchronization signal, and the processed synchronization signal is output to corresponding devices including the second main control chip 2201. The synchronization signal has the same or similar function as the trigger signal.

[0219] In one embodiment, refer to Figure 3 As shown, in the aforementioned intermediate frequency arbitrary waveform transmitting unit 22, the second functional motherboard further includes a second RS485 / 422 communication interface 2208 disposed on the second carrier board. The second RS485 / 422 communication interface 2208 is connected to the second main control chip 2201 and is used for communication with the host computer 1. The second RS485 / 422 communication interface 2208 is a spare interface.

[0220] Specifically, for example, when the second unit network port (not shown) of the intermediate frequency arbitrary waveform transmitting unit 22 is in service communication, the host computer 1 can monitor the second functional motherboard (e.g., monitor the temperature of the second main control chip 2201), issue commands, or restart and other related operations through the second RS485 / 422 communication interface 2208.

[0221] The second unit network port is, for example, a 1-to-more switch. The second unit network port serves as an interface between the internal and external systems. The 1-to-more switch is a 1-to-2, 1-to-3, or 1-to-3 or higher switch.

[0222] In the embodiments of this application, the second unit network port is a 1-to-2 switch. Accordingly, the unit network port is connected to two second functional motherboards inside the intermediate frequency arbitrary waveform transmitting unit 22, and externally connected to an external network communication device 8.

[0223] The quantum measurement and control system provided in this embodiment of the invention achieves high integration of the intermediate frequency arbitrary waveform transmission unit 22 by arranging different components such as the second main control chip 2201, the second digital-to-analog converter 2202, the second DC generation chip 2204, and the second combiner 2203 on the same second functional motherboard. This saves rack space when configuring the quantum measurement and control cabinet, fully utilizing space resources. Compared to the discrete intermediate frequency generators used in the prior art, this significantly increases the efficiency of the quantum measurement and control cabinet while maintaining the same rack size. The measurement and control capacity of the sub-qubits is increased. Furthermore, since multiple devices of the intermediate frequency arbitrary waveform transmission unit are set on the same functional motherboard and communicate with the host computer 1 through the second main control chip 2201, each device does not need to communicate with the host computer separately. Therefore, communication switching time is saved, and real-time performance is higher. At the same time, compared with the discrete intermediate frequency generator, the number of cables can be greatly reduced, the cable loss of the signal is reduced, the signal attenuation is reduced, thereby improving the effectiveness of the signal, reducing signal noise, and improving the signal-to-noise ratio, which is conducive to improving the measurement and control fidelity of the quantum logic gates of the quantum processor.

[0224] In one embodiment, the above-described quantum measurement and control system, referencing Figure 4 As shown, the radio frequency transmitting subunit 31 includes a third functional motherboard (not shown) and at least one second mixer 3104 disposed outside the third functional motherboard. The second mixer 3104 is, for example, but not limited to, an IQ mixer.

[0225] The third functional motherboard is connected to the at least one second mixer 3104.

[0226] The third functional motherboard is used to receive the read signal waveform parameter information sent by the host computer, and after receiving the trigger signal, generate at least one pair of third DC signals and at least two pairs of third differential pulse signals with preset waveforms according to the read signal waveform parameter information, and generate a second microwave signal. Each pair of third differential pulse signals is mixed with a phase-matched third DC signal to obtain at least two third single-ended pulse signals with a 90° phase difference, and output to the corresponding second mixer 3104. The generated second microwave signal is also output to the corresponding second mixer 3104.

[0227] The second mixer 3104 is used to mix the two third single-ended pulse signals with a 90° phase difference with the second microwave signal to obtain the read-in signal, and transmit the read-in signal to the resonant cavity in the quantum processor.

[0228] In this embodiment of the present invention, the cavity of the second mixer 3104 has a co-phase port (not shown) and a quadrature phase port (not shown) on one side opposite to the other two sides, and a local oscillator port (not shown) and a radio frequency port (not shown) on the other side. The co-phase port and the quadrature phase port are respectively connected to two signal output ports (not shown) on the third functional motherboard to receive the two third single-ended pulse signals with a 90° phase difference output from the two signal output ports. The local oscillator port is used to receive the second microwave signal. The second mixer 3104 performs mixing processing on the received two third single-ended pulse signals with a 90° phase difference and the second microwave signal to obtain the read signal.

[0229] In this embodiment of the invention, the third functional motherboard, upon receiving a trigger signal based on the read signal waveform parameter information, generates an even number of pairs of third differential pulse signals. Each pair of third differential pulse signals includes two pulse signals with equal amplitude and opposite phase. Each pair of third differential pulse signals corresponds to one third DC signal. Every two pairs of the third differential pulse signals are mixed with a matching pair of the third DC signals to obtain two third single-ended pulse signals with a 90° phase difference. That is, every pair of the third differential pulse signals is mixed with a matching third DC signal to obtain one of the two third single-ended pulse signals with a 90° phase difference. These two third single-ended pulse signals with a 90° phase difference are output to the same second mixer 3104 and mixed with a second microwave signal. For example, assuming the third functional motherboard is connected to i second mixers 3104, the third functional motherboard will generate 2i pairs of third differential pulse signals, i pairs of third DC signals, and i second microwave signals, where i is a positive integer.

[0230] In this embodiment of the invention, the radio frequency transmitting subunit 31 generates a third differential pulse signal, a third DC signal, and a second microwave signal via a third functional motherboard. It then mixes corresponding numbers of the third differential pulse signals and the third DC signal to obtain two third single-ended pulse signals with a 90° phase difference, which are output to the second mixer 3104. These are then mixed with a second microwave signal to obtain the read-in signal. This eliminates the need for complex cabling, saving storage space. When configuring a quantum measurement and control cabinet, it saves rack space, achieving full utilization of space resources. With the rack size remaining unchanged, it can significantly increase the usable space. This significantly increases the measurement and control capacity of the quantum bits in the quantum measurement and control cabinet. Furthermore, since the third functional motherboard realizes the generation and processing functions of multiple signals, it communicates and interacts with the host computer 1 through the third functional motherboard, eliminating the need for each device to communicate and interact with the host computer 1 separately as in existing technologies. Therefore, it saves communication switching time and improves real-time performance. At the same time, compared with the discrete RF generator, it can significantly reduce the number of cables, reduce the cable loss of the read signal, reduce signal attenuation, thereby improving signal effectiveness, reducing signal noise, and improving the signal-to-noise ratio, which is conducive to improving the measurement and control fidelity of the quantum logic gates of the quantum processor.

[0231] Reference Figure 4 As shown, the third functional motherboard includes a third carrier board (not shown) and a third main control chip 3101, a third digital-to-analog converter 3102, a third DC generation chip 3106, a second local oscillator microwave source 3105, and at least one pair of third combiners 3103 disposed on the third carrier board. The third carrier board may be, for example, but is not limited to, a printed circuit board or other suitable component.

[0232] The third main control chip 3101 is connected to the third digital-to-analog converter 3102, the third DC generation chip 3106, and the second local oscillator microwave source 3105, respectively.

[0233] The third digital-to-analog converter 3102 is connected to the at least one pair of third combiners 3103.

[0234] The output terminals of each pair of the third combiners 3103 are respectively connected to the in-phase port and the quadrature-phase port of the corresponding second mixer 3104, wherein the in-phase port and the quadrature-phase port of the second mixer 3104 are used to receive the two third single-ended pulse signals with a phase difference of 90°.

[0235] The third DC generation chip 3106 is connected to the at least one pair of third combiners 3103.

[0236] The second local oscillator microwave source 3105 is connected to the second mixer 3104.

[0237] The third main control chip 3101 is used to receive the read signal waveform parameter information sent by the host computer 1, and after receiving the trigger signal, according to the read signal waveform parameter information, send a third pulse signal generation instruction to the third digital-to-analog converter 3102, send a second microwave signal generation instruction to the second local oscillator microwave source 3105, and send a third DC generation control instruction to the third DC generation chip 3106.

[0238] The third digital-to-analog converter 3102 is used to generate at least two pairs of preset waveforms of third differential pulse signals according to the third pulse signal generation instruction.

[0239] The third DC generation chip 3106 is used to generate at least one pair of third DC signals according to the third DC generation control command;

[0240] The third combiner 3103 is used to mix a pair of the third differential pulse signals and a phase-matched third DC signal to obtain one of the two third single-ended pulse signals with a 90° phase difference, and outputs it to the corresponding second mixer 3104.

[0241] The second local oscillator microwave source 3105 is used to generate at least one second microwave signal according to the second microwave signal generation instruction, and output them to the corresponding second mixer 3104 respectively.

[0242] In one specific embodiment, in the above-described quantum measurement and control system, reference is made to... Figure 4 As shown, the third combiner 3103 includes a third operational amplifier (not shown).

[0243] The third functional motherboard also includes at least one pair of third filters 3107 disposed on the third carrier board.

[0244] The third DC generation chip 3106 is connected to the at least one pair of third filters 3107;

[0245] The third filter 3107 is connected to the corresponding third operational amplifier;

[0246] The third filter 3107 is used to filter the third DC signal to obtain a filtered third DC signal;

[0247] The third operational amplifier is used to combine a pair of the third differential pulse signals and a filtered third DC signal to obtain one of the two third single-ended pulse signals with a 90° phase difference.

[0248] In one specific embodiment, the non-inverting input of the third operational amplifier is used to receive one of the pair of third differential pulse signals and the filtered one-phase-matched third DC signal, and the inverting input of the third operational amplifier is used to receive the other of the pair of third differential pulse signals.

[0249] In one specific embodiment, in the above-described quantum measurement and control system, reference is made to... Figure 4 As shown, the radio frequency transmitting subunit 31 also includes at least one second attenuator 3108 disposed outside the third functional motherboard.

[0250] The second attenuator 3108 is connected to the second mixer 3104 and is used to adjust the amplitude of the input signal. The second attenuator 3108 can adjust the amplitude of the input signal, improving impedance matching.

[0251] In this embodiment of the invention, for example, the second attenuator 3108 may be disposed on one side of a dilution refrigerator having a quantum processor.

[0252] In this embodiment of the utility model, reference is made to Figure 4 As shown, the third main control chip 3101 of the above-mentioned radio frequency transmitting subunit 31 can be implemented by an FPGA, for example, but not limited to. The FPGA can be equipped with a third memory chip 3109. For example, the third memory chip 3109 includes two 8GB DDR4 high-speed running memory chips, providing sufficient hardware margin in terms of computing power, and each port can output arbitrary waveforms up to 128ms.

[0253] In this embodiment of the utility model, reference is made to Figure 4 As shown, the third digital-to-analog converter 3102 of the above-mentioned radio frequency transmitting subunit 31 can be a four-channel high-speed DAC with a bandwidth of 2.4 GSPS 16-bit, thereby enabling the synchronous transmission of arbitrary waveforms and DC waveforms, including sine waves, square waves and higher-order waves, during measurement and control operations.

[0254] In this embodiment of the utility model, reference is made to Figure 4 As shown, the third combiner 3103 of the radio frequency transmitting subunit 31, which converts differential signals to single-ended signals, uses an operational amplifier. Furthermore, a third DC signal is generated by a third DC generation chip 3106, and then filtered by a third filter 3107. The third operational amplifier combines a pair of arbitrary waveform third differential pulse signals output by the third digital-to-analog converter 3102 with a filtered, phase-matched third DC signal. This not only improves the quality of the radio frequency signal and ensures that the signal is not distorted, but also eliminates the need for an additional differential-to-single-ended converter when building a quantum measurement and control cabinet, as is the case with existing technologies, thus reducing hardware costs and achieving integration of the transmitting unit.

[0255] In this embodiment of the utility model, reference is made to Figure 4 As shown, the second mixer 3104 of the aforementioned radio frequency transmitting subunit 31 is, for example, a passive I / Q mixer. This second mixer 3104 can mix with the second microwave signal generated by the onboard second local oscillator microwave source 3105, or with an externally extended local oscillator microwave signal, to produce the read-in signal that the radio frequency transmitting subunit 31 needs to output. In this embodiment of the invention, the second mixer 3104 can be a passive I / Q mixer with a suitable shape, depending on the integration requirements.

[0256] Furthermore, in this embodiment of the invention, the shape and structure of the second mixer 3104 can be similar to the structure of the first mixer 2104 described above, and are also... Figure 5 The H-type IQ mixer shown avoids port compression between adjacent second mixers 3104, allowing multiple second mixers 3104 to be arranged compactly. Furthermore, the second mixers 3104 and the devices mounted on the third functional motherboard can be housed together in a drawer box, thus meeting the high-density installation requirements of the RF transmitter subunit 31. Additionally, no extra cables are required, or if cables are required, they do not occupy extra space and are easy to route, facilitating the miniaturization and integration of the entire quantum measurement and control system and the quantum computing device equipped with it.

[0257] However, alternatively, the first mixer 2104 may also be located outside the drawer box as needed. Specifically, the second mixer 3104 and the second attenuator 3108 may not be located on the third functional mainboard, and correspondingly, the third functional mainboard does not include the second mixer 3104 and the second attenuator 3108.

[0258] In this embodiment of the invention, the cavity of the second mixer 3104 includes a circuit board and an IQ mixer chip. The components of the second mixer 3104 satisfy the following relationship:

[0259] The IQ mixer chip is disposed on the circuit board. The in-phase pin of the IQ mixer chip is connected to the in-phase port, the quadrature phase pin of the IQ mixer chip is connected to the quadrature phase port, the local oscillator pin of the IQ mixer chip is connected to the local oscillator port, and the radio frequency pin of the IQ mixer chip is connected to the radio frequency port.

[0260] The in-phase port and the quadrature phase port are respectively connected to the corresponding third combiner 3103. The in-phase port is used to receive one of the two third single-ended pulse signals with a phase difference of 90°, and the quadrature phase port is used to receive the other of the two third single-ended pulse signals with a phase difference of 90°.

[0261] The local oscillator port is connected to the second local oscillator microwave source 3105 and is used to receive the second microwave signal;

[0262] The circuit board has a ground hole, and the unused pins of the IQ mixer chip are grounded through the ground hole of the circuit board.

[0263] Specifically, the second mixer 3104 is an H-type IQ mixer, and its structure can be referred to the above. Figures 5 to 11 The detailed description of the IQ mixer shown is omitted here.

[0264] It is understood that, in this embodiment of the invention, the second mixer 3104 employs... Figure 5 The H-type IQ mixer shown above, its specific structure and corresponding beneficial effects can be referred to the above. Figures 5 to 11 The detailed description of the IQ mixer and other components shown will not be repeated here.

[0265] It is understood that in this embodiment of the present invention, the two third single-ended pulse signals with a 90° phase difference include an in-phase intermediate frequency signal and a quadrature phase intermediate frequency signal. The H-type IQ mixer performs up-conversion. The in-phase port 21043 (I-port) and the quadrature phase port 21044 (Q-port) of the IQ mixer respectively input (IN) a pair of in-phase intermediate frequency signals and quadrature phase intermediate frequency signals transmitted by the third combiner 3103. At the same time, the local oscillator port 21045 (LO port) inputs the second microwave signal, i.e., the local oscillator signal. After the IQ mixer mixes the in-phase intermediate frequency signal and the quadrature phase intermediate frequency signal with the second microwave signal, it outputs (OUT) a read-in signal Read In through the radio frequency port 21046 (RF port).

[0266] In this embodiment of the utility model, reference is made to Figure 4 As shown, the second local oscillator microwave source 3105 of the aforementioned radio frequency transmitting subunit 31 can be a chip, such as, but not limited to, a 2-channel 3.5GHz-8.5GHz onboard microwave source, thereby saving the cost of purchasing additional microwave source equipment and further saving storage space in the radio frequency transmitting subunit 31; and since the third main control chip 3101 is connected to the second local oscillator microwave source 3105, the second local oscillator microwave source 3105 is controlled by the third main control chip 3101, further reducing the communication switching time and thus improving the real-time performance of measurement and control.

[0267] In this embodiment of the utility model, reference is made to Figure 4 As shown, the specific structure of the radio frequency transmitting subunit 31 is similar to that of the radio frequency arbitrary waveform transmitting unit 21 described above. Through the third digital-to-analog converter 3102, the second local oscillator microwave source 3105, the third DC generation chip 3106, four third filters 3107, four third operational amplifiers and two second mixers 3104, two input signals are finally processed. For its specific implementation, please refer to the detailed description of the radio frequency arbitrary waveform transmitting unit 21 described above.

[0268] In this embodiment of the invention, the third functional motherboard of the radio frequency transmitting subunit 31 has two third operational amplifiers and two third filters 3107s in each pair. In other embodiments, the third functional motherboard may be provided with at least one pair of third operational amplifiers and at least one corresponding pair of third filters 3107s, and each pair of third operational amplifiers and each pair of third filters 3107 is connected to a second mixer 3104.

[0269] In this embodiment of the utility model, reference is made to Figure 4 As shown, in the aforementioned radio frequency transmitting subunit 31, the third functional motherboard further includes a third network port chip 3110 disposed on the third carrier board. This third network port chip 3110 is connected to the aforementioned third main control chip 3101 and is used to communicate with the host computer 1 via an external network communication device 8. The network communication device 8 receives the read signal waveform parameter information sent by the host computer 1 and outputs it to the third main control chip 3101. Through the connection between the third network port chip 3110 and the network communication device 8, network communication with the host computer 1 is achieved. The third network port chip 3110 receives the read signal waveform parameter information from the network communication device 8 and outputs it to the third main control chip 3101. The network communication device 8 is communicatively connected to the host computer 1. Through network communication interaction via the network communication device 8, the host computer 1 can control different radio frequency transmitting subunits 31 separately, achieve the superposition and connection of multiple radio frequency transmitting subunits 31, realize unlimited superconducting multi-bit connections, and achieve quantum processor measurement and control with an unlimited number of bits.

[0270] In this embodiment of the utility model, reference is made to Figure 4As shown, in the aforementioned RF transmitting subunit 31, the third functional motherboard further includes a third clock chip 3114 disposed on the third carrier board, used to convert the sixth clock signal into a seventh clock signal and output the seventh clock signal to devices such as the third main control chip 3101, the third digital-to-analog converter 3102, and the second local oscillator microwave source 3105. The seventh clock signal is the operating clock of devices such as the third main control chip 3101, the third digital-to-analog converter 3102, and the second local oscillator microwave source 3105. The third clock chip 3114 can, for example, perform frequency division / multiplication operations on the sixth clock signal to obtain a seventh clock signal with the frequency required by the other devices in the RF transmitting subunit 31. The sixth clock signal is, for example, a source clock signal. The seventh clock signal includes, for example, any one or more of clock signals such as a system clock signal, a device clock signal, and a sampling clock signal. The sixth clock signal is, for example, a clock signal after the first clock signal has been buffered and enhanced by a buffer circuit. The first functional motherboard may further include a third buffer circuit (not shown) for receiving a first clock signal output from the clock distribution unit 5 and performing buffer enhancement processing on the first clock signal to obtain the sixth clock signal. The third buffer circuit is disposed outside the third clock chip 3114 or integrated into the third clock chip 3114.

[0271] In this embodiment of the invention, the third buffer circuit may be integrated into the third clock chip 3114, disposed in other circuit modules or chips, or be an independent circuit module. Preferably, the third clock chip 3114 has the function of the third buffer circuit, thereby further improving the integration of the entire device.

[0272] In this embodiment of the utility model, reference is made to Figure 4 As shown, in the above-mentioned radio frequency transmitting subunit 31, the third functional motherboard also includes a third trigger buffer chip 3113 disposed on the third carrier board. The third trigger buffer chip 3113 is used to receive the trigger signal output from the trigger allocation unit 4, perform buffer enhancement processing on the received trigger signal, and output the processed trigger signal to the third main control chip 3101.

[0273] Optionally, refer to Figure 4 As shown, in the above-mentioned radio frequency transmitting subunit 31, the third functional motherboard also includes a third synchronization buffer chip 3112 disposed on the third carrier board. The third synchronization buffer chip 3112 is used to receive signals from the synchronization signal buffer distribution chip 3203 (see...). Figure 4The output synchronization signal is used to buffer and enhance the synchronization signal, and the processed synchronization signal is output to corresponding devices including the third main control chip 3101. The synchronization signal has the same or similar function as the trigger signal.

[0274] In one embodiment, refer to Figure 4 As shown, in the aforementioned radio frequency transmitting subunit 31, the third functional motherboard further includes a third RS485 / 422 communication interface 3111 disposed on the third carrier board. The third RS485 / 422 communication interface 3111 is connected to the third main control chip 3101 and is used for communication with the host computer 1. The third RS485 / 422 communication interface 3111 is a spare interface.

[0275] Specifically, for example, when the third unit network port (not shown) of the radio frequency transmitting subunit 31 is in service communication, the host computer 1 can monitor the third functional motherboard (e.g., monitor the temperature of the third main control chip 3101), issue commands, or restart and other related operations through the third RS485 / 422 communication interface 3111.

[0276] The third unit network port serves as an interface between the internal and external systems. In an embodiment of this application, the unit network port is internally connected to a third functional motherboard within the radio frequency transmitting subunit 31, and externally connected to an external network communication device 8.

[0277] The quantum measurement and control system provided in this embodiment of the invention achieves high integration of the radio frequency transmission subunit 31 by arranging different components such as the third main control chip 3101, the third digital-to-analog converter 3102, the third combiner 3103, the third DC generation chip 3106, and the second local oscillator microwave source 3105 on the same third functional motherboard. This saves rack space when configuring the quantum measurement and control cabinet, fully utilizing space resources. Compared to the discrete transmission unit schemes used in the prior art, this significantly increases the efficiency of the quantum measurement and control cabinet while maintaining the same rack size. The measurement and control capacity of the sub-bits is increased. Furthermore, since multiple devices of the RF transmitting subunit 31 are set on the same functional motherboard and communicate with the host computer 1 through the third main control chip 3101, each device does not need to communicate with the host computer 1 separately. Therefore, communication switching time is saved and real-time performance is higher. At the same time, compared with the discrete RF transmitting subunit, the number of cables can be greatly reduced, the cable loss of the read signal is reduced, the signal attenuation is reduced, thereby improving the effectiveness of the signal, reducing signal noise, and improving the signal-to-noise ratio, which is conducive to improving the measurement and control fidelity of the quantum logic gates of the quantum processor.

[0278] In this embodiment of the invention, the radio frequency (RF) transmitting subunit 31 and the RF arbitrary waveform transmitting unit 21 can adopt the same or similar structures. The frequency range of the RF signal that the RF transmitting unit can output is, for example, but not limited to, 1 GHz to 20 GHz. When the RF arbitrary waveform transmitting unit 21 is a component of the transmitting unit 2, the transmitted RF signal is used as a quantum bit driving signal, and its frequency range is, for example, but not limited to, 4 GHz to 6 GHz. When the RF transmitting subunit 31 is a component of the quantum analysis unit 3, the transmitted RF signal is used as a read-in signal, and its frequency range is, for example, but not limited to, 6 GHz to 8 GHz.

[0279] In one embodiment, the above-described quantum measurement and control system, referencing Figure 4 As shown, the acquisition subunit 32 includes a fourth functional motherboard (not shown) and at least one demodulator 3205 disposed outside the fourth functional motherboard.

[0280] The fourth functional motherboard is connected to the at least one demodulator 3205.

[0281] The demodulator 3205 is used to receive the readout signal output from the quantum processor, and to perform frequency mixing processing on the readout signal and the input third microwave signal to demodulate and obtain a fourth single-ended pulse signal.

[0282] The fourth functional motherboard is used to convert each of the fourth single-ended pulse signals into a pair of fourth differential pulse signals, process each pair of fourth differential pulse signals to obtain quantum measurement and control experimental results, process the quantum measurement and control experimental results, and return the processed quantum computing results to the host computer.

[0283] In this embodiment of the present invention, the acquisition subunit 32 mixes the received readout signal with a third microwave signal through a demodulator to obtain a fourth single-ended pulse signal. The fourth functional motherboard converts each fourth single-ended pulse signal into a corresponding pair of fourth differential pulse signals and processes them to obtain the quantum computing result. The high integration of the acquisition subunit 32 eliminates the need for complex cabling, saving storage space. When configuring a quantum measurement and control cabinet, it conserves rack space, maximizing space utilization. Without changing the rack size, it significantly increases the measurement and control capacity of the quantum bits within the cabinet. Furthermore, since the fourth functional motherboard implements signal processing, it communicates with the host computer 1 to send quantum computing results, eliminating the need for each device to communicate with the host computer individually, as in existing technologies. This saves communication switching time and improves real-time performance. Compared to discrete quantum analyzers, it significantly reduces the number of cables, lowers cable loss in readout signals, and reduces signal attenuation, thereby improving signal effectiveness, reducing noise, and increasing the signal-to-noise ratio. This enhances the measurement and control fidelity of the quantum logic gates in the quantum processor.

[0284] In this embodiment of the utility model, reference is made to Figure 4 As shown, in the aforementioned acquisition subunit 32, the fourth functional motherboard includes a fourth carrier board (not shown) and a fourth main control chip 3201, an analog-to-digital converter 3204, and at least one single-ended to differential converter 3210 disposed on the fourth carrier board. The fourth carrier board may be, for example, but is not limited to, a printed circuit board or other suitable component.

[0285] The fourth main control chip 3201, the analog-to-digital converter 3204, and each of the single-ended to differential converters 3210 are respectively connected.

[0286] Each of the single-ended to differential converters 3210 is connected to the corresponding demodulator 3205.

[0287] The single-ended to differential converter 3210 is used to convert the fourth single-ended pulse signal into a pair of the fourth differential pulse signals.

[0288] The analog-to-digital converter 3204 is used to process each pair of the fourth differential pulse signals to obtain the quantum measurement and control experiment results and send them to the fourth main control chip 3201.

[0289] The fourth main control chip 3201 is used to process the received quantum measurement and control experiment results and return the processed quantum computing results to the host computer 1.

[0290] In one specific embodiment, the single-ended to differential converter 3210 may employ a balun transformer, as is common in the art. The demodulator 3205 may also employ a single-ended mixer, as is common in the art.

[0291] In one specific embodiment, reference is made to Figure 4 As shown, the second local oscillator microwave source 3105 is also connected to the at least one demodulator 3205 for generating at least one of the third microwave signals.

[0292] In another specific embodiment, refer to Figure 4 As shown, in the acquisition subunit 32, the fourth functional motherboard also includes a third local oscillator microwave source 3206 disposed on the fourth carrier board;

[0293] The fourth main control chip 3201 is also used to send a third microwave signal generation instruction to the third local oscillator microwave source;

[0294] The third local oscillator microwave source 3206 is connected to the at least one demodulator 3205 and is used to generate at least one third microwave signal according to the third microwave signal generation instruction.

[0295] It should be noted that, referring to Figure 4 In the quantum analysis unit shown, the third local oscillator microwave source 3206 of the acquisition subunit 32 is integrated into the fourth functional motherboard of the acquisition subunit 32 as a backup device. The third local oscillator microwave source 3206 is not connected to the demodulator 3205 in the figure.

[0296] In this embodiment of the utility model, reference is made to Figure 4 As shown, in the above-mentioned acquisition subunit 32, the fourth functional motherboard also includes a trigger control pulse chip 3202 disposed on the fourth carrier board;

[0297] The fourth main control chip 3201 is also used to receive the measurement and control trigger command from the host computer 1 and send the trigger signal generation command to the trigger control pulse chip 3202;

[0298] The trigger control pulse chip 3202 is used to receive the measurement and control trigger command and generate the trigger signal.

[0299] In this embodiment of the utility model, reference is made to Figure 4 As shown, in the above-mentioned acquisition subunit 32, the fourth functional motherboard also includes a synchronization signal buffer distribution chip 3203 disposed on the fourth carrier board;

[0300] The fourth main control chip 3201 is also used to receive the synchronization signal trigger instruction from the host computer and send the synchronization signal buffer allocation chip 3203 a synchronization signal generation instruction.

[0301] The synchronization signal buffer allocation chip 3203 is used to generate a synchronization signal after receiving a synchronization signal generation instruction.

[0302] In one embodiment, the above-described quantum measurement and control system, referencing Figure 1 As shown, it also includes a clock switching module 7 and a temperature-compensated clock chip (not shown).

[0303] The temperature-compensated clock chip is integrated into the transmitting unit 2 or the quantum analysis unit 3, and the temperature-compensated clock chip is used to generate the first clock signal.

[0304] The clock switching module 7 has its input terminals connected to the temperature-compensated clock chip and an external clock source, respectively; the external clock source is used to provide the first clock signal.

[0305] The output of the clock switching module 7 is connected to the clock distribution unit 5.

[0306] The clock switching module 7 is used to switch the input of the temperature-compensated clock chip or the first clock signal emitted by the clock source.

[0307] In one specific embodiment, the temperature-compensated clock chip can be deployed on the first functional motherboard of the RF arbitrary waveform transmitting unit 21, the second functional motherboard of the intermediate frequency arbitrary waveform transmitting unit 22, the third functional motherboard of the RF transmitting subunit 31, or the fourth functional motherboard of the acquisition subunit 32. This further improves the integration of the quantum measurement and control system.

[0308] In one embodiment, refer to Figure 4 As shown, in the acquisition subunit 32, the fourth functional motherboard also includes at least one low-frequency amplifier 3207 disposed outside the fourth carrier board.

[0309] The low-frequency amplifier 3207 is connected to the corresponding demodulator 3205 and is used to amplify the readout signal and send it to the demodulator 3205.

[0310] In this embodiment, the low-frequency amplifier 3207 is disposed outside the fourth carrier plate. For example, the low-frequency amplifier 3207 may be disposed on the side of a dilution refrigerator with a quantum processor.

[0311] In this embodiment of the utility model, reference is made to Figure 4 As shown, the fourth main control chip 3201 of the above-mentioned acquisition subunit 32 can be implemented by an FPGA, for example, but not limited to. The FPGA can be equipped with a fourth memory chip 3208. For example, the fourth memory chip 3208 includes two 8GB DDR4 high-speed running memory chips, providing sufficient hardware margin in terms of computing power.

[0312] In this embodiment of the utility model, reference is made to Figure 4 As shown, the single-ended to differential converter 3210 described above realizes single-ended to differential signal processing, avoiding the need to prepare an additional single-ended to differential converter when building a quantum measurement and control system, and realizing the integration of the acquisition subunit 32.

[0313] In this embodiment of the utility model, reference is made to Figure 4 As shown, the analog-to-digital converter 3204 of the acquisition subunit 32 can be a 14-bit, 1.0-GSPS high-speed ADC acquisition chip, which can down-convert the quantum computing results fed back by the quantum processor in the dilution refrigerator for signal acquisition and analysis.

[0314] In this embodiment of the utility model, reference is made to Figure 4 As shown, in the aforementioned acquisition subunit 32, the fourth functional motherboard also includes a fourth network port chip 3209 disposed on the fourth carrier board. This fourth network port chip 3209 is connected to the aforementioned fourth main control chip 3201 and is used to communicate with the host computer 1 via an external network communication device 8. Through the connection of the fourth network port chip 3209 to the network communication device 8, network communication with the host computer 1 is achieved. Through network communication interaction via the network communication device 8, the host computer 1 can control different acquisition subunits separately, enabling multiple acquisition subunits 32 to be superimposed and connected, achieving unlimited superconducting multi-qubit connections, and realizing quantum processor measurement and control with an unlimited number of qubits.

[0315] In this embodiment of the utility model, reference is made to Figure 4As shown, in the aforementioned acquisition subunit 32, the fourth functional motherboard further includes a fourth clock chip 3211 disposed on the fourth carrier board, used to convert the eighth clock signal into a ninth clock signal and output the ninth clock signal to devices such as the fourth main control chip 3201, the analog-to-digital converter 3204, and the third local oscillator microwave source 3206. The ninth clock signal is the operating clock of devices such as the second main control chip 2201, the analog-to-digital converter 3204, and the third local oscillator microwave source 3206. The fourth clock chip 3211 can, for example, perform frequency division / multiplication operations on the eighth clock signal to obtain a ninth clock signal with the frequency required by the other devices in the acquisition subunit 32. The eighth clock signal is, for example, a source clock signal. The ninth clock signal includes, for example, any one or more of clock signals such as a system clock signal, a device clock signal, and a sampling clock signal. The eighth clock signal is, for example, a clock signal after the first clock signal has been buffered and enhanced by a buffer circuit. The fourth functional motherboard may further include a fourth buffer circuit (not shown) for receiving a first clock signal output from the clock distribution unit 5 and performing buffer enhancement processing on the first clock signal to obtain the eighth clock signal. The fourth buffer circuit is disposed outside the fourth clock chip 3211 or integrated into the fourth clock chip 3211.

[0316] In this embodiment of the invention, the fourth buffer circuit may be integrated into the fourth clock chip 3211, disposed in other circuit modules or chips, or be an independent circuit module. Preferably, the fourth clock chip 3211 has the function of the fourth buffer circuit, thereby further improving the integration of the entire device.

[0317] In one embodiment, in the above-described quantum measurement and control system, the fourth functional mainboard page in the acquisition subunit 32 may include a fourth RS485 / 422 communication interface (not shown) deployed on the fourth carrier board as a backup interface for communication with the host computer 1. The specific implementation process can be found in the detailed descriptions of the first RS485 / 422 communication interface 2111, the second RS485 / 422 communication interface 2208, or the third RS485 / 422 communication interface 3111, which will not be repeated here.

[0318] The quantum measurement and control system provided in this embodiment of the invention achieves high integration of the acquisition subunit 32 by arranging the fourth main control chip 3201, analog-to-digital converter 3204, and single-ended to differential converter 3210 of the acquisition subunit 32 on the same fourth functional motherboard. This also saves rack space when configuring the quantum measurement and control cabinet, fully utilizing space resources. Compared to quantum analyzers using discrete solutions in the prior art, this significantly increases the measurement and control capacity of the quantum bits in the quantum measurement and control cabinet without changing the rack size. Furthermore, due to the multiple acquisition subunits... All devices are mounted on the same functional motherboard and communicate with the host computer 1 through the fourth main control chip 3201, sending the quantum computing results to the host computer 1. Each device does not need to communicate and interact with the host computer 1 individually, thus saving communication switching time and improving real-time performance. At the same time, compared with discrete quantum analyzers, the number of cables can be significantly reduced, reducing cable loss of readout signals and reducing readout signal attenuation, thereby improving signal effectiveness, reducing signal noise, and improving the signal-to-noise ratio. This is beneficial to improving the measurement and control fidelity of the quantum logic gates of the superconducting quantum chip.

[0319] In one embodiment, the above-described quantum measurement and control system, referencing Figure 1 As shown, the network communication device 8 is connected to at least one transmitting unit 2 and at least one quantum analysis unit 3 via network cables of equal length. Specifically, it connects each radio frequency arbitrary waveform transmitting unit 21, intermediate frequency arbitrary waveform transmitting unit 22, radio frequency transmitting subunit 31, and acquisition subunit 32 via network cables of equal length. This avoids uneven signal delay transmission time and ensures consistent signal transmission.

[0320] The quantum measurement and control system provided in this embodiment includes a transmitting unit 2 comprising at least one intermediate frequency arbitrary waveform transmitting unit 22 and at least one radio frequency arbitrary waveform transmitting unit 21. Each intermediate frequency arbitrary waveform transmitting unit 22 and each radio frequency arbitrary waveform transmitting unit 21 can be integrated using components such as a functional motherboard. Similarly, for the quantum analysis unit 3, its internal radio frequency transmitting subunit 31 and acquisition subunit 32 are highly integrated using components such as a functional motherboard. This design improves the integration of the entire measurement and control system. On the one hand, it greatly reduces the space required for the quantum measurement and control system, lowers hardware costs, and makes it easier to quickly build the quantum measurement and control system. On the other hand, the high integration also greatly reduces the amount of complex cables used, and the measurement and control capacity of the qubits can be greatly increased within the same physical space, thus improving the functionality and application range of the measurement and control system.

[0321] In this embodiment of the present invention, in the above-mentioned quantum measurement and control system, both the transmitting unit 2 and the quantum analysis unit 3 may adopt the improved scheme provided by this embodiment of the present invention; or, the transmitting unit 2 may adopt the improved scheme provided by this embodiment of the present invention, while the quantum analysis unit 3 may adopt the scheme of the prior art; or, the transmitting unit 2 may adopt the implementation scheme in the prior art, while the quantum analysis unit 3 may adopt the improved scheme provided by this embodiment of the present invention.

[0322] In this embodiment of the invention, the trigger allocation unit 4 can be implemented using multiple trigger buffers. For example, refer to... Figure 12 As shown, the trigger allocation unit 4 includes six 1-to-5 trigger buffers, including one main trigger buffer 401 and five sub-trigger buffers 402. The main trigger buffer 401 divides the trigger signal into five synchronous trigger signals, and then the five sub-trigger buffers 402 further divide these five trigger signals into five synchronous trigger signals, finally outputting 25 synchronous trigger signals. In this embodiment of the invention, the trigger signal can come from an external trigger source, or be a trigger signal generated by the trigger control pulse chip 3202 of the acquisition subunit 32 of the quantum analysis unit 3. Of course, in some other embodiments, it can also be a trigger signal generated by the trigger control pulse chip (not shown in the figure) integrated in the RF arbitrary waveform transmission unit 21, the intermediate frequency arbitrary waveform transmission unit 22, or the RF transmission subunit 31. Through trigger signal buffer allocation, real-time synchronous start of the transmission alignment function is achieved. The trigger signal buffer allocation process does not cause any attenuation of the trigger signal, ensuring that the output amplitude of the trigger signal meets the requirements.

[0323] In this embodiment of the invention, the clock distribution unit 5 can be implemented using multiple clock buffers. For example, refer to... Figure 13 As shown, the clock distribution unit 5 includes six 1-to-5 clock buffers, including one master clock buffer 501 and five sub-clock buffers 502. The master clock buffer 501 divides the first clock synchronization signal into five synchronized first clock signals, and then the five sub-clock buffers 502 further divide these five first clock signals into five synchronized first clock signals, finally outputting 25 synchronized first clock signals. The clock distribution unit 5 can buffer and distribute the first clock signal input from a temperature-compensated clock or an external clock source to each transmitting unit 2 and quantum analysis unit 3. Through the buffering and distribution of the first clock signal, real-time synchronization and clock alignment are achieved. The buffering and distribution process of the first clock signal does not cause any attenuation of the clock signal, ensuring that the clock signal output amplitude meets the requirements.

[0324] In one embodiment, the above-described quantum measurement and control system, referencing Figure 1 and Figure 14As shown, the system also includes at least one power distribution unit 6.

[0325] The power distribution unit 6 is connected to at least one transmitter unit 2, at least one quantum analysis unit 3, at least one trigger distribution unit 4 and at least one clock distribution unit 5 respectively.

[0326] In one embodiment, the above-described quantum measurement and control system, referencing Figure 14 As shown, the power distribution unit 6 includes a mechanical power switch 601, a power filter 602, a self-locking push-button switch 604, a splitter 605, at least one power conversion module 606, and a power output connector 607.

[0327] The mechanical power switch 601, the power filter 602, the splitter 605, the at least one power conversion module 606, and the power output connector 607 are connected in sequence.

[0328] The self-locking push-button switch 604 is connected between the splitter 605 and the at least one power conversion module 606.

[0329] The mechanical power switch 601 is used to connect or disconnect the electrical connection with an external input power source (not indicated).

[0330] The power filter 602 is used to filter the input AC voltage signal of the input power supply.

[0331] The self-locking push-button switch 604 is used to connect or disconnect the electrical connection between the splitter 605 and the input terminal of at least one of the power conversion modules 606.

[0332] The splitter 605 is used to split the filtered input AC voltage signal into at least one filtered input AC voltage signal.

[0333] The power conversion module 606 is used to convert the filtered input AC voltage signal into at least one corresponding DC voltage signal.

[0334] The power output connector 607 is used to output each of the DC voltage signals to the corresponding quantum analysis unit 3, the transmitting unit 2, the trigger distribution unit 4, and the clock distribution unit 5.

[0335] In one specific embodiment, the power output connector 607 is specifically used to output each of the DC voltage signals to the first and second functional motherboards of the corresponding transmitting unit 2, the third and fourth functional motherboards of the quantum analysis unit 3, the trigger allocation unit 4, and the clock allocation unit 5.

[0336] In one specific embodiment, the power distribution unit 6 may further include a fuse 603, which is connected between the mechanical power switch 601 and the input power.

[0337] In this embodiment of the invention, the splitter 605 can be a 1-to-3 splitter 605 or other multi-channel splitter 605, which splits the filtered input AC voltage signal into a corresponding number of filtered input AC voltage signals. The power conversion module 606 can convert the AC voltage signal of input power supply (AC110V-250V) into multiple DC voltage signals, such as 12V DC voltage signals, with a power of, for example, 100W. Correspondingly, one output terminal of each power conversion module 606 is connected to a power output connector 607, which is connected to each quantum analysis unit 3, transmitting unit 2, trigger distribution unit 4, and clock distribution unit 5 that require power, outputting each DC voltage signal to the corresponding quantum analysis unit 3, transmitting unit 2, trigger distribution unit 4, and clock distribution unit 5. The power output connector 607 can be an aviation power output connector, or other compatible output connectors.

[0338] In use, the power distribution unit 6 provided in this embodiment requires first turning on the mechanical power switch 601 to connect to the external input power supply, thus powering on the power distribution unit 6. Then, the self-locking push-button switch 604 is turned on to connect the output terminal of the splitter 605 to the input terminal of at least one power conversion module 606, powering on the power conversion modules 606 in each path of the power distribution unit 6, enabling each path to output a DC voltage signal (12V). The self-locking push-button switch 604 avoids the instantaneous surge impact of a single mechanical power switch 601 upon power-on and the arcing caused by the large current surge, which shortens the service life of the mechanical power switch 601. Each DC voltage signal is output through an independent path, avoiding the influence of mutual ripple fluctuations caused by power imbalances between channels.

[0339] In an optional embodiment, refer to Figure 16 As shown, the quantum measurement and control system further includes at least one first drawer box 2100, at least one second drawer box 2200, and at least one third drawer box 3100.

[0340] The first functional motherboard is housed in the corresponding first drawer box 2100; at least one first mixer 2104 connected to the first functional motherboard is housed in the first drawer box 2100 or disposed outside the first drawer box 2100.

[0341] The second functional motherboard is housed in the corresponding second drawer box 2200.

[0342] The third and fourth functional motherboards are housed in the corresponding third drawer box 3100; at least one second mixer 3104 connected to the third functional motherboard is housed in the third drawer box 3100 or disposed outside the third drawer box 3100; at least one demodulator 3205 connected to the fourth functional motherboard is housed in the third drawer box 3100 or disposed outside the third drawer box 3100.

[0343] In this embodiment of the present invention, the at least one first drawer box 2100, the at least one second drawer box 2200 and the at least one third drawer box 3100 described above can be arranged in the rack 200 of the quantum measurement and control cabinet.

[0344] In one specific embodiment, the number of quantum bit frequency modulation signals output by the intermediate frequency arbitrary waveform transmitting unit 22 is twice that of the quantum bit driving signals output by the radio frequency arbitrary waveform transmitting unit 21.

[0345] The number of the at least one first drawer box 2100 is twice the number of the at least one second drawer box 2200, and each second drawer box 2200 is disposed between two first drawer boxes 2100.

[0346] At least one of the first functional motherboards is placed inside the first drawer box 2100.

[0347] The second drawer box 2200 contains the same number of second functional motherboards as the at least one first functional motherboard.

[0348] In one specific embodiment, reference is made to Figure 16 As shown, the quantum measurement and control system further includes at least one fourth drawer box 410 and at least one fifth drawer box 510.

[0349] The trigger allocation unit 4 is housed in the corresponding fourth drawer box 410.

[0350] The clock distribution unit 5 is housed in the corresponding fifth drawer box 510.

[0351] The at least one fourth drawer box 410 and the at least one fifth drawer box 510 may also be arranged within the rack 200.

[0352] In one specific embodiment, reference is made to Figure 16 As shown, the quantum measurement and control system also includes: a sixth drawer box 610;

[0353] The power distribution unit 6 is housed in the sixth drawer box 610.

[0354] The sixth drawer box 610 can also be arranged inside the rack 200.

[0355] In one specific embodiment, refer to Figure 16 As shown, the quantum measurement and control system further includes: a seventh drawer box 710; the aforementioned network communication device 8 can be housed in the seventh drawer box 710;

[0356] The seventh drawer box 710 can also be arranged inside the rack 200.

[0357] To provide a more detailed description of the quantum measurement and control system provided in this embodiment of the invention, the following is in conjunction with... Figures 1 to 16 The measurement and control implementation process of this quantum measurement and control system is described in detail below:

[0358] According to the needs of test and control, the measurement and control personnel connect at least one quantum analysis unit 3 and at least one transmission unit 2 of the quantum measurement and control system 100 to the host computer 1, and connect the trigger allocation unit 4 and the clock allocation unit 5 to the corresponding quantum analysis unit 3 and transmission unit 2 respectively.

[0359] For example, the quantum measurement and control system may include a main body arranged within the rack 200 and other parts arranged on one side of the dilution refrigerator. Specifically, assuming the rack 200 is a 22U rack, the first functional motherboard of the radio frequency arbitrary waveform transmission unit 21 can be housed in the first drawer box 2100, the second functional motherboard of the intermediate frequency arbitrary waveform transmission unit 22 can be housed in the second drawer box 2200, the third functional motherboard of the radio frequency transmission subunit 31 and the fourth functional motherboard of the acquisition subunit 32 of the quantum analysis unit 3 can be housed in the third drawer box 3100, the trigger distribution unit 4 can be housed in the fourth drawer box 410, the clock distribution unit 5 can be housed in the fifth drawer box 510, and the power distribution unit 6 can be housed in the sixth drawer box 610. The network communication device 8 used for communication between the quantum measurement and control system and the host computer is housed in the seventh drawer box 710. Then, the various drawer boxes are stacked vertically within the rack 200 according to the predetermined arrangement, assembling into a quantum measurement and control cabinet. Communication between the quantum analysis unit 3 and the transmission unit 2 and the host computer 1 is achieved through network communication equipment 8. (Refer to...) Figure 15 and Figure 16As shown, in this quantum measurement and control cabinet, the seventh drawer box 710, the fourth drawer box 410, the fifth drawer box 510, several first drawer boxes 2100, several second drawer boxes 2200, and the sixth drawer box 610 are arranged sequentially in the rack 200 from high to low. Each radio frequency arbitrary waveform transmitting unit 21 may include two first functional motherboards, which are placed in the same first drawer box 2100, thereby enabling the output of four XY signals (i.e.,...). Figure 16 In the RF-AWG (RF-AWG), each intermediate frequency arbitrary waveform transmitting unit 22 may include two secondary functional motherboards, which are placed in the same second drawer box 2200, and output 8 Z signals (i.e. Figure 16 The first drawer box 2100 and the second drawer box 2200 are arranged such that each pair of radio frequency arbitrary waveform transmitting units 21 and intermediate frequency arbitrary waveform transmitting units 22 form a functional module that can control 8 qubits. The two first drawer boxes 2100 and the second drawer box 2200 can occupy 1U unit in the rack 200. The third functional motherboard of the radio frequency transmitting subunit 31 and the fourth functional motherboard of the acquisition subunit 32 in the quantum analysis unit 3 are housed in the same third drawer box 3100, which can occupy 1U unit in the rack 200. The seventh drawer box 710, the fourth drawer box 410, and the fifth drawer box 510 can each occupy a 1U unit. Due to the large size of the power distribution unit 6, the sixth drawer box 610 occupies approximately a 3U unit. With proper layout, a 22U cabinet can be equipped with 5 sets of the above-mentioned functional modules, thus enabling the control of approximately 40 qubits. Compared with the discrete room temperature measurement and control scheme of conventional technology, this significantly improves the measurement and control capacity of qubits.

[0360] In this embodiment, at least one first mixer 2104 in the radio frequency arbitrary waveform transmitting unit 21, which is connected to the first functional motherboard, can be disposed in the corresponding first drawer box 2100, and the first attenuator 2108 can be disposed on the side of the dilution refrigerator. At least one second mixer 3104 in the radio frequency transmitting subunit 31, which is connected to the third functional motherboard, and the demodulator 3205 in the acquisition subunit 32, which is connected to the fourth functional motherboard, can be disposed in the corresponding third drawer box 3100, while the second attenuator 3108 in the radio frequency transmitting subunit 31 and the low-frequency amplifier 3207 in the acquisition subunit 32 can be disposed on the side of the dilution refrigerator.

[0361] When using this quantum measurement and control system for measurement and control, the measurement and control personnel input the quantum bits to be measured and calculated in the experiment into the host computer 1 for programming, and then transmit the data through the network port communication, and communicate and interact with the quantum analysis unit 3 and the transmission unit 2 through the network communication device 8.

[0362] The clock distribution unit 5 divides a first clock signal into multiple synchronized first clock signals and outputs the multiple first clock signals to the radio frequency arbitrary waveform transmission unit 21 and intermediate frequency arbitrary waveform transmission unit 22 of the connected transmission unit 2, as well as the radio frequency transmission subunit 31 and acquisition subunit 32 of the quantum analysis unit 3, to achieve clock synchronization of the entire measurement and control system. Among them, the first clock signal is the base clock signal.

[0363] After receiving the radio frequency waveform parameter information and the intermediate frequency waveform parameter information, the radio frequency arbitrary waveform transmitting unit 21 and the intermediate frequency arbitrary waveform transmitting unit 2 enter the ready-to-trigger state.

[0364] The host computer 1 sends the measurement and control trigger command to the acquisition subunit 32 of the quantum analysis unit 3 through the network communication device 8; the trigger control pulse chip 3202 of the acquisition subunit 32 receives the measurement and control trigger command, generates the trigger signal, divides the trigger signal into synchronous multiple trigger signals through the trigger distribution unit 4, and outputs the multiple trigger signals to the radio frequency arbitrary waveform transmission unit 21 and intermediate frequency arbitrary waveform transmission unit 22 of the connected transmission unit 2, as well as the radio frequency transmission subunit 31 and acquisition subunit 32 of the quantum analysis unit 3, triggering the conversion actions of the intermediate frequency arbitrary waveform transmission unit 22 and radio frequency arbitrary waveform transmission unit 21 of the transmission unit 2, as well as the radio frequency transmission subunit 31 and acquisition subunit 32 of the quantum analysis unit 3.

[0365] In this system, the intermediate frequency arbitrary waveform transmitting unit 22 of transmitting unit 2 emits a Z signal, exemplarily, the frequency range of which is, for example, but not limited to, 0 to 500 MHz. The radio frequency arbitrary waveform transmitting unit 21 of transmitting unit 2 emits XY signals, exemplarily, the frequency range of which is, for example, but not limited to, 4 to 6 GHz. By applying the intermediate frequency Z signal and the high-frequency XY signal with a frequency close to the quantum bit energy level interval, the quantum bit can oscillate between the ground state |0> and the excited state |1>, thereby realizing various quantum logic gates. The radio frequency transmitting subunit 31 emits a read-in signal, which is transmitted through the radio frequency path to the quantum processor in the dilution refrigerator for measurement and control experiments. exemplarily, the frequency range of which is, for example, but not limited to, 6 to 8 GHz.

[0366] The Read In signal is transmitted to the quantum processor, enters the resonant cavity, is indirectly capacitively coupled to the quantum bit, and is reflected by the resonant cavity to become the Read Out signal carrying the information of the resonant cavity and the quantum bit. The acquisition subunit 32 reads the Read Out signal, processes the read signal to obtain the quantum computing result, and transmits the quantum computing result to the host computer 1 for display through the network communication device 8.

[0367] Based on the same inventive concept, this utility model embodiment also provides a radio frequency arbitrary waveform transmitter, a quantum analyzer, and a quantum measurement and control cabinet. Since these radio frequency arbitrary waveform transmitters, quantum analyzers, and quantum measurement and control cabinets are implemented through the aforementioned radio frequency arbitrary waveform transmitter unit, and the principle of solving the problem corresponds to that of the aforementioned radio frequency arbitrary waveform transmitter unit, the implementation of the radio frequency arbitrary waveform transmitter, quantum analyzer, and quantum measurement and control cabinet can refer to the implementation of the aforementioned embodiments, and the repeated parts will not be described again.

[0368] This utility model embodiment also provides a radio frequency arbitrary waveform transmitting device, including: a first drawer box 2100 and a radio frequency arbitrary waveform transmitting unit 21 as described above;

[0369] The first functional motherboard of the radio frequency arbitrary waveform transmitting unit 21 is housed in the first drawer box 2100;

[0370] At least one of the first mixers 2104 connected to the first functional motherboard is housed in the first drawer box 2100 or disposed outside the first drawer box 2100.

[0371] In one embodiment, the radio frequency arbitrary waveform transmitter is a radio frequency arbitrary waveform transmitter used in the quantum measurement and control system 100.

[0372] This utility model embodiment also provides a quantum analyzer, including the aforementioned radio frequency arbitrary waveform transmitting unit (i.e. Figure 4 The quantum processor has a radio frequency subunit 31 and a acquisition subunit 32. The radio frequency arbitrary waveform transmitting unit is used to transmit the read signal to the resonant cavity in the quantum processor, and the acquisition subunit 32 is used to receive the read signal output from the quantum processor to obtain the quantum computing result.

[0373] In an optional embodiment, the quantum analyzer further includes: a third drawer box 3100;

[0374] The radio frequency arbitrary waveform transmitting unit (i.e. Figure 4 The first functional motherboard (i.e., the third functional motherboard) of the radio frequency subunit 31 is housed in the third drawer box;

[0375] And at least one of the first mixers connected to the first functional motherboard (i.e. Figure 4 The second mixer 3204 is housed in the third drawer box 3100 or disposed outside the third drawer box 3100.

[0376] This utility model embodiment also provides a quantum measurement and control cabinet, see reference. Figure 13 and Figure 14 As shown, it includes rack 200, radio frequency arbitrary waveform transmitter as described above, and / or the aforementioned quantum analyzer;

[0377] The first drawer box 2100 of the radio frequency arbitrary waveform transmitter and / or the third drawer box 3100 of the quantum analyzer are arranged within the rack 200.

[0378] The quantum measurement and control cabinet provided in this embodiment of the utility model, by arranging various drawer boxes on the rack, allows for the independent installation and disassembly of each functional module through a drawer-style design. This facilitates maintenance and management, and allows for easy replacement when a single functional module fails or needs upgrading. Maintenance personnel can quickly locate the functional module requiring maintenance, reducing the time spent searching for and disassembling other functional modules, thereby improving maintenance efficiency. Furthermore, the drawer-style design makes full use of the cabinet's internal space. Each drawer box can hold one or more functional motherboards according to actual needs, avoiding space waste. Different drawer boxes can be adjusted and arranged within the rack as needed, making it easy to expand and add to adapt to different measurement and control requirements.

[0379] In this embodiment of the utility model, reference is made to Figure 13 and Figure 14 As shown, the rack 200 can also accommodate the second drawer box 2200, the fourth drawer box 410, the fifth drawer box 510, the sixth drawer box 610 and the seventh drawer box 710 of the quantum measurement and control system 100.

[0380] In one specific embodiment, in the quantum measurement and control cabinet, at least one first drawer box 2100, at least one second drawer box 2200, at least one third drawer box 3100, at least one fourth drawer box 410, at least one fifth drawer box 510, a sixth drawer box 610 and a seventh drawer box 710 are stacked in the rack 200 in a set arrangement order.

[0381] Those skilled in the art will understand that embodiments of this invention can be provided as methods, systems, or computer program products. Therefore, this invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this invention can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.

[0382] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, as well as combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing device, generate instructions for implementing the flowchart. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0383] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0384] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0385] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A radio frequency arbitrary waveform transmitting unit applied to a quantum measurement and control system, characterized in that, include: A first functional motherboard and at least one first mixer disposed outside the first functional motherboard; The first functional motherboard is connected to the at least one first mixer; The first functional motherboard is used to receive radio frequency waveform parameter information sent by the host computer, and after receiving the trigger signal, generate at least one pair of first DC signals and at least two pairs of preset waveform first differential pulse signals according to the radio frequency waveform parameter information, and generate a first microwave signal. Each pair of first differential pulse signals is mixed with a phase-matched first DC signal to obtain at least two first single-ended pulse signals with a phase difference of 90°, and output to the corresponding first mixer. The first microwave signal generated is also output to the corresponding first mixer. The first mixer has a co-phase port and a quadrature phase port on one side of its cavity, and a local oscillator port and a radio frequency port on the other side. The co-phase port and the quadrature phase port are respectively connected to two signal output ports on the first functional motherboard to receive two first single-ended pulse signals with a 90° phase difference output from the two signal output ports. The local oscillator port is used to receive the first microwave signal. The first mixer performs mixing processing on the received two first single-ended pulse signals with a 90° phase difference and the first microwave signal to obtain a radio frequency signal, which is output through the radio frequency port.

2. The radio frequency arbitrary waveform transmitting unit as described in claim 1, characterized in that, The first functional motherboard includes a first carrier board and a first main control chip, a first digital-to-analog converter, a first DC generation chip, a first local oscillator microwave source, and at least one pair of first combiners disposed on the first carrier board; The first main control chip is connected to the first digital-to-analog converter, the first DC generator chip, and the first local oscillator microwave source, respectively; The first digital-to-analog converter is connected to the at least one pair of first combiners; The output of each pair of the first combiners is connected to the in-phase port and the quadrature-phase port of the corresponding first mixer, respectively, wherein the in-phase port and the quadrature-phase port are used to receive the two first single-ended pulse signals with a phase difference of 90°. The first DC generating chip is connected to the at least one pair of first combiners; The first local oscillator microwave source is connected to the at least one first mixer; The first main control chip is used to receive radio frequency waveform parameter information sent by the host computer, and after receiving the trigger signal, according to the radio frequency waveform parameter information, send a first pulse signal generation instruction signal to the first digital-to-analog converter, send a first microwave signal generation instruction to the first local oscillator microwave source, and send a first DC generation control instruction to the first DC generation chip. The first digital-to-analog converter is used to generate at least two pairs of preset waveforms of first differential pulse signals according to the first pulse signal generation instruction; The first DC generation chip is used to generate at least one pair of first DC signals according to the first DC generation control command; The first combiner is used to mix a pair of the first differential pulse signals and a phase-matched first DC signal to obtain one of the two first single-ended pulse signals with a 90° phase difference, and outputs it to the corresponding first mixer. The first local oscillator microwave source is used to generate at least one first microwave signal according to the first microwave signal generation instruction, and output them to the corresponding first mixer.

3. The radio frequency arbitrary waveform transmitting unit as described in claim 2, characterized in that, The first combiner includes a first operational amplifier; The first functional motherboard also includes at least one pair of first filters disposed on the first carrier board; The first DC generation chip is connected to the at least one pair of first filters; The first filter is connected to the corresponding first operational amplifier; The first filter is used to filter the first DC signal to obtain a filtered first DC signal; The first operational amplifier is used to combine a pair of the first differential pulse signals and a filtered first DC signal with phase adaptation to obtain one of the two first single-ended pulse signals with a 90° phase difference.

4. The radio frequency arbitrary waveform transmitting unit as described in claim 3, characterized in that, The non-inverting input of the first operational amplifier is used to receive one of the pair of the first differential pulse signals and the filtered phase-matched first DC signal, and the inverting input of the first operational amplifier is used to receive the other of the pair of the first differential pulse signals.

5. The radio frequency arbitrary waveform transmitting unit as described in claim 2, characterized in that, The first functional motherboard also includes a first network port chip disposed on the first carrier board; The first network port chip is connected to the first main control chip and is used to communicate with the host computer through an external network communication device. The chip receives the radio frequency waveform parameter information sent by the host computer through the network communication device and outputs it to the first main control chip.

6. The radio frequency arbitrary waveform transmitting unit as described in claim 2, characterized in that, The first functional motherboard also includes a first RS485 / 422 communication interface disposed on the first carrier board; The first RS485 / 422 communication interface is connected to the first main control chip and is used for communication with the host computer.

7. The radio frequency arbitrary waveform transmitting unit as described in claim 2, characterized in that, The first functional motherboard also includes a first clock chip disposed on the first carrier board, used to convert the second clock signal into a third clock signal and output the third clock signal to the first main control chip, the first digital-to-analog converter and the first local oscillator microwave source.

8. The radio frequency arbitrary waveform transmitting unit as described in claim 2, characterized in that, The first functional motherboard also includes a first trigger buffer chip disposed on the first carrier board, used to receive the trigger signal, perform buffer enhancement processing on the received trigger signal, and output the processed trigger signal to the first main control chip.

9. The radio frequency arbitrary waveform transmitting unit as described in claim 2, characterized in that, The first functional motherboard also includes a first synchronization buffer chip disposed on the first carrier board, used to receive synchronization signals, perform buffering and enhancement processing on the synchronization signals, and output the processed synchronization signals to the first main control chip.

10. The radio frequency arbitrary waveform transmitting unit as described in claim 2, characterized in that, The cavity of the first mixer includes a circuit board and an IQ mixer chip; The IQ mixer chip is disposed on the circuit board. The in-phase pin of the IQ mixer chip is connected to the in-phase port, the quadrature phase pin of the IQ mixer chip is connected to the quadrature phase port, the local oscillator pin of the IQ mixer chip is connected to the local oscillator port, and the radio frequency pin of the IQ mixer chip is connected to the radio frequency port. The in-phase port and the quadrature phase port are respectively connected to the corresponding first combiner. The in-phase port is used to receive one of the two first single-ended pulse signals with a phase difference of 90°, and the quadrature phase port is used to receive the other of the two first single-ended pulse signals with a phase difference of 90°. The local oscillator port is connected to the first local oscillator microwave source and is used to receive the first microwave signal; The radio frequency port is used to output radio frequency signals.

11. The radio frequency arbitrary waveform transmitting unit according to claim 10, characterized in that, The circuit board has a ground hole, and the unused pins of the IQ mixer chip are grounded through the ground hole of the circuit board.

12. The radio frequency arbitrary waveform transmitting unit as described in claim 7, characterized in that, The second clock signal is the source clock signal, and the third clock signal includes any one or more of the following: system clock signal, device clock signal, and sampling clock signal; The first functional motherboard further includes a first buffer circuit for receiving a first clock signal output from an external clock distribution unit and buffering and enhancing the first clock signal to obtain a second clock signal. The first buffer circuit is disposed outside the first clock chip or integrated into the first clock chip. The first local oscillator microwave source is a chip, which is disposed on the first carrier board.

13. The radio frequency arbitrary waveform transmitting unit as described in any one of claims 1-12, characterized in that, The radio frequency arbitrary waveform transmitting unit also includes at least one first attenuator disposed outside the first functional motherboard; The first attenuator is connected to the corresponding first mixer and is used to adjust the amplitude of the radio frequency signal.

14. The radio frequency arbitrary waveform transmitting unit as described in any one of claims 1-12, characterized in that, The radio frequency signal generated by the radio frequency arbitrary waveform transmitting unit is used to provide a quantum processor. The radio frequency signal is used as a quantum bit driving signal to drive the quantum bit to switch between the |0> state and the |1> state.

15. The radio frequency arbitrary waveform transmitting unit as described in claim 14, characterized in that, The frequency range of the radio frequency signal is 4 GHz to 6 GHz.

16. The radio frequency arbitrary waveform transmitting unit as described in any one of claims 1-12, characterized in that, The radio frequency signal is used as a read signal to read the frequency of the resonant cavity coupled to the quantum bit.

17. The radio frequency arbitrary waveform transmitting unit as described in claim 16, characterized in that, The frequency range of the radio frequency signal is 6 GHz to 8 GHz.

18. The radio frequency arbitrary waveform transmitting unit as described in claim 1, characterized in that, The frequency range of the radio frequency signal output by the radio frequency arbitrary waveform transmitting unit is from 1 GHz to 20 GHz, and the first mixer is an IQ mixer.

19. A radio frequency arbitrary waveform transmitting device, characterized in that, include: The first drawer box and the radio frequency arbitrary waveform transmitting unit as described in any one of claims 1-15 and 18; The first functional motherboard of the radio frequency arbitrary waveform transmitting unit is housed in the first drawer box; Furthermore, at least one of the first mixers connected to the first functional motherboard is housed in the first drawer box or disposed outside the first drawer box.

20. The radio frequency arbitrary waveform transmitting device as described in claim 19, characterized in that, The radio frequency arbitrary waveform transmitter is a radio frequency arbitrary waveform transmitter used in quantum measurement and control systems.

21. A quantum analyzer, characterized in that, The device includes a radio frequency arbitrary waveform transmitting unit and a acquisition subunit as described in any one of claims 1-13 and 16-18, wherein the radio frequency arbitrary waveform transmitting unit is used to transmit a read-in signal to the resonant cavity in the quantum processor, and the acquisition subunit is used to receive a read-out signal output from the quantum processor to obtain quantum computing results.

22. The quantum analyzer as described in claim 21, characterized in that, Also includes: the third drawer box; The first functional motherboard of the radio frequency arbitrary waveform transmitting unit is housed in the third drawer box; Furthermore, at least one of the first mixers connected to the first functional motherboard is housed in the third drawer box or disposed outside the third drawer box.

23. A quantum measurement and control cabinet, characterized in that, Includes a rack, the radio frequency arbitrary waveform transmitter as described in claim 20, and / or the quantum analyzer as described in claim 22; The first drawer box of the radio frequency arbitrary waveform transmitter and / or the third drawer box of the quantum analyzer are arranged inside the rack.

Images