Enhanced gallium nitride power device
By employing an asymmetric gate structure and field plate design in gallium nitride power devices, the breakdown problem caused by power line concentration is solved, the withstand voltage and switching speed are improved, and the reliability of the devices is enhanced.
Patent Information
- Application Number
- CN202423162505.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2034-12-20
AI Technical Summary
Existing GaN gate structure gallium nitride power devices are prone to breakdown due to the high electric field strength caused by power line concentration.
Design an enhanced gallium nitride power device with an asymmetric gate structure. The side of the gate near the drain extends beyond the edge of the PGaN gate and overlaps with the first field plate to form an irregular overlapping region. Combined with the second field plate, the electric field distribution is further adjusted to reduce parasitic capacitance.
This improves the device's withstand voltage and switching speed, reduces the electric field strength at the gate edge to prevent breakdown, and enhances the device's reliability.
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Figure CN223639610U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor, in particular to an enhancement-mode gallium nitride power device. BACKGROUND
[0002] With the progress of science and technology, semiconductor devices, especially semiconductor power devices, are facing higher and higher requirements, i.e. higher switching speed, lower on-resistance, larger saturation current, etc. The traditional Si-based power device cannot meet the above requirements due to its material characteristics, while the gallium nitride (GaN) power device has the characteristics of high current density, high breakdown voltage, high switching speed, low on-resistance, etc., and therefore has a wide application prospect.
[0003] Since the gate and drain metals of the PGaN gate structure gallium nitride power device are arranged horizontally, the electric lines emitted from the drain metal will be concentrated on the side of the gate metal close to the drain edge when falling on the gate metal. These concentrated electric lines will generate a higher electric field strength, which will cause the device to break down if the electric field strength reaches a certain value. CONTENT OF THE INVENTION
[0004] In view of the above technical problems, the present application provides an enhancement-mode gallium nitride power device, which can improve the problem that the existing enhancement-mode gallium nitride power device is easily broken down.
[0005] To solve the above technical problems, in a first aspect, the present application provides an enhancement-mode gallium nitride power device, comprising:
[0006] a gallium nitride semiconductor substrate, a top surface of which is provided with a PGaN gate extending along a first direction;
[0007] a source electrode, which is arranged on the top surface of the gallium nitride semiconductor substrate and located on one side of the PGaN gate;
[0008] a drain electrode, which is arranged on the top surface of the gallium nitride semiconductor substrate and located on the other side of the PGaN gate, the source electrode, the PGaN gate and the drain electrode being arranged along a second direction, wherein the second direction is perpendicular to the first direction;
[0009] a gate electrode, which is arranged on the top surface of the PGaN gate, one side of the gate electrode close to the drain electrode exceeding the PGaN gate;
[0010] a first field plate, which is arranged above the gallium nitride semiconductor substrate and located on the side of the PGaN gate close to the drain electrode, the first field plate and the area of the gate electrode exceeding the PGaN gate having multiple spaced-apart overlapping areas in a third direction, and the first field plate being connected to the source electrode in an inactive area, wherein the third direction is perpendicular to the first direction and the second direction.
[0011] Optionally, the overlapping regions are zigzag.
[0012] Optionally, the overlapping regions are zigzag or rectangular.
[0013] Optionally, the first field plate is provided with a plurality of first grooves arranged at intervals near one side of the gate, and a first protrusion is formed between two adjacent first grooves;
[0014] The first protrusion coincides with the projection of the gate in the third direction;
[0015] The groove bottom of the first groove does not coincide with the projection of the gate in the third direction.
[0016] Optionally, the gate is provided with a plurality of second grooves arranged at intervals near one side of the first field plate, and a second protrusion is formed between two adjacent second grooves;
[0017] The second protrusion coincides with the projection of the first field plate in the third direction;
[0018] The groove bottom of the second groove does not coincide with the projection of the first field plate in the third direction.
[0019] Optionally, the enhanced gallium nitride power device further comprises:
[0020] A second field plate is arranged above the first field plate and near the drain side, the second field plate partially coincides with the projection of the first field plate in the third direction, and the second field plate is connected to the source in the non-active region.
[0021] Optionally, the gallium nitride semiconductor substrate comprises, from bottom to top, a substrate layer, a nucleation layer, a buffer layer and a barrier layer.
[0022] Optionally, the nucleation layer is an AlN layer, and the barrier layer is an AlGaN layer.
[0023] As described above, the enhanced gallium nitride power device of the embodiment has an asymmetrically designed gate, the gate metal near the source is flush with the edge of the PGaN gate, the gate metal near the drain extends beyond the edge of the PGaN gate to form a gate field plate, the edge of the gate field plate is irregular, and there is irregular overlap between the gate field plate and the first field plate in the lateral direction. By overlapping the gate metal and the first field plate, the left edge electric field of the first field plate can be prevented from being too concentrated to cause breakdown when the device withstands voltage, and the withstand voltage of the device is improved. At the same time, by designing the irregular structure (a plurality of overlapping regions arranged at intervals), the overlapping area of the gate metal and the first field plate can be reduced to reduce the parasitic capacitance such as Cgs, so that the switching speed of the device can be improved. BRIEF DESCRIPTION OF DRAWINGS
[0024] The accompanying drawings, which are incorporated herein and constitute part of the specification, illustrate embodiments consistent with the application and, together with the description, further serve to explain the principles of the application. In order to more clearly illustrate the technical solutions of the embodiments of the application, the drawings needed to be used in the description of the embodiments will be briefly introduced as follows. Obviously, the drawings needed to be obtained by those of ordinary skill in the art without any creative work under the premise of the description of the embodiments.
[0025] Figure 1 is a top view structural schematic diagram of an enhanced gallium nitride power device provided by the embodiments of the application;
[0026] Figure 2 is a sectional view structural schematic diagram along the line A-A in FIG. 1; Figure 1
[0027] Figure 3 is a sectional view structural schematic diagram along the line B-B in FIG. 1; Figure 1
[0028] Figure 4 is a structural schematic diagram of a gate and a first field plate provided by the embodiments of the application;
[0029] Figure 5 is another structural schematic diagram of a gate and a first field plate provided by the embodiments of the application.
[0030] The implementation, functional features and advantages of the application will be further described with reference to the embodiments and the accompanying drawings. The above-described drawings have shown the specific embodiments of the application, and will be described in more detail hereinafter. These drawings and the description are not intended to limit the scope of the concept of the application by any means, but to illustrate the concept of the application to those skilled in the art by referring to the specific embodiments. DETAILED DESCRIPTION
[0031] The exemplary embodiments will be described in detail herein with reference to the accompanying drawings. Unless otherwise indicated, the same numbers on different drawings represent the same or similar elements. The following detailed description does not limit the application to only the disclosed embodiments. Instead, the disclosed embodiments are examples of apparatuses and methods that could be implemented in accordance with the application.
[0032] It should be understood that, although the terms first, second, third, etc. can be employed in this text to describe various information, these information should not be limited to these terms. These terms are only used to distinguish one type of information from another type of information. For example, without departing from the scope of this text, the first information can also be referred to as the second information, and similarly, the second information can also be referred to as the first information. Depending on the context, the singular forms "a", "an" and "the" used herein are intended to include the plural forms, unless the context indicates otherwise.
[0033] It should be understood that the terms "top", "bottom", "upper", "lower", "vertical", "horizontal" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.
[0034] As described above, the gallium nitride power device has the characteristics of high current density, high breakdown voltage, high switching speed, low on-resistance, etc. This is because the core structure of the gallium nitride power device is AlGaN / GaN heterojunction. Due to the spontaneous polarization and piezoelectric polarization effect, a high concentration and high electron mobility two-dimensional electron gas will be generated at the AlGaN / GaN interface. The existence of these two-dimensional electron gases makes the gallium nitride power device have a lower on-resistance and a larger saturation current. Since the band gap of GaN material is large, its critical breakdown field strength is high, so that the gallium nitride power device has a high breakdown voltage. The gallium nitride power device based on AlGaN / GaN heterojunction structure is naturally depletion type, and in order to facilitate driving and prevent false opening, it is necessary to design and manufacture enhancement type gallium nitride power device. The PGaN gate structure is the commonly used enhancement type gallium nitride power device structure. This structure uses PGaN to lift the conduction band level of the AlGaN barrier layer below, thereby depleting the two-dimensional electron gas in the GaN channel layer below, and finally realizing the enhancement type gallium nitride power device.
[0035] And the existing PGaN gate structure gallium nitride power device, the electric lines emitted from the drain metal will be concentrated on the side of the gate metal close to the drain edge when falling on the gate metal. These concentrated electric lines will generate a higher electric field strength, which will cause the device to break down if the electric field strength reaches a certain value.
[0036] As an improvement, to alleviate the electric field intensity at the gate metal edge, field plates are typically introduced into the device structure. These field plates can be categorized into source field plates, gate field plates, and drain field plates based on their connection to the electrodes. Drain field plates have poor modulation effects on the electric field; therefore, gate and source field plates are generally used. For high-voltage PGaN gate structure gallium nitride power devices, multilayer source field plates are typically used to reduce the peak electric field intensity at the gate edge. However, high-voltage PGaN gate structure gallium nitride power devices generally employ a back-gate process, so the source field plate cannot completely cover the gate metal edge. Based on this, this application provides an enhanced gallium nitride power device.
[0037] Please see Figures 1-3 , Figure 1 This is a top view schematic diagram of an enhanced gallium nitride power device provided in an embodiment of this application. Figure 2 along Figure 1 Schematic diagram of the cross-sectional structure along line AA. Figure 3 along Figure 1 A cross-sectional view of the middle BB line shows that the enhanced gallium nitride power device includes: a gallium nitride semiconductor substrate 100, a source 21, a drain 22, a gate 23, and a first field plate 31.
[0038] For example, the gallium nitride semiconductor substrate 100 may include, from bottom to top, a substrate layer 40, a nucleation layer 50, a buffer layer 60, and a barrier layer 70. The substrate layer 40 may be a commonly used GaN epitaxial substrate such as Si, SiC, GaN, AlN, and sapphire. The nucleation layer 50 may be an AlN layer, and the barrier layer 70 may be an AlGaN layer.
[0039] A gallium nitride semiconductor substrate 100 has a PGaN gate 10 extending along a first direction X on its top surface. Figure 1 The source 21 is disposed on the top surface of the gallium nitride semiconductor substrate 100 and located on one side of the PGaN gate 10. The drain 22 is disposed on the top surface of the gallium nitride semiconductor substrate 100 and located on the other side of the PGaN gate 10. The source 21, the PGaN gate 10, and the drain 22 are arranged along a second direction Y, wherein the second direction Y is perpendicular to the first direction X. The gate 23 is disposed on the top surface of the PGaN gate 10, and the side of the gate 23 near the drain 22 extends beyond the PGaN gate 10.
[0040] The first field plate 31 is disposed above the gallium nitride semiconductor substrate 100 and is located on the side of the PGaN gate 10 near the drain 22. The projection of the first field plate 31 and the area of the gate 23 beyond the PGaN gate 10 onto the third direction Z has multiple overlapping regions arranged at intervals. The first field plate 31 is connected to the source 21 in the non-active region, wherein the third direction Z is perpendicular to the first direction X and the second direction Y.
[0041] Specifically, in combination with Figure 1 and Figure 2 , the PGaN gate 10 extends along a first direction X on the top surface of the gallium nitride semiconductor substrate 100, the source electrode 21 is located on the left side of the gate electrode 23, the drain electrode 22 is located on the right side of the gate electrode 23, and the three are arranged along a second direction Y, the first direction X and the second direction Y are two orthogonal directions of the surface of the gallium nitride semiconductor substrate 100, the thickness direction of the gallium nitride semiconductor substrate 100 is a third direction Z, the left side of the gate electrode 23 can be flush with the edge of the PGaN gate 10, the right side exceeds the PGaN gate 10, and the projection of the gate electrode 23 in the third direction Z has a plurality of spaced overlapping regions with the first field plate 31.
[0042] The enhanced gallium nitride power device of the embodiment, the gate electrode 23 is asymmetrically designed, the gate metal near the source electrode 21 is flush with the edge of the PGaN gate 10, the gate metal near the drain electrode 22 protrudes from the edge of the PGaN gate 10 to form a gate field plate, and the edge of the gate field plate is an irregular structure, which is irregularly overlapped with the first field plate 31 in the lateral direction. Through the overlap of the gate metal and the first field plate 31, the electric field of the left edge of the first field plate 31 can be prevented from being too concentrated to cause breakdown when the device withstands voltage, and the withstand voltage of the device can be improved. At the same time, through the design of the irregular structure (a plurality of spaced overlapping regions), the overlapping area of the gate metal and the first field plate 31 can be reduced to reduce the parasitic capacitance such as Cgs, so that the switching speed of the device can be improved.
[0043] In one embodiment, the overlapping region is a zigzag shape. The specific shape of the zigzag is not particularly limited in the embodiment. Exemplarily, the overlapping region is a wavy zigzag or a rectangular zigzag, which can avoid local electric field concentration and cause the device to be easily broken down compared to a triangular pointed zigzag.
[0044] In one embodiment, please refer to Figures 2-4 , Figure 4 is a schematic diagram of the structure of the gate electrode and the first field plate provided by the embodiment, a plurality of first grooves 311 are arranged on one side of the first field plate 31 close to the gate electrode 23, and a first protrusion 312 is formed between two adjacent first grooves 311. The first protrusion 312 is overlapped with the projection of the gate electrode 23 in the third direction Z, as shown in Figure 2 . The groove bottom of the first groove 311 is not overlapped with the projection of the gate electrode 23 in the third direction Z, which can be flushly arranged as shown by the dashed line in Figure 3 .
[0045] In another embodiment, please refer to Figure 2 , Figure 3 and Figure 5 , Figure 5is another structure diagram of the gate and the first field plate provided by the embodiment of the present application. The gate 23 is provided with a plurality of second grooves 231 arranged at intervals at one side of the first field plate 31, and a second protrusion 232 is formed between two adjacent second grooves 231. The second protrusion 232 coincides with the projection of the first field plate 31 in the third direction Z, as shown in Figure 2 . The groove bottom of the second groove 231 does not coincide with the projection of the first field plate 31 in the third direction Z, and can be arranged flush, for example, as shown by the dotted line in Figure 3 .
[0046] It should be noted that the first groove 311 and the second groove 231 can be circular arcs, and the first protrusion 312 and the second protrusion 232 can also be circular arcs, so as to avoid the problem of local electric field concentration caused by sharp corners, which can cause the device to be easily broken down.
[0047] In one embodiment, please continue to refer to Figure 2 Figure 3 The enhanced gallium nitride power device can further include a second field plate 32 arranged above the first field plate 31 and arranged close to one side of the drain 22. The second field plate 32 partially coincides with the projection of the first field plate 31 in the third direction Z, and the second field plate 32 is connected to the source 21 in the non-active region. Exemplarily, the overlapping area between the second field plate 32 and the first field plate 31 can be rectangular or irregular in shape, and the embodiment of the present application is not particularly limited.
[0048] The first field plate 31 is a first layer source field plate, which can reduce the electric field peak at the edge of the gate 23. The second field plate 32 serves as a second layer source field plate, which can reduce the electric field peak at the right edge (the edge close to the drain 22) of the first field plate 31, so as to make the electric field distribution between the gate and the drain more uniform, thereby making the device have better voltage resistance.
[0049] It should be noted that the first field plate 31 can be made by using a separate mask, while the second field plate 32 can be made simultaneously with the metal layer of the source 21 and the drain 22, and does not need to be made by using a separate mask.
[0050] The above describes in detail the enhanced gallium nitride power device provided by the present application, and the principles and implementation manners of the present application are described by using specific examples. It should be noted that the description of each embodiment in the present application has its own emphasis, and the parts not described or recorded in a certain embodiment can be referred to the related description of other embodiments.
[0051] The above are only preferred embodiments of the present application, and do not limit the patent scope of the present application, and each technical feature of the technical solutions of the present application can be combined arbitrarily, in order to make the description simple, each technical feature in the above embodiments is not described all possible combinations, any equivalent structure or equivalent flow conversion made by using the content of the present application and the drawings, or directly or indirectly applied in other related technical fields, as long as the combination of these technical features does not exist contradiction, all are included in the patent protection scope of the present application.
Claims
1. An enhanced gallium nitride power device, comprising: The application relates to a gallium nitride semiconductor substrate, which comprises a PGaN gate arranged on the top surface of the gallium nitride semiconductor substrate and extending along a first direction; a source electrode arranged on the top surface of the gallium nitride semiconductor substrate and located on one side of the PGaN gate; a drain electrode arranged on the top surface of the gallium nitride semiconductor substrate and located on the other side of the PGaN gate, wherein the source electrode, the PGaN gate and the drain electrode are arranged along a second direction perpendicular to the first direction; a gate electrode arranged on the top surface of the PGaN gate, wherein one side of the gate electrode close to the drain electrode exceeds the PGaN gate; a first field plate arranged above the gallium nitride semiconductor substrate and located on the side of the PGaN gate close to the drain electrode, wherein the first field plate and the gate electrode exceeding the PGaN gate have a plurality of spaced-apart overlapping areas in a third direction, and the first field plate is connected to the source electrode in an inactive area. The overlapping areas are sawtooth-shaped. The overlapping areas are wavy sawtooth-shaped or rectangular sawtooth-shaped. The first field plate is provided with a plurality of spaced-apart first grooves on one side close to the gate electrode, and a first protrusion is formed between two adjacent first grooves. The first protrusion is overlapped with the projection of the gate electrode in the third direction. The groove bottom of the first groove is not overlapped with the projection of the gate electrode in the third direction.
2. The enhanced gallium nitride power device of claim 1, wherein, The gate electrode is provided with a plurality of spaced-apart second grooves on one side close to the first field plate, and a second protrusion is formed between two adjacent second grooves.
3. The enhancement mode gallium nitride power device of claim 2, wherein, The second protrusion is overlapped with the projection of the first field plate in the third direction.
4. The enhancement mode gallium nitride power device of claim 1, wherein, The groove bottom of the second groove is not overlapped with the projection of the first field plate in the third direction. The application further relates to a gallium nitride semiconductor substrate, which comprises a second field plate arranged above the first field plate and located on the side close to the drain electrode, wherein the second field plate is partially overlapped with the projection of the first field plate in the third direction, and the second field plate is connected to the source electrode in an inactive area. The gallium nitride semiconductor substrate comprises, from bottom to top, a substrate layer, a nucleation layer, a buffer layer and a barrier layer.
5. The enhanced gallium nitride power device of claim 1, wherein, The nucleation layer is an AlN layer, and the barrier layer is an AlGaN layer. 6. The enhancement mode gallium nitride power device of any one of claims 1-5, wherein, 7. The enhancement mode gallium nitride power device of claim 1, wherein, 8. The enhancement mode gallium nitride power device of claim 7, wherein,