Chip packaging structure and electronic equipment

Abstract

The utility model discloses a chip packaging structure and an electronic device. The chip packaging structure comprises a substrate; the first chip is arranged on the substrate; the insulator is arranged at the bottom of the first chip and located between the first chip and the substrate; the shielding layer is arranged around the first chip, and the bottom of the first chip and the shielding layer are isolated through at least one part of the insulator; and the packaging piece is arranged on the substrate so as to integrally package the first chip and the substrate. According to the utility model, the insulator is arranged at the bottom of the first chip, the shielding layer is arranged around the surface of the first chip, the first chip, the shielding layer and the substrate are integrally packaged by using the packaging piece, and the shielding layer is packaged in the chip packaging structure, so that electromagnetic shielding of the chip packaging structure can be realized, and the shielding layer can be prevented from being worn and falling off; and the electromagnetic shielding stability is improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to chip packaging technical field more particularly, relate to a chip packaging structure and electronic equipment. BACKGROUND

[0002] Traditional selective electromagnetic shielding scheme usually adopts the product on the plastic package groove, fills in the conductive glue and splashes on the product surface after splashing, and the conductive glue and splashing metal form closed passage, and the internal chip is protected from electromagnetic interference. However, the deficiency of traditional mode is that after the product surface splashes metal, the surface plating layer is easy to wear and fall off, which affects the electromagnetic shielding effect, and the whole preparation process is complex, and the cost is high. SUMMARY

[0003] One object of the utility model is to provide a new technical scheme of chip packaging structure and electronic equipment, which can at least solve the problems of the existing packaging structure, such as easy wear and fall off of the surface shielding layer.

[0004] The first aspect of the utility model provides a chip packaging structure, comprising: a substrate; a first chip, the first chip is arranged on the substrate; an insulator, the insulator is arranged at the bottom of the first chip and is located between the first chip and the substrate; a shielding layer, the shielding layer is arranged around the first chip, and the bottom of the first chip and the shielding layer are isolated by at least a part of the insulator; a packaging piece, the packaging piece is arranged on the substrate to integrally package the first chip and the substrate.

[0005] Optionally, the shielding layer is conductive glue, the conductive glue covers the upper surface and the side surface of the first chip, so as to shield the first chip from electromagnetic interference.

[0006] Optionally, the insulator is non-conductive glue, and the non-conductive glue fills the gap between the first chip and the substrate.

[0007] Optionally, the bottom of the first chip is provided with a plurality of electric connecting pieces, a plurality of electric connecting pieces are arranged in parallel at the bottom of the first chip, and the insulator is arranged between adjacent two electric connecting pieces and between the electric connecting piece and the shielding layer.

[0008] Optionally, the electric connecting piece is a tin ball, and the insulator is arranged between adjacent two tin balls and between the tin ball and the shielding layer.

[0009] Optionally, the first chip is bonded or tin soldered with the substrate through the electric connecting piece.

[0010] Optionally, the chip packaging structure further comprises a second chip mounted on the substrate and spaced apart from the first chip.

[0011] Optionally, the substrate is a circuit board.

[0012] In a second aspect, the utility model provides an electronic equipment which comprises the chip packaging structure described in the above embodiment.

[0013] The chip packaging structure of the utility model, through setting the insulator at the bottom of the first chip, setting the shielding layer around the surface of the first chip, using the packaging piece to package the first chip, the shielding layer and the substrate as a whole, the shielding layer is packaged inside the chip packaging structure, can realize the electromagnetic shielding of the chip packaging structure, can prevent the shielding layer from wearing and falling off, improves the stability of electromagnetic shielding.

[0014] Other features of the utility model and its advantages will become clear from the following detailed description of exemplary embodiments thereof with reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0015] The accompanying drawings incorporated in and forming a part of the specification illustrate embodiments of the utility model and, together with the description, serve to explain the principles of the utility model.

[0016] Figure 1 It is the structure schematic diagram of the chip packaging structure according to the utility model embodiment;

[0017] Figure 2 It is the manufacturing flow chart of the chip packaging structure according to the utility model embodiment.

[0018] Reference Signs:

[0019] Chip packaging structure 100;

[0020] Substrate 10;

[0021] First chip 20;

[0022] Insulator 30;

[0023] Shielding layer 40;

[0024] Packaging piece 50;

[0025] Electric connection piece 60;

[0026] Second chip 70. DETAILED DESCRIPTION

[0027] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. Note that the relative arrangement, numerical expressions, and numerical values of components and steps set forth in these embodiments are not limiting to the scope of the present application unless otherwise specifically stated.

[0028] The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the application or its application or uses.

[0029] Techniques, methods, and apparatus known to those of ordinary skill in the relevant art can not be discussed in detail herein, but should be considered as part of the specification, where appropriate.

[0030] In all examples shown and discussed herein, any specific value should be interpreted as merely exemplary and not as a limitation. Thus, other examples of the exemplary embodiments can have different values.

[0031] It should be noted that like reference numerals and letters in the various figures indicate similar items, and, thus, no further discussion will be provided herein.

[0032] In the description of the present application, if the terms "first", "second" features are explicitly or implicitly involved, one or more of the features can be included. In the description of the present application, unless otherwise specified, the meaning of "a plurality of" is two or more. In addition, in the description and claims of the specification, "and / or" indicates at least one of the connected objects, and the character " / ", generally indicates that the associated objects before and after are in an "or" relationship.

[0033] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0034] In the description of the utility model, it is to be explained that, unless there is definite stipulation and limitation, the terms "installation", "connection" and "connect" should be understood in a broad sense. For example, it can be fixed connection, or detachable connection, or integrally connected, it can be mechanical connection, or electrical connection, it can be directly connected, or indirectly connected through intermediate medium, or the communication between two elements. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.

[0035] The chip packaging structure 100 according to the embodiment of the utility model is described in detail below with reference to the drawings.

[0036] As shown in the figure, Figure 1 The chip packaging structure 100 according to the embodiment of the utility model comprises a substrate 10, a first chip 20, an insulator 30, a shielding layer 40 and a packaging piece 50.

[0037] Specifically, the first chip 20 is arranged on the substrate 10. The insulator 30 is arranged at the bottom of the first chip 20 and located between the first chip 20 and the substrate 10. The shielding layer 40 is arranged around the first chip 20, and the bottom of the first chip 20 and the shielding layer 40 are isolated by at least part of the insulator. The packaging piece 50 is arranged on the substrate 10 to integrally package the first chip 20 and the substrate 10.

[0038] In other words, as shown in the figure, Figure 1 The chip packaging structure 100 according to the embodiment of the utility model mainly comprises a substrate 10, a first chip 20, an insulator 30, a shielding layer 40 and a packaging piece 50. Among them, the first chip 20 is arranged on the substrate 10. The insulator 30 is arranged at the bottom of the first chip 20, and the insulator 30 is located between the first chip 20 and the substrate 10. The insulator 30 can prevent the electric elements at the bottom of the first chip 20 from being connected in series and avoid short circuit.

[0039] The shielding layer 40 is arranged around the first chip 20, and the bottom of the first chip 20 and the shielding layer 40 can be isolated by at least part of the insulator, which prevents the shielding layer 40 and the electric elements at the bottom of the first chip 20 from being connected in series and avoids short circuit. The shielding layer 40 can electromagnetically shield the first chip 20 on the substrate 10. The packaging piece 50 is arranged on the substrate 10, and the packaging piece 50 can integrally package the first chip 20 and the substrate 10, and encapsulate the shielding layer 40 inside the chip packaging structure 100, which can realize electromagnetic shielding of the chip packaging structure 100, prevent the shielding layer 40 from being abraded and falling off, and improve the stability of electromagnetic shielding.

[0040] The chip packaging structure 100 adopts the mode of arranging the shielding layer 40 in the inside of the chip packaging structure 100, can shield any area to be protected from electromagnetic interference, is flexible in position, and adopts plastic packaging to protect the shielding layer 40, can reduce the risk of the shielding layer 40 falling off, and improves the stability of electromagnetic shielding.

[0041] It should be noted that the traditional selective electromagnetic shielding scheme is to groove the product after plastic packaging, pour conductive glue, and then sputter on the surface of the product, and the conductive glue and the sputtered metal form a closed path to protect the internal chip from electromagnetic interference. The disadvantage of the traditional mode is that after the product surface is sputtered with metal, the surface plating layer is easy to wear off, which affects the electromagnetic shielding effect. Moreover, the traditional selective electromagnetic shielding scheme process is complex, high in cost and poor in stability.

[0042] Therefore, according to the chip packaging structure 100 of the embodiment of the utility model, by arranging the insulator 30 at the bottom of the first chip 20, arranging the shielding layer 40 around the surface of the first chip 20, and packaging the first chip 20, the shielding layer 40 and the substrate 10 as a whole by the packaging piece 50, the shielding layer 40 is packaged in the inside of the chip packaging structure 100, which can realize electromagnetic shielding of the chip packaging structure 100, prevent the shielding layer 40 from wearing off, and improve the stability of electromagnetic shielding.

[0043] According to an embodiment of the utility model, the shielding layer 40 is conductive glue, which covers the upper surface and the side surface of the first chip 20 to electromagnetically shield the first chip 20.

[0044] That is, as shown in Figure 1 and Figure 2 The shielding layer 40 can adopt conductive glue, which covers the upper surface and the side surface of the first chip 20 by means of point conductive glue to realize electromagnetic shielding of the first chip 20. The utility model sets the shielding layer 40 around the surface of the first chip 20, and packages the first chip 20, the shielding layer 40 and the substrate 10 as a whole by the packaging piece 50, which packages the shielding layer 40 in the inside of the chip packaging structure 100, realizes electromagnetic shielding of the chip packaging structure 100, prevents the shielding layer 40 from wearing off, and improves the stability of electromagnetic shielding.

[0045] According to an embodiment of the utility model, the insulator 30 is non-conductive glue, which fills the gap between the first chip 20 and the substrate 10.

[0046] In other words, as shown in Figure 1 and Figure 2As shown, the insulator 30 adopts non-conductive glue, by means of point non-conductive glue, the non-conductive glue can fill the gap between the first chip 20 and the substrate 10, so as to avoid short circuit in the form of filling glue at the bottom of the chip to be protected. Then point conductive glue around the first chip 20 to make electromagnetic shielding, and then plastic package. Therefore, the utility model adopts the mode of point conductive glue, which can shield any area to be protected from electromagnetic interference, and the position is flexible. The conductive glue is protected by plastic packaging, which can reduce the risk of conductive glue falling off and improve the stability of electromagnetic shielding.

[0047] According to one embodiment of the utility model, as shown in Figure 1 and Figure 2 As shown, the bottom of the first chip 20 is provided with a plurality of electrical connecting pieces 60, and the plurality of electrical connecting pieces 60 are arranged in parallel at the bottom of the first chip 20, and the adjacent two electrical connecting pieces 60 and the electrical connecting piece 60 and the shielding layer 40 are respectively filled with insulators 30 to avoid short circuit.

[0048] According to one embodiment of the utility model, the electrical connecting piece 60 is a tin ball, and the adjacent two tin balls and the tin ball and the shielding layer 40 are provided with insulators 30.

[0049] That is, as shown in Figure 1 and Figure 2 As shown, the electrical connecting piece 60 can adopt a tin ball, and the adjacent two tin balls and the tin ball and the shielding layer 40 can be filled with insulators 30 (non-conductive glue) by means of point glue to avoid short circuit. Then point conductive glue around the first chip 20 to make electromagnetic shielding, and then plastic package. Therefore, the utility model adopts the mode of point conductive glue, which can shield any area to be protected from electromagnetic interference, and the position is flexible. The conductive glue is protected by plastic packaging, which can reduce the risk of conductive glue falling off and improve the stability of electromagnetic shielding.

[0050] According to one embodiment of the utility model, as shown in Figure 1 and Figure 2 As shown, the first chip 20 can be bonded or tin soldered to the substrate 10 through the electrical connecting piece 60 to realize stable connection of the first chip 20 and the substrate 10. Of course, the number and distribution form of the electrical connecting piece 60 can be designed according to actual needs, which will not be described in detail in the utility model.

[0051] According to one embodiment of the utility model, the chip packaging structure 100 further comprises: a second chip 70, the second chip 70 is attached to the substrate 10, and the second chip 70 is distributed apart from the first chip 20.

[0052] That is, as shown in Figure 1 and Figure 2As shown, the chip packaging structure 100 further comprises a second chip 70, the second chip 70 can be attached on the substrate 10, and the second chip 70 is distributed apart from the first chip 20. In the utility model, the first chip 20 and the second chip 70 can be logic chips, memory chips or other types of chips, the number and type of the first chip 20 and the second chip 70 can be set according to actual needs, which will not be described in detail in the utility model.

[0053] According to an embodiment of the utility model, as Figure 1 And Figure 2 As shown, the substrate 10 is a circuit board. The circuit board is directly used as the substrate 10 of the chip packaging structure 100, without the need to additionally set the substrate 10, the overall size and material of the chip packaging structure 100 are reduced, which is beneficial to the miniaturization and lightweight design of the chip packaging structure 100.

[0054] As Figure 2 As shown, in the actual preparation process of the chip packaging structure 100 of the utility model, first, the chip to be electromagnetically shielded (the first chip 20) can be attached on the substrate 10. Then, the outer peripheral surface of the two adjacent tin balls at the bottom of the chip to be electromagnetically shielded and the outer tin ball is filled with non-conductive glue (insulator 30). After completion, the upper surface and the side surface of the chip to be electromagnetically shielded are dotted with conductive glue (shielding layer 40) to form an electromagnetic shielding isolation layer. Finally, the shielding layer 40 is encapsulated inside the chip packaging structure 100 by filling the plastic encapsulation material on the chip packaging structure 100.

[0055] In summary, according to the chip packaging structure 100 of the embodiment of the utility model, by setting the insulator 30 at the bottom of the first chip 20, setting the shielding layer 40 around the surface of the first chip 20, and using the encapsulant 50 to encapsulate the first chip 20, the shielding layer 40 and the substrate 10 as a whole, the shielding layer 40 is encapsulated inside the chip packaging structure 100, which can not only realize the electromagnetic shielding of the chip packaging structure 100, but also prevent the shielding layer 40 from wearing off and improve the stability of electromagnetic shielding.

[0056] Of course, for those skilled in the art, other structures of the chip packaging structure 100 and its working principle can be understood and realized, which will not be described in detail in the utility model.

[0057] According to the second aspect of the present application, an electronic device is provided, which comprises the chip packaging structure 100 in the above embodiments. Since the chip packaging structure 100 according to the embodiments of the present application has the above technical effects, the electronic device according to the embodiments of the present application should also have corresponding technical effects, that is, the electronic device of the present application adopts the chip packaging structure 100 in the above embodiments, the first chip 20, the shielding layer 40 and the substrate 10 are integrally packaged by the packaging member 50, the shielding layer 40 is packaged inside the chip packaging structure 100, which can not only realize the electromagnetic shielding of the chip packaging structure 100, but also prevent the shielding layer 40 from being abraded and falling off, thereby improving the stability of electromagnetic shielding.

[0058] Of course, other structures of the electronic device and its working principles can be understood and realized by those skilled in the art, which will not be described in detail in the present application.

[0059] Although some specific embodiments of the present application have been described in detail by examples, those skilled in the art should understand that the above examples are only for illustration, but not for limiting the scope of the present application. Those skilled in the art should understand that the above embodiments can be modified without departing from the scope and spirit of the present application. The scope of the present application is defined by the appended claims.

Claims

1. A chip packaging structure (100), characterized in that, include: substrate(10); The first chip (20) is disposed on the substrate (10); An insulator (30) is disposed at the bottom of the first chip (20) and located between the first chip (20) and the substrate (10); A shielding layer (40) is disposed around the first chip (20), and the bottom of the first chip (20) and the shielding layer (40) are isolated by at least a portion of the insulator; A package (50) is disposed on the substrate (10) to encapsulate the first chip (20) and the substrate (10) as a whole; The shielding layer (40) is a conductive adhesive, which covers the upper surface and side surface of the first chip (20) to provide electromagnetic shielding for the first chip (20).

2. The chip packaging structure (100) according to claim 1, characterized in that, The insulator (30) is a non-conductive adhesive, which fills the gap between the first chip (20) and the substrate (10).

3. The chip packaging structure (100) according to claim 1, characterized in that, The bottom of the first chip (20) is provided with a plurality of electrical connectors (60), which are arranged in parallel and spaced apart at the bottom of the first chip (20). An insulator (30) is provided between two adjacent electrical connectors (60) and between the electrical connectors (60) and the shielding layer (40).

4. The chip packaging structure (100) according to claim 3, characterized in that, The electrical connector (60) is a solder ball, and the insulator (30) is provided between two adjacent solder balls and between the solder ball and the shielding layer (40).

5. The chip packaging structure (100) according to claim 4, characterized in that, The first chip (20) is bonded or soldered to the substrate (10) via the electrical connector (60).

6. The chip packaging structure (100) according to claim 1, characterized in that, Also includes: The second chip (70) is mounted on the substrate (10) and is spaced apart from the first chip (20).

7. The chip packaging structure (100) according to claim 1, characterized in that, The substrate (10) is a circuit board.

8. An electronic device, characterized in that, The chip packaging structure (100) includes any one of claims 1-7.

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