Delay power-off circuit and delay power-off device

Abstract

The utility model discloses a delay power-off circuit and a delay power-off device, and relates to the technical field of power management, and the delay power-off circuit comprises an output transistor which is connected with an auxiliary power supply through the input end, and is connected to or serves as the output end of the delay power-off circuit through the first output end; the first input end of the control transistor is connected to the second output end of the output transistor, the second input end of the control transistor is connected to the control end of a power utilization system, and the output end of the control transistor is connected to a grounding end; and the first voltage division circuit is arranged between the input end and the second output end of the output transistor and is switched on when the control transistor is in a switched-on state. According to the delay power-off circuit provided by the invention, the auxiliary power supply can be controlled to continuously supply power to the power utilization system by controlling the working state of the transistor under the condition of power supply switching, so that instantaneous power-off of the power utilization system is avoided.

Description

Technical Field

[0001] This application relates to the field of power management technology, and in particular to a delayed power-off circuit and a delayed power-off device. Background Technology

[0002] Nowadays, the complexity of some electrical systems is constantly increasing with technological advancements, potentially involving diverse and sophisticated functional modules such as data storage, analysis, and circuit protection. During the operation of these systems, a stable power supply is often required to ensure the proper functioning of all components.

[0003] When conventional power supply modules are used to power electrical systems, unstable power supply conditions (such as voltage fluctuations and momentary power outages) can have numerous negative impacts. For example, in data storage, an unstable power supply may cause errors or loss of data being written or read; in data analysis, an unstable power supply may lead to calculation errors and interruptions in data processing. Therefore, there is an urgent need for a circuit that can temporarily provide a stable power supply to electrical systems in the event of an unexpected power outage to ensure the normal operation of the electrical system. Utility Model Content

[0004] The purpose of this application is to provide a delayed power-off circuit and a delayed power-off device. By introducing a delay control mechanism during the power switching process, the voltage of the electrical equipment is kept stable when the power is disconnected, thereby effectively avoiding voltage fluctuations and equipment damage caused by instantaneous power outages.

[0005] One of the purposes of this application is to provide a delayed power-off circuit.

[0006] One of the purposes of this application is to provide a delayed power-off device.

[0007] To achieve one of the above objectives, one embodiment of this application provides a delayed power-off circuit, comprising: an output transistor, whose input terminal is connected to an auxiliary power supply, and whose first output terminal is connected to or serves as the output terminal of the delayed power-off circuit;

[0008] A control transistor is connected to the second output terminal of the output transistor via its first input terminal, connected to the control terminal of the power system via its second input terminal, and connected to the ground terminal via its output terminal.

[0009] The first voltage divider circuit is disposed between the input terminal and the second output terminal of the output transistor, and is turned on when the control transistor is in the on state;

[0010] The output transistor is turned on when the voltage drop across the first voltage divider circuit is higher than the conduction threshold in order to maintain the output voltage of the delayed power-off circuit. The output of the delayed power-off circuit is connected to or serves as the power input of the power system.

[0011] As a further improvement of one embodiment of this application, the circuit further includes: a second voltage divider circuit, disposed between the second output terminal of the output transistor and the first input terminal of the control transistor, and turned on when the control transistor is in the on state.

[0012] As a further improvement of one embodiment of this application, the second voltage divider circuit includes a Zener diode or a first voltage divider resistor;

[0013] The anode of the Zener diode is connected to the first input terminal of the control transistor, and the cathode is connected to the second output terminal of the output transistor.

[0014] One end of the first voltage divider resistor is connected to the first input terminal of the control transistor, and the other end is connected to the second output terminal of the output transistor.

[0015] As a further improvement of one embodiment of this application, the second voltage divider circuit includes a Zener diode and a first voltage divider resistor;

[0016] The Zener diode is connected in series with the first voltage divider resistor, the other end of the first voltage divider resistor is connected to the second output terminal of the output transistor, and the anode of the Zener diode is connected to the first input terminal of the control transistor.

[0017] As a further improvement of one embodiment of this application, the first voltage divider circuit includes a second voltage divider resistor or a voltage divider diode;

[0018] One end of the second voltage divider resistor is connected to the input terminal of the output transistor, and the other end is connected to the second output terminal of the output transistor;

[0019] The anode of the voltage divider diode is connected to the input terminal of the output transistor, and the cathode is connected to the second output terminal of the output transistor.

[0020] As a further improvement to one embodiment of this application, the circuit further includes:

[0021] The first diode is connected to the auxiliary power supply with its anode and to the input terminal of the output transistor through its cathode.

[0022] As a further improvement to one embodiment of this application, the circuit further includes:

[0023] A power control switch is provided, with one end connected to the main power supply and the other end connected to or serving as the output terminal of the delayed power-off circuit. When the power control switch is in the closed state, the main power supply provides power to the power system.

[0024] As a further improvement of one embodiment of this application, when the power control switch is in the closed state, the output transistor is in the off state; when the power control switch is in the open state, the control transistor is in the on state, and the voltage drop across the first voltage divider circuit is greater than the on-state voltage threshold, the output transistor is in the on state.

[0025] When the power control switch switches from the closed state to the open state, the control transistor is in the on state.

[0026] As a further improvement to one embodiment of this application, the circuit further includes:

[0027] The second diode is connected to the power control switch with its anode and connected to or used as the output terminal of the delayed power-off circuit through its cathode.

[0028] The third diode is connected to the power control switch with its anode and to the first input terminal of the control transistor with its cathode.

[0029] As a further improvement of one embodiment of this application, the control transistor is an NPN transistor and the output transistor is a PNP transistor.

[0030] To achieve one of the above objectives, another embodiment of this application provides a delayed power-off device, including a delayed power-off circuit as described in the above embodiment.

[0031] Compared with existing technologies, the advantages of this application are as follows: through the cooperation of the output transistor, control transistor, and voltage divider circuit, this application can achieve a smooth power-off delay when the power is disconnected, avoiding the instantaneous voltage fluctuations during power switching in existing technologies. Furthermore, through the optimized configuration of the power control switch and diodes, this application further improves the stability and reliability of the circuit, which helps to avoid voltage fluctuations and equipment damage caused by instantaneous power outages, and can be widely used in electrical equipment with high power stability requirements. Attached Figure Description

[0032] Figure 1 A schematic diagram of a delayed power-off circuit structure provided in an illustrative embodiment of this application is shown;

[0033] Figure 2 A schematic diagram of a delayed power-off circuit provided in another illustrative embodiment of this application is shown;

[0034] Figure 3 This illustration shows a structural diagram of a delayed power-off circuit including a Zener diode and a first voltage divider resistor, according to an illustrative embodiment of this application.

[0035] Figure 4 A structural diagram of a delayed power-off circuit provided in an illustrative embodiment of this application is shown.

[0036] Among them, 10 is the output transistor, 20 is the control transistor, 30 is the first voltage divider circuit, 40 is the second voltage divider circuit, 41 is the Zener diode, 42 is the first voltage divider resistor, 50 is the power control switch, 61 is the first diode, 62 is the second diode, and 63 is the third diode. Detailed Implementation

[0037] The present application will now be described in detail with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present application, and any structural, methodological, or functional modifications made by those skilled in the art based on these embodiments are included within the scope of protection of this application.

[0038] It should be noted that the term "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," "third," "fourth," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0039] In one embodiment of the present invention, a delayed power-off circuit is provided to achieve a stable transition during power switching.

[0040] like Figures 1 to 4 As shown, the delayed power-off circuit provided in this application includes an output transistor 10, a control transistor 20, and a first voltage divider circuit 30.

[0041] Figure 1 A schematic diagram of a delayed power-off circuit structure provided in an illustrative embodiment of this application is shown.

[0042] The output transistor 10 is used to output power when it is turned on. It can be configured as a transistor of any size and with suitable voltage resistance, such as a bipolar junction transistor (BJT) or a field-effect transistor (FET). The output transistor 10 is connected to the auxiliary power supply Power2 IN at its input terminal and is connected to or used as the output terminal of the delayed power-off circuit through its first output terminal.

[0043] The control transistor 20 is used to switch its operating state according to the signal input, thereby indirectly controlling the operating state of the output transistor 10. This operating state is not limited to controlling its operation in the cutoff region, variable resistance region, and saturation region (or constant current region), but can also be used to control the voltage or current at a certain terminal. The control transistor 20 can be configured as a transistor of any size and with suitable voltage withstand capability.

[0044] Preferably, the output transistor 10 is a PNP transistor and the control transistor 20 is an NPN transistor. The NPN structure of the control transistor 20 enables it to provide a lower saturation voltage drop when it is turned on, while the PNP structure of the output transistor 10 can ensure the stability of the output voltage under appropriate control signals. The combination of NPN and PNP transistors forms a complementary pair in the circuit, which helps to improve the circuit's conduction efficiency and stability.

[0045] When the control transistor 20 (NPN type) is in the ON state, the voltage drop between its collector and emitter is small, which allows it to drive the base of the PNP type output transistor 10 through its collector, thus turning on the output transistor 10 and providing power to the power system. When the control transistor 20 is in the OFF state, the PNP type output transistor is also turned off, and the circuit stops providing power to the power system.

[0046] Specifically, the output transistor 10 can be configured to connect its input terminal to the auxiliary power supply and its first output terminal to the output terminal OUT of the delayed power-off circuit, or the output terminal of the output transistor 10 can be directly used as the output terminal OUT of the delayed power-off circuit.

[0047] It is understood that the output and input terminals described in this application can be interpreted as the input and output terminals formed when current flows through the corresponding transistor.

[0048] The control transistor 20 can be configured such that its first input terminal is connected to the second output terminal of the output transistor 10, its second input terminal is connected to the control terminal IN_CTRL of the power system, and its output terminal is connected to the power ground terminal. Thus, the control transistor 20 changes its operating state according to the signal from the power system control terminal IN_CTRL, indirectly controlling the operating state of the output transistor 10.

[0049] The input terminal of the output transistor 10 can be the emitter of the transistor; the auxiliary power supply is the power supply that supplies power to the power system, for example, it can be the operating voltage of the chip where the power system is located.

[0050] Specifically, when the voltage drop across the first voltage divider circuit 30 is higher than the conduction threshold, the output transistor 10 is turned on to maintain the output voltage of the delayed power-off circuit. The output of the delayed power-off circuit is connected to or serves as the power input of the power system, so that when the voltage drop across the first voltage divider circuit 30 is higher than the conduction threshold, the output transistor 10 is turned on to maintain the voltage of the power system.

[0051] The delayed power-off circuit achieves delayed disconnection of power to the electrical system by coordinating the output transistor 10, the control transistor 20, and the first voltage divider circuit. When the control transistor 20 is turned on, the first voltage divider circuit is turned on, thereby regulating the voltage level in the circuit. Essentially, whether the output transistor 10 is turned on depends on the voltage level across the first voltage divider circuit. The output transistor 10 will only turn on if the voltage drop across the first voltage divider circuit is higher than its turn-on threshold, thus maintaining the output voltage of the delayed power-off circuit.

[0052] In the delayed power-off circuit structure provided in this application embodiment, the output transistor 10, control transistor 20, and voltage divider circuit work together to achieve a smooth power-off delay when the power is disconnected, avoiding the instantaneous voltage fluctuations during power switching in the prior art. This application further improves the stability and reliability of the circuit through optimized configuration of the power control switch and diodes, which helps to avoid voltage fluctuations and equipment damage caused by instantaneous power outages, and can be widely used in electrical equipment with high power stability requirements.

[0053] This is illustrative; please refer to it. Figure 2 The diagram illustrates a delayed power-off circuit provided in another exemplary embodiment of this application. This delayed power-off circuit structure further includes a second voltage divider circuit 40, which is disposed between the second output terminal of the output transistor 10 and the first input terminal of the control transistor 20, and is turned on when the control transistor 20 is in the on state.

[0054] When the control transistor 20 is in the on state, the second voltage divider circuit 40 is turned on, further adjusting the voltage level of the circuit. The use of the second voltage divider circuit 40 helps to precisely control the input voltage of the control transistor 20, thereby ensuring the on and off states of the output transistor 10 and enabling a more accurate response to the power system's demands.

[0055] Optionally, the second voltage divider circuit 40 can be constructed using suitable resistors or other voltage divider components to ensure that the delayed power-off circuit has higher stability and reliability during the delayed power-off process.

[0056] In one possible implementation, the second voltage divider circuit 40 includes a Zener diode 41 or a first voltage divider resistor 42. The anode of the Zener diode 41 is connected to the first input terminal of the control transistor 20, and the cathode is connected to the second output terminal of the output transistor 10; one end of the first voltage divider resistor 42 is connected to the first input terminal of the control transistor 20, and the other end is connected to the second output terminal of the output transistor 10.

[0057] In this circuit, the anode of the Zener diode 41 is connected to the second output terminal of the output transistor 10. Since the Zener diode operates in reverse breakdown mode, when the reverse voltage reaches and exceeds the stable voltage, the reverse current suddenly increases, while the voltage across it remains essentially constant. This allows it to maintain a relatively constant voltage across the load when the power supply voltage fluctuates, thus forming a stable voltage control path in the delayed power-off circuit. In the delayed power-off circuit, the Zener diode 41 maintains the voltage in the circuit within a stable range, ensuring that the control transistor 20 can be turned on or off at an appropriate voltage. It also helps to stabilize the voltage drop across the first voltage divider circuit 30 to some extent.

[0058] In addition, the second voltage divider circuit 40 may also include a first voltage divider resistor 42, which is used to divide the current to ensure that the input voltage of the control transistor 20 is within an appropriate range to achieve the target control effect.

[0059] In this embodiment, when the Zener diode 41 and the first voltage divider circuit 30 are combined to form a circuit, the second voltage divider circuit 40 can effectively regulate the input voltage of the control transistor, ensuring that voltage fluctuations do not affect the normal operation of the system and precisely control the current flow in the circuit, thereby achieving a more stable and reliable delayed power-off process. The combination of the first voltage divider resistor 42 and the first voltage divider circuit 30 provides a simple and effective voltage distribution method, enabling the circuit to maintain stability under various conditions.

[0060] In another possible implementation, the second voltage divider circuit 40 includes a Zener diode and a first voltage divider resistor connected in series. The other end of the first voltage divider resistor is connected to the second output terminal of the transistor, and the anode of the Zener diode is connected to the first input terminal of the control transistor.

[0061] Please refer to Figure 3The diagram illustrates a structural diagram of a delayed power-off circuit including a Zener diode and a first voltage divider resistor, provided by an exemplary embodiment of this application. The circuit includes a Zener diode 41 and a first voltage divider resistor 42. The Zener diode 41 and the first voltage divider resistor 42 are connected in series, so that the Zener diode 41 and the first voltage divider resistor 42 work together to ensure that the input voltage of the control transistor 20 is stable within a specific range, thereby enabling precise control of the on and off states of the control transistor 20.

[0062] The Zener diode 41 is used to ensure that the voltage in the circuit does not exceed a certain threshold through its own voltage reduction characteristics, so as to avoid the influence of excessive voltage on the control transistor 20. At the same time, the first voltage divider resistor 42 is used to distribute the voltage to ensure that the voltage across the Zener diode 41 is appropriate, so that the entire circuit remains stable during power switching and prevents the circuit from becoming unstable due to excessive or insufficient voltage.

[0063] In this embodiment, by connecting the first voltage divider resistor 42 and the Zener diode 41 in series to form a second voltage divider circuit, the path voltage can be effectively stabilized in scenarios with large voltage fluctuations, thereby reducing equipment damage or abnormal operation of the power system caused by voltage instability.

[0064] In one embodiment, the first voltage divider circuit 30 may be constructed using a second voltage divider resistor 31 or a voltage divider diode. When the first voltage divider circuit 30 includes a second voltage divider resistor 31, one end of the second voltage divider resistor 31 is connected to the input terminal of the output transistor 10, and the other end is connected to the second output terminal of the output transistor 10. When the first voltage divider circuit 30 includes a voltage divider diode, the anode of the voltage divider diode is connected to the input terminal of the output transistor 10, and the cathode is connected to the second output terminal of the output transistor 10.

[0065] Optionally, when the first voltage divider circuit 30 is the second voltage divider resistor 31, the voltage distribution in the circuit can be adjusted based on the resistance value of the second voltage divider resistor 31. When the resistance is large, the voltage drop across the first voltage divider circuit 30 is large; when the resistance is small, the voltage drop across the first voltage divider circuit 30 is small. Since in this embodiment, the output transistor 10 is in the conducting state when the voltage drop across the first voltage divider circuit 30 is greater than the conduction threshold of the output transistor 10, a suitable first voltage divider resistor 42 needs to be selected to ensure that the output transistor 10 is in the conducting state and correctly maintain the delayed power-off effect.

[0066] Optionally, when the first voltage divider circuit 30 is a voltage divider diode, the voltage divider diode, through its non-linear conductivity, can maintain a stable current flow within a certain voltage range, thereby ensuring that the output transistor 10 maintains an appropriate operating state during power switching. Furthermore, to ensure that the voltage drop across the voltage divider diode meets the conduction condition of the output transistor 10, a suitable voltage divider diode needs to be selected based on the conduction threshold of the output transistor 10. For example, if the conduction threshold between the emitter and base of the output transistor 10 is 0.7V, a silicon diode needs to be used as the voltage divider diode, because the forward voltage drop of a silicon diode is approximately 0.8V, which is sufficient to turn on the output transistor 10.

[0067] Optionally, the first voltage divider circuit 30 may be composed of a Zener diode 41. In this case, the Zener diode 41 is configured with its anode connected to the second output terminal of the output transistor 10 and its cathode connected to the input terminal of the output transistor 10. This allows the Zener diode 41 to operate under reverse breakdown conditions, maintaining a stable voltage between the second output terminal and the input terminal of the output transistor 10, and keeping the output transistor 10 in a conducting state when the first voltage divider circuit is turned on.

[0068] This is illustrative; please refer to it. Figure 4 This illustration shows a schematic diagram of a delayed power-off circuit structure provided in an illustrative embodiment of this application, which also includes a power control switch 50. One end of the power control switch 50 is connected to the main power supply Power1IN, and the other end is connected to the output terminal of the delayed power-off circuit. When the power control switch 50 is in the closed state, the main power supply supplies power to the power system and provides electrical energy to the delayed power-off circuit.

[0069] The power control switch 50 is used to control the on / off state of the power supply according to system requirements. Under normal operating conditions, the power control switch 50 is closed, and the main power supply provides continuous power to the electrical system. When the electrical system needs to switch power, or when the main power supply fails, the power control switch 50 is opened, cutting off the main power supply and providing backup power through a delayed power-off circuit. This ensures a smooth transition for the system and avoids voltage fluctuations or equipment damage caused by sudden power outages.

[0070] When the power control switch 50 is closed, the main power supply Power1 IN supplies power to the electrical system. At this time, the output transistor 10 is in the off state, the path between the auxiliary power supply Power2 IN and the electrical system is not connected, and the circuit does not perform power switching. That is, after the power control switch 50 is closed, the input terminal of the output transistor 10 is connected to the auxiliary power supply, and since the control transistor 20 is not turned on, the output transistor is kept in the off state, and no current is allowed to flow.

[0071] After the power system starts up, the power system controls the transistor 20 to turn on. Specifically, the power system provides a stable electrical signal to the transistor 20 via the control terminal IN_CTRL, ensuring that the transistor 20 is on. At this time, the first voltage divider circuit 30 and the second voltage divider circuit 40 are on. Whether the output transistor 10 is on depends on the voltage drop across the first voltage divider circuit 30. When the voltage drop across the first voltage divider circuit 30 is higher than the on-state voltage threshold, the output transistor 10 turns on.

[0072] When the power control switch 50 is switched to the off state, the main power supply is cut off. At this time, the output transistor 10 can still remain on, thereby providing power input to the power system.

[0073] Optionally, the first voltage divider circuit 30 adjusts the voltage to ensure that the output transistor 10 can also be turned on smoothly when the control transistor 20 is turned on, thus maintaining a stable power output.

[0074] The power switching mechanism provided in this embodiment ensures that when the power control switch 50 is turned off, the output transistor 10 can be turned on at the appropriate time, thereby ensuring that the backup power supply is connected in time and avoiding voltage fluctuations and system instability during the power switching process.

[0075] As mentioned above Figure 4 The delayed power-off circuit also includes a first diode 61, a second diode 62, and a third diode 63.

[0076] In this circuit, the first diode 61 is connected to the auxiliary power supply with its anode and to the input terminal of the output transistor 10 through its cathode. This diode ensures that the current in the delayed power-off circuit flows in the correct direction, thereby maintaining circuit stability during power switching; that is, the first diode 61 plays a protective role during power switching. When the auxiliary power supply is connected to the input terminal of the output transistor 10, the first diode 61 prevents reverse current from entering the input terminal of the output transistor 10, avoiding damage to circuit components. Furthermore, the diode's voltage drop characteristic can stabilize the voltage in the circuit under certain conditions, providing additional voltage regulation functionality.

[0077] The second diode 62 has its anode connected to the power control switch 50, and its cathode connected to or serving as the output terminal of the delayed power-off circuit. The third diode 63 has its anode connected to the power control switch 50, and its cathode connected to the first input terminal of the control transistor 10. Similarly, the second diode 62 and the third diode 63 are used to ensure that the current in the delayed power-off circuit flows in the correct direction, thereby maintaining the stability of the circuit during power switching.

[0078] Specifically, when the power control switch 50 is in the open state, the second diode 62 provides a current path, enabling the output to respond correctly to power switching and smoothly supply power to the power system. When the power control switch 50 switches from the closed state to the open state, the third diode 63 ensures that the first input terminal of the control transistor 20 can correctly receive the control signal, thereby turning on the control transistor 20, further guiding the output transistor 10 to turn on, ensuring the stability of the output of the delayed power-off circuit.

[0079] By introducing the first, second, and third diodes, adverse effects on the power system caused by reverse current or voltage fluctuations during power switching can be effectively prevented. The diodes provide a stable current path, ensuring that the current flow direction always conforms to expectations during power switching, thereby improving circuit stability and ensuring that voltage fluctuations during power switching do not affect the normal operation of the power system.

[0080] According to an embodiment of the present invention, the delayed power-off device includes the aforementioned delayed power-off circuit, characterized in that the device integrates various components (such as output transistors, control transistors, voltage divider circuits, etc.) in the delayed power-off circuit to form a complete power management unit. This device can provide delayed control during power switching, avoiding instantaneous voltage fluctuations during power switching and ensuring the stable operation of the power system.

[0081] Optionally, the delayed power-off device integrates all modules of the delayed power-off circuit into a single device, enabling its direct application in various power management systems, such as smart grids, electronic devices, and medical equipment—applications requiring high power stability. This device can control the switching between main and backup power supplies as needed, and maintain a smooth transition during power outages through the delayed power-off circuit, preventing adverse effects on equipment during power interruptions.

[0082] Through this integrated design, the delayed power-off device not only provides the functionality of a delayed power-off circuit but also offers the advantages of system integration, simplifying circuit design, reducing the number of components, and improving system reliability and convenience. Furthermore, this device has broad application prospects, effectively enhancing the performance of power management systems and ensuring the safety and stability of equipment during power switching.

Claims

1. A delayed power-off circuit, characterized in that, include: An output transistor, with its input terminal connected to an auxiliary power supply, and its first output terminal connected to or serving as the output terminal of a delayed power-off circuit; A control transistor is connected to the second output terminal of the output transistor via its first input terminal, connected to the control terminal of the power system via its second input terminal, and connected to the ground terminal via its output terminal. The first voltage divider circuit is disposed between the input terminal and the second output terminal of the output transistor, and is turned on when the control transistor is in the on state; The output transistor is turned on when the voltage drop across the first voltage divider circuit is higher than the conduction threshold in order to maintain the output voltage of the delayed power-off circuit. The output of the delayed power-off circuit is connected to or serves as the power input of the power system.

2. The delayed power-off circuit according to claim 1, characterized in that, The circuit also includes: The second voltage divider circuit is disposed between the second output terminal of the output transistor and the first input terminal of the control transistor, and is turned on when the control transistor is in the on state.

3. The delayed power-off circuit according to claim 2, characterized in that, The second voltage divider circuit includes a Zener diode or a first voltage divider resistor; The anode of the Zener diode is connected to the first input terminal of the control transistor, and the cathode is connected to the second output terminal of the output transistor. One end of the first voltage divider resistor is connected to the first input terminal of the control transistor, and the other end is connected to the second output terminal of the output transistor.

4. The delayed power-off circuit according to claim 2, characterized in that, The second voltage divider circuit includes a Zener diode and a first voltage divider resistor; The Zener diode is connected in series with the first voltage divider resistor, the other end of the first voltage divider resistor is connected to the second output terminal of the output transistor, and the anode of the Zener diode is connected to the first input terminal of the control transistor.

5. The delayed power-off circuit according to claim 1, characterized in that, The first voltage divider circuit includes a second voltage divider resistor or a voltage divider diode; One end of the second voltage divider resistor is connected to the input terminal of the output transistor, and the other end is connected to the second output terminal of the output transistor; The anode of the voltage divider diode is connected to the input terminal of the output transistor, and the cathode is connected to the second output terminal of the output transistor.

6. The delayed power-off circuit according to claim 1, characterized in that, The circuit also includes: The first diode has its anode connected to the auxiliary power supply and its cathode connected to the input terminal of the output transistor.

7. The delayed power-off circuit according to claim 1, characterized in that, The circuit also includes: A power control switch is provided, with one end connected to the main power supply and the other end connected to or serving as the output terminal of the delayed power-off circuit. When the power control switch is in the closed state, the main power supply provides power to the power system.

8. The delayed power-off circuit according to claim 7, characterized in that, When the power control switch is closed, the output transistor is in the off state; when the power control switch is open, the control transistor is in the on state, and the voltage drop across the first voltage divider circuit is greater than the on-state voltage threshold, the output transistor is in the on state. When the power control switch switches from the closed state to the open state, the control transistor is in the on state.

9. The delayed power-off circuit according to claim 7, characterized in that, The circuit also includes: The second diode is connected to the power control switch with its anode and connected to or used as the output terminal of the delayed power-off circuit through its cathode. The third diode is connected to the power control switch with its anode and to the first input terminal of the control transistor with its cathode.

10. The delayed power-off circuit according to claim 1, characterized in that, The control transistor is an NPN transistor, and the output transistor is a PNP transistor.

11. A delayed power-off device, characterized in that, Includes the delayed power-off circuit as described in any one of claims 1-10.

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