Novel display substrate and liquid crystal display device

Abstract

The utility model discloses a novel display substrate and a liquid crystal display device. The novel display substrate comprises a plurality of grid metal wires, a plurality of column data lines, a plurality of pixel units, a plurality of thin film transistors and a black matrix, each pixel unit comprises an R sub-pixel, a G sub-pixel and a B sub-pixel; the R sub-pixels, the G sub-pixels and the B sub-pixels are arranged to form a sub-pixel array; the column data lines are electrically connected with the sub-pixels of the corresponding columns through the source electrodes of the thin film transistors; the thin film transistors are electrically connected with the corresponding sub-pixels through drain electrodes; two of the plurality of grid metal wires or / and the plurality of column data wires are close to the parallel lines, and the grid metal wires or / and the column data wires close to the parallel lines are electrically connected with the sub-pixels on the two sides respectively; two of the plurality of gate metal wires or / and the plurality of column data wires are close to the parallel wires, and the black matrix shields the gate metal wires or / and the column data wires in an interlaced manner or / and an interlaced manner, so that the aperture opening ratio of pixels is greatly improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of aperture ratio of liquid crystal display device, especially a novel display substrate and liquid crystal display device. BACKGROUND

[0002] For the aperture ratio of the existing liquid crystal display screen, its influencing factors mainly have multiple, for example, electrode design, transistor structure and material characteristics etc. The electrode size and layout among them have influence on the aperture ratio. If the electrode is too wide or the wiring is complex, it will occupy more pixel area, make the light transmission area smaller, and the aperture ratio reduces. If narrow frame electrode design or optimized electrode wiring layout is adopted. The size, shape and position of TFT transistor are very critical. Small size, high performance transistor can reduce the occupied space in the pixel while ensuring the driving ability, and increase the light transmission area. New transistor structure such as fin field effect transistor (FinFET) can improve the aperture ratio.

[0003] The wiring layout mode of TFT transistor of the pixel of the existing liquid crystal display screen has independent gate wire and source wire for each row and each column, so as to realize independent control of each pixel. Since the corresponding black matrix (light shielding layer BM in array substrate) needs to be shielded above the metal wire, the pixel aperture ratio is lost. SUMMARY

[0004] The wiring layout of TFT transistor of the pixel of the existing liquid crystal display screen causes the aperture ratio loss and the display quality reduction.

[0005] In view of the above problems, a novel display substrate and liquid crystal display device are provided, two adjacent parallel wires in a plurality of gate metal wires or / and a plurality of column data lines are arranged close to each other, the black matrix is arranged to shield the gate metal wire or / and the column data line in an interlaced manner or / and in an intercolumnar manner, and the aperture ratio of the pixel is greatly improved.

[0006] In the first aspect, a novel display substrate comprises:

[0007] A plurality of gate metal wires;

[0008] A plurality of column data lines;

[0009] A plurality of pixel units;

[0010] A plurality of thin film transistors;

[0011] A black matrix;

[0012] Each of the pixel units comprises an R sub-pixel, a G sub-pixel and a B sub-pixel;

[0013] The R sub-pixel, the G sub-pixel and the B sub-pixel are arranged to form a sub-pixel array;

[0014] The column data line is electrically connected with the sub-pixel of the corresponding column through the source of the thin film transistor;

[0015] The thin film transistor is electrically connected with the corresponding sub-pixel through the drain;

[0016] Two of the plurality of gate metal wires or / and the plurality of column data lines are close to parallel wires, and the gate metal wires or / and the column data lines close to the parallel wires are electrically connected with the sub-pixels on both sides, respectively.

[0017] The black matrix is used for row-by-row or / and column-by-column shielding of the gate metal wires or / and the column data lines close to the parallel wires.

[0018] In a first possible implementation of the novel display substrate, two of the plurality of gate metal wires are close to parallel wires, the plurality of column data lines are single-row wires, the gate metal wires are electrically connected with the gate of the sub-pixel thin film transistor close to the row, and the column data lines are electrically connected with the source of the sub-pixel thin film transistor of the corresponding column.

[0019] In a second possible implementation of the first possible implementation of the novel display substrate, the black matrix is further used for shielding the two gate metal wires close to the parallel wires and the gap between the two gate metal wires close to the parallel wires, and shielding the column data lines of the single-row wires.

[0020] In a third possible implementation of the novel display substrate, two of the plurality of gate metal wires are close to parallel wires, two of the plurality of column data lines are close to parallel wires, the gate metal wires are electrically connected with the gate of the sub-pixel thin film transistor close to the row, and the column data lines are electrically connected with the source of the sub-pixel thin film transistor close to the column.

[0021] In a fourth possible implementation of the third possible implementation of the novel display substrate, the black matrix is further used for shielding the two gate metal wires close to the parallel wires and the gap between the two gate metal wires close to the parallel wires, and shielding the two column data lines close to the parallel wires and the gap between the two column data lines close to the parallel wires.

[0022] In a fifth possible implementation of the novel display substrate, the plurality of gate metal wires are single-row wires, two of the plurality of column data lines are close to parallel wires, the gate metal wires are electrically connected with the gate of the sub-pixel thin film transistor of the corresponding row, and the column data lines are electrically connected with the source of the sub-pixel thin film transistor close to the column.

[0023] In combination with the fifth possible implementation manner of the utility model, in the sixth possible implementation manner, the black matrix is further used for shielding the single row of gate metal wires and shielding the two close parallel row of column data lines and the gap between the two close parallel row of column data lines.

[0024] In a second aspect, a liquid crystal display device includes the novel display substrate of the first aspect.

[0025] The novel display substrate and the liquid crystal display device of the utility model can greatly improve the aperture ratio of pixels by using the black matrix to shield the two close parallel row of gate metal wires or / and column data lines. BRIEF DESCRIPTION OF DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the utility model, the following will briefly introduce the drawings needed to be used in the embodiment description, and obviously, the drawings in the following description are only some embodiments of the utility model, and for those skilled in the art, other drawings can also be obtained according to these drawings without creative labor.

[0027] Figure 1 It is the schematic diagram of the layout of the gate metal wire in the prior art;

[0028] Figure 2 It is the schematic diagram of the layout of the gate metal wire of the novel display substrate in the first embodiment of the application;

[0029] Figure 3 It is the shielding schematic diagram of the black matrix in the prior art;

[0030] Figure 4 It is the shielding schematic diagram of the black matrix in the first embodiment of the application. DETAILED DESCRIPTION

[0031] The technical solutions in the utility model will be described clearly and completely in combination with the drawings in the utility model, and obviously, the described embodiments are only some embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, other embodiments obtained by those skilled in the art without creative labor are all within the protection scope of the utility model.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application. As used in this description, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It is also to be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0033] It is to be noted that when an element is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or indirectly on or connected to the other element by way of one or more other elements.

[0034] It is to be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like as used herein are intended to refer to the orientation or position of the apparatus or element shown in the drawings as viewed in the drawings, and are merely used for convenience in describing the present application and simplifying the description, and are not intended to indicate or imply that the apparatus or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the application.

[0035] In addition, the terms "first", "second", "third", etc. are used herein only to describe various conditions, and should not be construed as indicating or implying relative importance or a specific number of the technical features indicated thereby. Thus, the features defined with "first", "second" or "third" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically defined.

[0036] The layout of the TFT transistor wire of the pixel of the existing liquid crystal display screen causes the aperture ratio loss and the display quality reduction, such as Figure 1 and Figure 3 , Figure 1 is a schematic diagram of the layout of the gate metal wire 100 in the prior art, Figure 3 is a schematic diagram of the shielding of the black matrix 300 in the prior art;

[0037] In view of the above problems, a novel display substrate and a liquid crystal display device are provided.

[0038] In a first aspect, a novel display substrate includes a plurality of gate metal traces 100, a plurality of column data lines 200, a plurality of pixel units, a plurality of thin film transistors, and a black matrix 300. Each pixel unit includes an R sub-pixel, a G sub-pixel, and a B sub-pixel. The R sub-pixel, the G sub-pixel, and the B sub-pixel are arranged to form a sub-pixel array. The column data line 200 is electrically connected to the sub-pixels in a corresponding column through the source of the thin film transistor. The thin film transistor is electrically connected to the corresponding sub-pixel through the drain. Two of the plurality of gate metal traces 100 or / and the plurality of column data lines 200 are arranged in close proximity to each other. The gate metal traces 100 or / and the column data lines 200 in close proximity to each other are electrically connected to the sub-pixels on both sides. The black matrix 300 is used to shield the gate metal traces 100 or / and the column data lines 200 in close proximity to each other in a row or / and in a column. By arranging two of the plurality of gate metal traces 100 or / and the plurality of column data lines 200 in close proximity to each other, and shielding the gate metal traces 100 or / and the column data lines 200 in a row or / and in a column by the black matrix 300, the aperture ratio of the pixel is greatly improved.

[0039] First embodiment

[0040] As Figure 2 And Figure 4 , Figure 2 is a layout diagram of the gate metal traces 100 of the novel display substrate in the first embodiment of the present application, Figure 4 is a shielding diagram of the black matrix 300 in the first embodiment of the present application. Two of the plurality of gate metal traces 100 are arranged in close proximity to each other, and the plurality of column data lines 200 are arranged in a single row. The gate metal traces 100 are electrically connected to the gate of the sub-pixel thin film transistor in close proximity to the row. The column data line 200 is electrically connected to the source of the sub-pixel thin film transistor in the corresponding column.

[0041] In the present embodiment, the black matrix 300 is further used to shield the two gate metal traces 100 arranged in close proximity to each other, the gap between the two gate metal traces 100 arranged in close proximity to each other, and the column data line 200 arranged in a single row.

[0042] In the present embodiment, the gate metal traces 100 are arranged in close proximity to each other, and the column data line 200 is still arranged in a single row. As Figure 3 And Figure 4 The total shielding width y2 after the layout of the metal traces is less than the shielding width 2*y1 before the layout of the metal traces, thereby improving the aperture ratio of the pixel.

[0043] Second embodiment

[0044] Two adjacent parallel gate metal wires 100 are adjacent to each other, two adjacent parallel column data lines 200 are adjacent to each other, the gate metal wires 100 are electrically connected to the gate electrodes of the sub-pixel thin film transistors adjacent to the row, and the column data lines 200 are electrically connected to the source electrodes of the sub-pixel thin film transistors adjacent to the column.

[0045] The black matrix 300 further shields the two adjacent parallel gate metal wires 100 and the gap between the two adjacent parallel gate metal wires 100, and shields the two adjacent parallel column data lines 200 and the gap between the two adjacent parallel column data lines 200.

[0046] The gate metal wires 100 in the embodiment are parallel, and the column data lines 200 are also parallel, so that the aperture ratio of the pixel can be further improved.

[0047] Third embodiment

[0048] Two adjacent parallel gate metal wires 100 are adjacent to each other, two adjacent parallel column data lines 200 are adjacent to each other, the gate metal wires 100 are electrically connected to the gate electrodes of the sub-pixel thin film transistors adjacent to the row, and the column data lines 200 are electrically connected to the source electrodes of the sub-pixel thin film transistors adjacent to the column.

[0049] The black matrix 300 further shields the two adjacent parallel gate metal wires 100 and the gap between the two adjacent parallel gate metal wires 100, and shields the two adjacent parallel column data lines 200 and the gap between the two adjacent parallel column data lines 200.

[0050] The gate metal wires 100 in the embodiment are parallel, and the column data lines 200 are also parallel, so that the aperture ratio of the pixel can be further improved.

[0051] Second aspect, a liquid crystal display device, comprising the novel display substrate of the first aspect.

[0052] The novel display substrate and the liquid crystal display device of the utility model, through two adjacent parallel gate metal wires 100 or / and two adjacent parallel column data lines 200, the black matrix 300 carries out the alternate row or / and the alternate column shielding of gate metal wire 100 or / and column data line 200, greatly improves the aperture ratio of pixel.

[0053] The above is only the preferred embodiment of the utility model, and does not limit the utility model, and any modification, equivalent replacement, improvement etc. that is made within the spirit and principle of the utility model should be included in the protection scope of the utility model.

Claims

1. A novel display substrate, characterized by, The display substrate comprises: a plurality of gate metal wires; a plurality of column data lines; a plurality of pixel units; a plurality of thin film transistors; a black matrix; each of the pixel units comprises an R sub-pixel, a G sub-pixel and a B sub-pixel; the R sub-pixel, the G sub-pixel and the B sub-pixel are arranged to form a sub-pixel array; the column data line is electrically connected to the sub-pixels in the corresponding column through the source of the thin film transistor; the thin film transistor is electrically connected to the corresponding sub-pixel through the drain; two of the gate metal wires or / and two of the column data lines are arranged in parallel, the gate metal wires or / and the column data lines arranged in parallel are electrically connected to the sub-pixels on both sides; the black matrix is used to shield the gate metal wires or / and the column data lines arranged in parallel by row or / and by column. 2.The novel display substrate according to claim 1, characterized in that, two of the gate metal wires are arranged in parallel, the column data lines are arranged in a single row, the gate metal wires are electrically connected to the gates of the thin film transistors of the sub-pixels arranged in a row, and the column data lines are electrically connected to the sources of the thin film transistors of the sub-pixels arranged in a column. 3.The novel display substrate according to claim 2, characterized in that, The black matrix is further used to shield the two gate metal wires arranged in parallel, the gap between the two gate metal wires arranged in parallel, the column data lines arranged in a single row. 4.The novel display substrate according to claim 1, characterized in that, two of the gate metal wires are arranged in parallel, two of the column data lines are arranged in parallel, the gate metal wires are electrically connected to the gates of the thin film transistors of the sub-pixels arranged in a row, and the column data lines are electrically connected to the sources of the thin film transistors of the sub-pixels arranged in a column. 5.The novel display substrate according to claim 4, characterized in that, The black matrix is further used to shield the two gate metal wires arranged in parallel, the gap between the two gate metal wires arranged in parallel, the two column data lines arranged in parallel and the gap between the two column data lines arranged in parallel. 6.The novel display substrate according to claim 1, characterized in that, The gate metal wires are arranged in a single row, two of the column data lines are arranged in parallel, the gate metal wires are electrically connected to the gates of the thin film transistors of the sub-pixels arranged in a row, and the column data lines are electrically connected to the sources of the thin film transistors of the sub-pixels arranged in a column. 7.The novel display substrate according to claim 6, characterized in that, The black matrix is further used to shield the gate metal wires arranged in a single row, the two column data lines arranged in parallel and the gap between the two column data lines arranged in parallel.

8. A liquid crystal display device, characterized by comprising: The display substrate comprises the novel display substrate according to any one of claims 1-7.

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