Optical storage topology circuit

Abstract

The utility model discloses an optical storage topology circuit, and relates to the field of energy storage. According to the specific implementation scheme, the system comprises a photovoltaic panel, a voltage regulation circuit used for regulating the output voltage of the photovoltaic panel, a battery pack used for storing energy, an output side level conversion circuit, a photovoltaic panel straight-through loop and an output load, the photovoltaic panel is electrically connected with the voltage regulation circuit and the input end of the photovoltaic panel straight-through loop, the output end of the photovoltaic panel straight-through loop is electrically connected with the output load, and the output end of the voltage regulation circuit is electrically connected with the battery pack; the input end of the output side level conversion circuit is electrically connected with the battery pack, and the output end of the output side level conversion circuit is electrically connected with the output load. According to the utility model, when the photovoltaic input power of the equipment is greater than the load power consumption of the whole household distribution network, the matched battery stores redundant power through the battery pack, and when the photovoltaic input power is very small, the battery pack is used for discharging, so that the whole system works in an optimal state; loss is reduced, and working efficiency of the system is improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to energy storage technical field especially relates to a light storage topology circuit. BACKGROUND

[0002] With the growth of global demand for renewable energy, photovoltaic power generation as a clean, renewable energy form has been widely used. However, although photovoltaic power generation has significant advantages in reducing greenhouse gas emissions and promoting energy diversity, it also faces some challenges in the actual application process, one of which is the problem of power waste.

[0003] The output power of photovoltaic power generation system is affected by factors such as sunshine intensity and weather conditions, and has obvious volatility and intermittency. For example, on a sunny day, photovoltaic panels can generate a large amount of electrical energy, while the actual electricity demand of the family may not be high at this time, resulting in that part of the electrical energy cannot be effectively utilized, and thus causing power waste, and the excess electrical energy cannot be effectively stored. SUMMARY

[0004] Based on this, the utility model provides a light storage topology circuit to solve the problem that excess electrical energy cannot be effectively stored.

[0005] The utility model provides a light storage topology circuit, comprising:

[0006] Photovoltaic panel, voltage regulation circuit for adjusting the output voltage of the photovoltaic panel, battery pack for energy storage, output side level conversion circuit, photovoltaic panel straight-through loop and output load;

[0007] The photovoltaic panel is electrically connected with the input end of the voltage regulation circuit and the photovoltaic panel straight-through loop, the output end of the photovoltaic panel straight-through loop is electrically connected with the output load, and the output end of the voltage regulation circuit is electrically connected with the battery pack;The input end of the output side level conversion circuit is electrically connected with the battery pack, and the output end of the output side level conversion circuit is electrically connected with the output load.

[0008] The voltage regulation module comprises a first MOS tube, a second MOS tube, a third MOS tube, a first inductor and a first diode;

[0009] The drain of the first MOS tube is electrically connected with the positive electrode of the photovoltaic panel, the source of the first MOS tube is electrically connected with the positive electrode of the first diode through the first inductor, one end of the first inductor is also electrically connected with the drain of the second MOS tube, the source of the second MOS tube is connected with the negative electrode of the photovoltaic panel, the other end of the first inductor is also electrically connected with the drain of the third MOS tube, and the source of the third MOS tube is connected with the negative electrode of the photovoltaic panel.

[0010] The positive electrode of the battery pack is electrically connected with the negative electrode of the first diode, and the negative electrode of the battery pack is electrically connected with the negative electrode of the photovoltaic panel.

[0011] The output side level conversion circuit comprises a fourth MOS tube, a second diode, a third diode and a second inductor.

[0012] The drain of the fourth MOS tube is electrically connected with the negative electrode of the first diode, the source of the fourth MOS tube is electrically connected with the positive electrode of the third diode through the second inductor, the negative electrode of the third diode is electrically connected with the output load, the positive electrode of the second diode is electrically connected with the negative electrode of the battery pack, and the negative electrode of the second diode is electrically connected with the source of the fourth MOS tube.

[0013] The photovoltaic panel direct circuit comprises a fifth MOS tube and a sixth MOS tube, the drain of the fifth MOS tube is electrically connected with the positive electrode of the photovoltaic panel, the source of the fifth MOS tube is electrically connected with the source of the sixth MOS tube, and the drain of the sixth MOS tube is connected with the output load.

[0014] The first resistance and the second resistance are connected in parallel, one end of the first resistance is electrically connected with the source of the second MOS tube, the other end of the first resistance is electrically connected with the negative electrode of the photovoltaic panel, one end of the second resistance is electrically connected with the second diode, and the other end of the second resistance is electrically connected with the output load.

[0015] The first capacitor, the second capacitor, the third capacitor and the fourth capacitor are further included, the first capacitor is connected in parallel across the photovoltaic panel, one end of the second capacitor is electrically connected with the negative electrode of the second diode, the other end of the second capacitor is electrically connected with one end of the first resistance, one end of the third capacitor is electrically connected with the drain of the fourth MOS tube, the other end of the third capacitor is electrically connected with the negative electrode of the battery pack, and the fourth capacitor is connected in parallel with the output load.

[0016] The input voltage of the photovoltaic panel is 16V-60V.

[0017] The battery matched with the photovoltaic panel can store the excess power when the input power of the photovoltaic panel is greater than the load power of the entire family, and the battery can discharge when the input power of the photovoltaic panel is small, so that the photovoltaic inverter and the power distribution network work in the optimal state.

[0018] It should be appreciated that the content described in this section is not intended to identify key or critical features of the embodiments of the application, nor is it intended to limit the scope of the application. Other features of the present application will be apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0019] The accompanying drawings are used to better understand the present application, and do not constitute a limitation on the present application. Among them:

[0020] Figure 1 is a schematic diagram of the optical storage topology circuit provided by the present application;

[0021] Figure 2 is a schematic diagram of the current flow when the third MOS tube is normally closed, the first MOS tube is turned on, and the second MOS tube is turned off according to the present application;

[0022] Figure 3 is a schematic diagram of the current flow when the third MOS tube is normally closed, the first MOS tube is turned off, and the second MOS tube is turned on according to the present application;

[0023] Figure 4 is a schematic diagram of the current flow when the first MOS tube is normally open, the second MOS tube is normally closed, and the third MOS tube is turned on according to the present application;

[0024] Figure 5 is a schematic diagram of the current flow when the first MOS tube is normally open, the second MOS tube is normally closed, and the third MOS tube is turned off according to the present application;

[0025] Figure 6 is a schematic diagram of the current flow when the fourth MOS tube is turned on according to the present application;

[0026] Figure 7 is a schematic diagram of the current flow when the fourth MOS tube is turned off according to the present application;

[0027] Figure 8 is a schematic diagram of the current flow when the fifth MOS tube and the sixth MOS tube are turned on according to the present application. DETAILED DESCRIPTION

[0028] The exemplary embodiments of the present application are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present application to help in understanding, and should be considered as merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present application. Also, in order to be clear and concise, the description below omits the description of well-known functions and structures.

[0029] As Figure 1The utility model provides a kind of optical storage topology circuit, comprising:

[0030] Photovoltaic panel PV, voltage regulating circuit 100 for adjusting the photovoltaic panel PV output voltage, battery group BAT for energy storage, output side level conversion circuit 200, photovoltaic panel straight-through loop 300 and output load OUT;

[0031] The photovoltaic panel PV is electrically connected with the input end of the voltage regulating circuit 100 and the photovoltaic panel straight-through loop 300, the output end of the photovoltaic panel straight-through loop 300 is electrically connected with the output load OUT, and the output end of the voltage regulating circuit 100 is electrically connected with the battery group BAT;The input end of the output side level conversion circuit 200 is electrically connected with the battery group BAT, and the output end of the output side level conversion circuit 200 is electrically connected with the output load OUT.

[0032] The voltage regulating module includes a first MOS tube Q1, a second MOS tube Q2, a third MOS tube Q3, a first inductor L1 and a first diode D1;

[0033] The drain of the first MOS tube Q1 is electrically connected with the positive electrode of the photovoltaic panel PV, the source of the first MOS tube Q1 is electrically connected with the positive electrode of the first diode D1 through the first inductor L1, one end of the first inductor L1 is also electrically connected with the drain of the second MOS tube, the source of the second MOS tube Q2 is connected with the negative electrode of the photovoltaic panel PV, the other end of the first inductor L1 is also electrically connected with the drain of the third MOS tube, and the source of the third MOS tube Q3 is connected with the negative electrode of the photovoltaic panel PV.

[0034] The positive electrode of the battery group BAT is electrically connected with the negative electrode of the first diode D1, and the negative electrode of the battery group BAT is electrically connected with the negative electrode of the photovoltaic panel PV.

[0035] Among them, the first MOS tube Q1, the second MOS tube Q2, the first inductor L1 and the first diode D1 constitute a step-down circuit, and the third MOS tube Q3, the first inductor L1 and the first diode D1 constitute a step-up circuit.

[0036] Step-down circuit: when it is needed to reduce the photovoltaic input voltage, the first MOS tube Q1 is turned on, and the second MOS tube Q2 is turned off;At this time, the first inductor L1 stores energy, and the first diode D1 is forwardly conducted;During the off period of the first MOS tube Q1, the first inductor L1 releases energy, charges the second capacitor C2 through the first diode D1, and realizes the step-down effect.

[0037] Boost circuit: when the photovoltaic input voltage needs to be raised, the first MOS tube Q1 is turned on, the second MOS tube Q2 is turned off, and the third MOS tube Q3 is turned on; at this time, the first inductor L1 stores energy, and the first diode D1 does not participate in work; during the period when the first MOS tube Q1 is turned on, the second MOS tube Q2 is turned off, and the third MOS tube Q3 is turned off, the first inductor L1 releases energy, charges the second capacitor C2 through the first diode D1, and realizes the effect of voltage boosting.

[0038] The output side level conversion circuit 200 includes a fourth MOS tube Q4, a second diode D2, a third diode D3, and a second inductor L2.

[0039] The fourth MOS tube Q4, the second diode D2, the third diode D3, and the second inductor L2 constitute an output side voltage reduction circuit. When the output voltage needs to be further reduced, the fourth MOS tube Q4 is turned on, and the fifth MOS tube Q5 and the sixth MOS tube Q6 are turned off; at this time, the second inductor L2 stores energy, and the third diode D3 is reverse blocked. During the period when the fourth MOS tube Q4 is turned off, the second inductor L2 releases energy, charges the fourth capacitor C4 through the third diode D3, and realizes the effect of voltage reduction.

[0040] The drain electrode of the fourth MOS tube Q4 is electrically connected to the negative electrode of the first diode D1, the source electrode of the fourth MOS tube Q4 is electrically connected to the positive electrode of the third diode D3 through the second inductor L2, the negative electrode of the third diode D3 is electrically connected to the output load OUT, the positive electrode of the second diode D2 is electrically connected to the negative electrode of the battery group BAT, and the negative electrode of the second diode D2 is electrically connected to the source electrode of the fourth MOS tube Q4.

[0041] The photovoltaic panel direct loop 300 includes a fifth MOS tube Q5 and a sixth MOS tube Q6, the drain electrode of the fifth MOS tube Q5 is electrically connected to the positive electrode of the photovoltaic panel PV, the source electrode of the fifth MOS tube Q5 is electrically connected to the source electrode of the sixth MOS tube Q6, and the drain electrode of the sixth MOS tube Q6 is connected to the output load OUT.

[0042] When the voltage does not need to be adjusted, the fifth MOS tube Q5 and the sixth MOS tube Q6 are turned on at the same time, the photovoltaic panel PV is directly connected to the output load OUT, and a direct loop is formed.

[0043] It includes a first resistor R1 and a second resistor R2, one end of the first resistor R1 is electrically connected to the source electrode of the second MOS tube Q2, the other end of the first resistor R1 is electrically connected to the negative electrode of the photovoltaic panel PV, one end of the second resistor R2 is electrically connected to the second diode D2, and the other end of the second resistor R2 is electrically connected to the output load OUT.

[0044] The first resistance R1 is a sampling resistance of a photovoltaic input current, the second resistance R2 is a sampling resistance of an output current of the whole device, and the output load OUT can be a photovoltaic inverter.

[0045] The first capacitor C1 is connected in parallel across the photovoltaic panel PV, one end of the second capacitor C2 is electrically connected to the negative electrode of the second diode D2, the other end of the second capacitor C2 is electrically connected to one end of the first resistance R1, one end of the third capacitor C3 is electrically connected to the drain electrode of the fourth MOS tube Q4, the other end of the third capacitor C3 is electrically connected to the negative electrode of the battery group BAT, and the fourth capacitor C4 is connected in parallel with the output load OUT.

[0046] The input voltage of the photovoltaic panel PV is 16V-60V.

[0047] Further, low-voltage electricity is adopted for input and output, the highest voltage is 60V, and the whole device will not appear arc phenomenon, which is reliable and safe.

[0048] The utility model discloses a different MOS tube state combination, realizes the step-up and step-down regulation of photovoltaic input voltage, and can directly connect the photovoltaic panel PV with the output load OUT through a through circuit.

[0049] When the photovoltaic panel PV voltage is higher than the battery group BAT voltage, the third MOS tube Q3 is always closed, the first MOS tube Q1 and the second MOS tube Q2 adopt complementary carriers, the first MOS tube Q1 and the second MOS tube Q2 are turned on and add a dead zone, the photovoltaic panel PV voltage is greater than the battery group BAT voltage, so when the first MOS tube Q1 and the second MOS tube Q2 are alternately turned on, a broken line current that fluctuates up and down based on a certain current value will appear on the first inductor L1, the current flows through the first inductor L1, the first diode D1 and the second capacitor C2 from the photovoltaic panel PV, is filtered and reaches the battery group BAT, and the battery group BAT is charged. Figure 2 、 Figure 3 As shown in

[0050] When the photovoltaic panel PV voltage is lower than the battery group BAT voltage, the first MOS tube Q1 is always turned on, the photovoltaic panel PV charges the first inductor L1 when the third MOS tube Q3 is turned on, and the current flows through the first MOS tube Q1, the first inductor L1 and the third MOS tube Q3 from the photovoltaic panel PV. Figure 4 、 Figure 5 As shown in

[0051] When the output power is needed to generate electricity, the fourth MOS tube Q4 output can be controlled to output voltage reduction; change the duty cycle of the fourth MOS tube Q4 to realize the output power, when the fourth MOS tube Q4 is turned on, the current passes through the fourth MOS tube Q4, the second inductor L2, the third diode D3 output power, and the fourth capacitor C4 plays a filtering role. Figure 6 、 Figure 7 As shown.

[0052] When the output load OUT is greater than the photovoltaic panel PV power, the photovoltaic panel bypass loop 300 can be used to output, at this time, the fifth MOS tube Q5 and the sixth MOS tube Q6 are turned on, and the first MOS tube Q1, the second MOS tube Q2, the third MOS tube Q3 and the fourth MOS tube Q4 are closed to realize the bypass, as shown in Figure 8 .

[0053] When the battery needs to be charged, the device collects the photovoltaic input current through R1, and collects the input voltage of the photovoltaic panel PV through voltage sampling, only need to ensure that the value of the output power Pout of the output load OUT is less than the value of the input power Pin of the photovoltaic panel PV, the battery can be charged, and the charging power is Pin-Pout.

[0054] When the battery needs to be discharged, only need to ensure that the value of the output power Pout of the output load OUT is greater than the value of the input power Pin of the photovoltaic panel PV, the battery can be discharged, and the discharge power is Pout-Pin.

[0055] The above is only a specific embodiment of the present application, but the protection scope of the present application is not limited to this, any change or replacement within the technical scope disclosed by the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An optical storage topology circuit, characterized by The application relates to a photovoltaic panel, a voltage regulating circuit for regulating the output voltage of the photovoltaic panel, a battery pack for energy storage, an output side level conversion circuit, a photovoltaic panel direct loop and an output load. The photovoltaic panel is electrically connected with the voltage regulating circuit and the input end of the photovoltaic panel direct loop, the output end of the photovoltaic panel direct loop is electrically connected with the output load, the output end of the voltage regulating circuit is electrically connected with the battery pack; the input end of the output side level conversion circuit is electrically connected with the battery pack, and the output end of the output side level conversion circuit is electrically connected with the output load. The voltage regulating circuit comprises a first MOS tube, a second MOS tube, a third MOS tube, a first inductor and a first diode.

2. The optical storage topology circuit of claim 1, wherein: The drain of the first MOS tube is electrically connected with the anode of the photovoltaic panel, the source of the first MOS tube is electrically connected with the anode of the first diode through the first inductor, one end of the first inductor is also electrically connected with the drain of the second MOS tube, the source of the second MOS tube is connected with the cathode of the photovoltaic panel, the other end of the first inductor is also electrically connected with the drain of the third MOS tube, and the source of the third MOS tube is connected with the cathode of the photovoltaic panel. The anode of the battery pack is electrically connected with the cathode of the first diode, and the cathode of the battery pack is electrically connected with the cathode of the photovoltaic panel.

3. The optical storage topology circuit of claim 2, wherein: The output side level conversion circuit comprises a fourth MOS tube, a second diode, a third diode and a second inductor.

4. The optical storage topology circuit of claim 3, wherein: The drain of the fourth MOS tube is electrically connected with the cathode of the first diode, the source of the fourth MOS tube is electrically connected with the anode of the third diode through the second inductor, the cathode of the third diode is electrically connected with the output load, the anode of the second diode is electrically connected with the cathode of the battery pack, and the cathode of the second diode is electrically connected with the source of the fourth MOS tube. The photovoltaic panel direct loop comprises a fifth MOS tube and a sixth MOS tube, the drain of the fifth MOS tube is electrically connected with the anode of the photovoltaic panel, the source of the fifth MOS tube is electrically connected with the source of the sixth MOS tube, and the drain of the sixth MOS tube is connected with the output load.

5. The optical storage topology circuit of claim 1, wherein: A first resistor and a second resistor are arranged, one end of the first resistor is electrically connected with the source of the second MOS tube, the other end of the first resistor is electrically connected with the cathode of the photovoltaic panel, one end of the second resistor is electrically connected with the second diode, and the other end of the second resistor is electrically connected with the output load.

6. The optical storage topology circuit of claim 4, wherein: A first capacitor, a second capacitor, a third capacitor and a fourth capacitor are further arranged, the first capacitor is connected in parallel across the photovoltaic panel, one end of the second capacitor is electrically connected with the cathode of the second diode, the other end of the second capacitor is electrically connected with one end of the first resistor, one end of the third capacitor is electrically connected with the drain of the fourth MOS tube, the other end of the third capacitor is electrically connected with the cathode of the battery pack, and the fourth capacitor is connected in parallel with the output load.

7. The optical storage topology circuit of claim 6, wherein: The input voltage of the photovoltaic panel is 16-60V.

8. The optical storage topology circuit of any of claims 1-7, wherein: ​

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