Radar transmitter drain modulation switch circuit

Abstract

The utility model belongs to the technical field of radars. The utility model provides a radar transmitter drain electrode modulation switch circuit, which is characterized in that a first power supply input end is respectively connected with a drain end of an NMOSFET (N-channel metal oxide semiconductor field effect transistor), one end of a third capacitor and one end of a fourth capacitor, and the other end of the third capacitor and the other end of the fourth capacitor are grounded; the source end of the NMOSFET is respectively connected with one end of the second capacitor, one end of the third resistor, one end of the first capacitor, the TS pin of the gate driver and a signal output end, and the other end of the second capacitor and the other end of the third resistor are grounded; the other end of the first capacitor is connected with a cathode of the first diode and a boost pin of the gate driver, an anode of the first diode is connected with a second power input end and a power input pin of the gate driver, and a ground pin of the gate driver and one end of the second resistor are grounded. The other end of the second resistor is connected with a logic control signal input end and a signal input pin of the gate driver, and a TG pin of the gate driver is connected with a gate of the NMOSFET through the first resistor.

Description

Technical Field

[0001] This utility model belongs to the field of radar technology, specifically relating to a drain modulation switch circuit for a radar transmitter. Background Technology

[0002] In recent years, with the rapid development of radar technology, the requirements for radar transmitter power have gradually increased. Designing a highly stable and high-performance radar transmitter has become particularly important. Among these, the transmitter modulation technology is a key technology for the entire radar system, determining whether the designed radar transmitter can meet the overall system requirements and playing a decisive role in the transmitter's stability.

[0003] Gallium nitride (GaN), as a wide-bandgap semiconductor, possesses characteristics such as high breakdown field strength and high electron saturation velocity. Compared to gallium arsenide (GaAs) and silicon-based CMOS power amplifiers, GaN power amplifiers offer higher output power, higher efficiency, and better thermal characteristics. Most importantly, they can operate at high drain voltages, enabling high-power output. Currently, GaN power amplifier modulation methods typically employ... Figure 1 The gate modulation circuit shown works by converting the TTL pulse modulation signal into a gate voltage to turn the power device on and off. This circuit has the advantages of fast response speed and good driving method. However, it suffers from poor stability; rapidly changing gate voltages can cause instability in the power amplifier. It also exhibits poor noise suppression. High-power amplifiers, such as those used in radar transmitters, typically have their drain voltage directly powered by an AC / DC or DC / DC power module. To save efficiency, manufacturers often use PWM modulation, which results in large ripple in the power supply output. When the power amplifier is operating, this power supply ripple is modulated into the transmitted signal, causing significant interference to the radar. Utility Model Content

[0004] This invention addresses the problems of poor stability and poor noise suppression in the gate modulation circuit of GaN power amplifiers in the prior art by providing a drain modulation switching circuit for radar transmitters, thereby improving amplifier stability, increasing product efficiency, and solving the problem of poor noise suppression.

[0005] This utility model provides a drain modulation switch circuit for a radar transmitter, including a first power input terminal VCC_IN, a second power input terminal VDD, a logic control signal input terminal TTL_IN, a first diode D1, a first resistor R1, a second resistor R2, a third resistor R3, an NMOSFET U1, a gate driver U2, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a signal output terminal VCC_OUT.

[0006] The first power input terminal VCC_IN is connected with the drain end of NMOSFET U1, one end of the third capacitor C3 and one end of the fourth capacitor C4 respectively, the other end of the third capacitor C3 and the other end of the fourth capacitor C4 are grounded, the source end of NMOSFET U1 is connected with one end of the second capacitor C2, one end of the third resistor R3, one end of the first capacitor C1, the TS pin of the gate driver U2 and the signal output terminal VCC_OUT respectively, the other end of the second capacitor C2 and the other end of the third resistor R3 are grounded; the other end of the first capacitor C1 is connected with the cathode of the first diode D1 and the boost pin of the gate driver U2 respectively, the anode of the first diode D1 is connected with the second power input terminal VDD and the power input pin of the gate driver U2 respectively, the ground pin of the gate driver U2 and one end of the second resistor R2 are grounded, the other end of the second resistor R2 is connected with the logic control signal input terminal TTL_IN and the signal input pin of the gate driver U2 respectively, and the TG pin of the gate driver U2 is connected with the gate of NMOSFET U1 through the first resistor R1.

[0007] In one embodiment, a second diode D2 is further included, the anode of the second diode D2 is grounded, and the cathode of the second diode D2 is connected with the signal output terminal VCC_OUT.

[0008] In one embodiment, the first diode D1 is a Schottky diode.

[0009] In one embodiment, the gate driver U2 is an LTC4440ES6-5 gate driver.

[0010] In one embodiment, the input voltage range of the first power input terminal VCC_IN is 36V-60V.

[0011] In one embodiment, the input voltage range of the second power input terminal VDD is 8V-12V.

[0012] The beneficial effects of the utility model lie in: the power amplifier of GaN is extremely sensitive to gate voltage, the gate voltage will exist all the time by using the drain modulation switch circuit of the utility model, and the stability of the amplifier is greatly improved. Meanwhile, due to the drain modulation, the power amplifier power supply is closed in the time of not working, the efficiency of the product is greatly improved, and the stability of the power amplifier is improved. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 The utility model discloses background art gate modulation circuit schematic diagram.

[0014] Figure 2 The utility model discloses radar transmitter drain modulation switch circuit diagram in an embodiment.

[0015] Figure 3 The specific application connection diagram of the radar transmitter drain modulation switch circuit in this embodiment of the utility model.

[0016] Wherein, VCC_IN is the first power input terminal, VDD is the second power input terminal, TTL_IN is the logic control signal input terminal, D1 is the first diode, D2 is the second diode, R1 is the first resistor, R2 is the second resistor, R3 is the third resistor, U1 is the NMOSFET, U2 is the gate driver, C1 is the first capacitor, C2 is the second capacitor, C3 is the third capacitor, C4 is the fourth capacitor, and VCC_OUT is the signal output terminal. Detailed Implementation

[0017] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0018] Example

[0019] To address the issues of poor stability and clutter suppression in existing GaN power amplifier gate modulation circuits, this paper innovatively proposes a radar transmitter drain modulation switching circuit for modulating GaN power amplifiers, such as... Figure 2 As shown in the diagram, the circuit works by converting the TTL pulse modulation signal into a high-voltage drive signal, which controls the drain voltage to turn on and off, thereby enabling the power amplifier to operate and shut down. This circuit offers advantages such as high reliability, good temperature adaptability, strong anti-interference capability, and high efficiency. GaN power amplifiers are extremely sensitive to gate voltage; using the drain modulation circuit in this example, the gate voltage remains constant, significantly improving the amplifier's stability. Furthermore, due to drain modulation, the power amplifier remains off during periods when the power supply is not in operation, greatly enhancing the product's efficiency.

[0020] Specifically, the drain modulation switching circuit of the radar transmitter, such as Figure 3 As shown, it includes a first power input terminal VCC_IN, a second power input terminal VDD, a logic control signal input terminal TTL_IN, a first diode D1, a second diode D2, a first resistor R1, a second resistor R2, a third resistor R3, an NMOSFET U1, a gate driver U2, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a signal output terminal VCC_OUT.

[0021] The first power input end VCC_IN is connected with the drain end of the NMOSFET U1, one end of the third capacitor C3 and one end of the fourth capacitor C4 respectively, the other end of the third capacitor C3 and the other end of the fourth capacitor C4 are grounded, the source end of the NMOSFET U1 is connected with one end of the second capacitor C2, one end of the third resistor R3, one end of the first capacitor C1, the TS pin of the gate drive U2 and the signal output end VCC_OUT respectively, the other end of the second capacitor C2 and the other end of the third resistor R3 are grounded; the other end of the first capacitor C1 is connected with the cathode of the first diode D1 and the boost pin of the gate drive U2 respectively, the anode of the first diode D1 is connected with the second power input end VDD and the power input pin of the gate drive U2 respectively, the ground pin of the gate drive U2 and one end of the second resistor R2 are grounded, the other end of the second resistor R2 is connected with the logic control signal input end TTL_IN and the signal input pin of the gate drive U2 respectively, the TG pin of the gate drive U2 is connected with the gate of the NMOSFET U1 through the first resistor R1, the anode of the second diode D2 is grounded, and the cathode of the second diode D2 is connected with the signal output end VCC_OUT. The gate drive U2 is an existing LTC4440ES6-5 high-speed, high-voltage and high-end gate drive.

[0022] The working principle is as follows: the gate drive U2, the first diode D1 and the first capacitor C1 constitute a bootstrap circuit to generate a high-side gate drive voltage required by the NMOSFET. VDD is connected with the 1 pin of the gate drive U2, that is, the power input pin, to supply power to the gate drive U2, and is connected with the 6 pin BOOST pin of the gate drive U2 through the Schottky diode D1 and charges the bootstrap capacitor, that is, the first capacitor C1. At this time, the voltage of the 6 pin of the gate drive U2 is VDD-0.7V, which is the voltage drop of the Schottky diode.

[0023] The logic control signal input end TTL_IN is connected with the second resistor R2 to the ground and then connected with the 3 pin, that is, the signal input pin IN+ of U2. After the 3 pin of U2 receives the high-level signal of the logic control signal input end TTL_IN, an NMOSEFET gate drive signal Vg equal to the voltage of the 6 pin is generated at the 5 pin, that is, the TG pin, and the voltage of the NMOSEFET gate drive signal Vg is VDD-0.7V. The NMOSEFET gate drive signal Vg is connected with the gate of the NMOSEFET through the first resistor R1.

[0024] U1 source S connected together while connecting the second diode D2, the second capacitor C2 to the ground while connecting to the first capacitor C1. The first power input VCC_IN connection energy storage capacitor third capacitor C3, fourth capacitor C4 to the ground and then connected to the drain. U1 when the first power input VCC_IN charging third capacitor C3, fourth capacitor C4, the voltage on the third capacitor C3, fourth capacitor C4 equal to VCC_IN; U1 when the conduction, by energy storage capacitor third capacitor C3, fourth capacitor C4 to provide energy to the load.

[0025] When the gate of U1 receives the drive signal Vg, U1 conduction this time VCC_IN = VCC_OUT. Due to the bootstrap capacitor C1, the voltage of U2 6 pin is VCC_OUT + VDD - 0.7V at this time, so the gate drive signal Vg generated by U2 5 is also VCC_OUT + VDD - 0.7V. At this time, the voltage between the gate and source of U1 is still maintained at VDD - 0.7V, U1 continues to maintain conduction. When the received TTL_IN is low, the gate drive signal Vg of U2 6 pin is low, U1 is not conductive, VCC_OUT at this time is pulled low by the load. When the state of TTL_IN changes at a certain frequency, VCC_OUT becomes the same as the input frequency of the drain pulse modulation signal.

[0026] In summary, the drain modulation circuit in this example uses an energy storage capacitor. The power module charges the energy storage capacitor during the non-working period of the radar transmitter. During the working period of the radar transmitter, the energy storage capacitor provides energy to the transmitter. There is no power supply ripple. The problem of poor clutter suppression is solved. Thus, the power device can work stably, the failure rate of the device is reduced, the reliability of the product is greatly increased, and the cost performance of the product is directly improved.

[0027] Further, in the production of MOSFET tubes, due to the process level, there will be a parasitic capacitor between the source S and the drain D. Due to the existence of the parasitic capacitor, there will be a negative overshoot voltage at the signal output VCC_OUT. This negative voltage is beneficial to the operation of the circuit, but long-term operation will cause damage to the device and greatly reduce the reliability of the product. In order to solve this problem, a reverse connected diode is added to the signal output VCC_OUT to absorb this negative voltage. The anode of the second diode D2 is connected to the ground and the cathode is connected to VCC_OUT. When there is a negative voltage at the output, the second diode D2 is conductive, and the negative voltage is discharged to the ground, effectively protecting the circuit and increasing the reliability of the product.

[0028] Among them, the input voltage range of the first power input VCC_IN is 36V-60V. The input voltage range of the second power input VDD is 8V-12V. The voltage range of this example is wide, the adaptability is strong, the circuit debugging amount is small, and it can be used as a general circuit. It can greatly improve the design and production efficiency.

[0029] Any combination of the technical features in the above embodiments can be made. For the sake of brevity, the foregoing description has not described all possible combinations of the technical features in the above embodiments, however, as long as the combination of the technical features does not contradict, it should be considered within the scope of the present disclosure.

[0030] The above embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope of the present application. It should be pointed out that, for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the patent protection scope of the present application should be subject to the appended claims.

Claims

1. A radar transmitter drain modulated switch circuit, characterized by The first power input end (VCC_IN), the second power input end (VDD), the logic control signal input end (TTL_IN), the first diode (D1), the first resistor (R1), the second resistor (R2), the third resistor (R3), the NMOSFET (U1), the gate driver (U2), the first capacitor (C1), the second capacitor (C2), the third capacitor (C3), the fourth capacitor (C4), and the signal output end (VCC_OUT) are included. The first power input end (VCC_IN) is connected with the drain end of the NMOSFET (U1), one end of the third capacitor (C3), and one end of the fourth capacitor (C4) respectively, the other end of the third capacitor (C3) and the other end of the fourth capacitor (C4) are grounded, the source end of the NMOSFET (U1) is connected with one end of the second capacitor (C2), one end of the third resistor (R3), one end of the first capacitor (C1), the TS pin of the gate driver (U2), and the signal output end (VCC_OUT) respectively, the other end of the second capacitor (C2) and the other end of the third resistor (R3) are grounded, the other end of the first capacitor (C1) is connected with the cathode of the first diode (D1) and the boost pin of the gate driver (U2) respectively, the anode of the first diode (D1) is connected with the second power input end (VDD) and the power input pin of the gate driver (U2) respectively, the ground pin of the gate driver (U2) and one end of the second resistor (R2) are grounded, the other end of the second resistor (R2) is connected with the logic control signal input end (TTL_IN) and the signal input pin of the gate driver (U2) respectively, and the TG pin of the gate driver (U2) is connected with the gate of the NMOSFET (U1) through the first resistor (R1).

2. A radar transmitter drain modulated switching circuit according to claim 1, characterized in that, The anode of the second diode (D2) is grounded, and the cathode of the second diode (D2) is connected with the signal output end (VCC_OUT).

3. A radar transmitter drain modulated switching circuit according to claim 2, characterized in that, The first diode (D1) is a Schottky diode.

4. A radar transmitter drain modulated switching circuit according to claim 3, characterized in that, The gate driver (U2) is an LTC4440ES6-5 gate driver.

5. A radar transmitter drain modulated switching circuit according to claim 4, characterised in that, The input voltage range of the first power input end (VCC_IN) is 36V-60V.

6. A radar transmitter drain modulated switching circuit according to claim 4, wherein, The input voltage range of the second power input end (VDD) is 8V-12V.

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