Printed circuit board and electronic equipment
By designing center-aligned via combinations with the same aperture on the printed circuit board, the problem of routing space utilization is solved, enabling efficient connection of multiple network attributes and reducing routing space requirements.
Patent Information
- Application Number
- CN202520278650.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-20
- Publication Date
- 2025-12-26
- Estimated Expiration
- 2035-02-20
AI Technical Summary
How to efficiently utilize wiring space on printed circuit boards to integrate multiple modular circuits, especially hybrid designs of digital and analog circuits.
By designing multiple vias with center alignment and the same aperture on the printed circuit board, and partially overlapping adjacent vias to connect networks with different properties, additional pads can be avoided.
It enables the efficient connection of multiple networks with different properties without increasing cabling space, thus reducing cabling space requirements.
Smart Images
Figure CN223730002U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of PCB design, and particularly relates to a printed circuit board and an electronic device. BACKGROUND
[0002] With the increasing integration of functions in various electronic product designs, there are more and more designs of integrating baseband, radio frequency, audio, power management and other module circuits on a printed circuit board (PCB). Among these module circuits, most of the baseband circuits are digital circuits, and the radio frequency, audio, power management and other circuits mostly involve analog circuits. Therefore, how to utilize the wiring space of the PCB is a problem to be solved in the field. CONTENT
[0003] The present disclosure provides a printed circuit board and an electronic device to solve the problems in the prior art.
[0004] In a first aspect, an embodiment of the present disclosure provides a printed circuit board, comprising:
[0005] a board body, the board body being provided with at least one via combination, the via combination comprising a plurality of vias; in the same via combination, each via connects a network of different attributes, the centers of each via are aligned, and the diameters of each via are the same, at least part of two adjacent vias overlap, so that the attributes of the networks connected by the two vias are connected.
[0006] Optionally, the board body comprises a plurality of board layers; in the same via combination, the two adjacent vias both penetrate through a plurality of board layers, and at least part of the two vias penetrate through at least one board layer, so that at least part of the two vias overlap.
[0007] Optionally, the network of different attributes comprises a first attribute network and a second attribute network.
[0008] One of the via combinations comprises a first via and a second via, the first via connects the first attribute network, and the second via connects the second attribute network.
[0009] The centers of the first via and the second via are aligned, and the diameters of the first via and the second via are the same, at least part of the first via and the second via overlap, so that the first attribute network and the second attribute network are connected.
[0010] Optionally, the first attribute network is a single-point grounding network, and the second attribute network is a main grounding network.
[0011] Optionally, the board body comprises a plurality of board layers, and the plurality of board layers comprises a main grounding layer.
[0012] The first via and the second via both penetrate multiple board layers, and the first via and the second via jointly penetrate at least one board layer so that at least part of the two overlaps; the board layers penetrated by the first via are provided with elements requiring single-point grounding, and the second via connects the main ground layer.
[0013] Optionally, the number of board layers jointly penetrated by the first via and the second via is one.
[0014] Optionally, the number of board layers penetrated by the first via is less than the number of board layers penetrated by the second via.
[0015] Optionally, the number of board layers penetrated by the first via is two, and the number of board layers penetrated by the second via is five.
[0016] Optionally, the via is a through hole, a blind hole, or a buried hole.
[0017] In a second aspect, the embodiments of the present disclosure provide an electronic device comprising the printed circuit board as described in the first aspect.
[0018] The technical solutions provided by the embodiments of the present disclosure can include the following beneficial effects:
[0019] As can be seen from the above embodiments, the printed circuit board of the present disclosure combines a plurality of vias with the same aperture and central alignment, and at least partially overlaps adjacent two vias, so that the adjacent two vias can be regarded as one via during production, and the network properties of the two vias are connected through the overlapping part after production. In this way, one via combination can be given different network properties without additional pads, thereby reducing the wiring space.
[0020] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS
[0021] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the specification, serve to explain the principles of the present disclosure.
[0022] Figure 1 is a structural schematic diagram of a printed circuit board according to an exemplary embodiment. DETAILED DESCRIPTION
[0023] The technical solutions in the embodiments (or "embodiments") of the present application will be described clearly and completely in conjunction with the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated.
[0024] If the application embodiments involve terms of direction indication or positional relationship (for example, up, down, left, right, front, back, inner, outer, top, bottom, center, vertical, horizontal, longitudinal, transverse, length, width, counterclockwise, clockwise, axial, radial, circumferential, etc.), such terms are only used to explain the relative positional relationship, motion condition, etc. between components in a certain specific posture (as shown in the drawings); if the specific posture changes, the direction indication or positional relationship will also change accordingly. In addition, the terms "first", "second", etc. in the application embodiments are only used for convenience of description, and cannot be understood as indicating or implying relative importance.
[0025] In order to facilitate understanding of the technical solutions of the present disclosure, the printed circuit board and the electronic device of the present disclosure are described in detail below in combination with the drawings. The features in the following embodiments and implementation manners can be combined with each other without conflict.
[0026] Referring to Figure 1 As shown in the drawings, the present disclosure provides a printed circuit board (PCB) 100, comprising: a board body 100, the board body 100 is provided with at least one via combination 10, the via combination 10 comprises a plurality of vias (metallized holes) 11 (such as Figure 1 As shown on the left side of the middle). In the same via combination 10, each of the vias 11 connects networks of different attributes, the centers of each of the vias 11 are aligned, and the diameters of each of the vias 11 are the same, at least part of two adjacent vias 11 overlap, so that the network attributes connected by the two vias 11 are connected.
[0027] As can be seen from the above embodiments, the printed circuit board of the present disclosure, a via combination 10 is provided with a plurality of vias 11 with aligned centers and the same diameters, and at least part of two adjacent vias 11 overlap, so that the two adjacent holes can be regarded as one via during production and manufacturing, and after manufacturing, the network attributes of the two vias 11 are connected through the overlapping part. In this way, one via combination is split into a plurality of equal-sized and aligned vias, that is, through via splitting, different network attributes can be respectively assigned to a plurality of vias of the same via combination in the design, achieving the design of connecting a plurality of networks with different attributes together, without the need for additional solder pads, thereby reducing the wiring space.
[0028] In some optional implementation manners, the board body 100 comprises a plurality of board layers 20. In the same via combination 10, two adjacent vias 11 each penetrate a plurality of board layers 20, and jointly penetrate at least one board layer 20, so that at least part of the two vias overlap, achieving the connection of the different network attributes connected by the two vias.
[0029] In some optional embodiments, the networks with different attributes include a first attribute network and a second attribute network, with the first via 111 connected to the first attribute network and the second via 112 connected to the second attribute network. Optionally, the first attribute network is a single-point grounding network, and the second attribute network is a main grounding network. It should be noted that the number of vias and the number and type of networks with different attributes in a via combination are not limited to the two mentioned above. Depending on the usage scenario, it can be divided into multiple concentric circular vias of equal size, so that multiple networks achieve the effect of single-point connection. This disclosure does not impose any limitations on this.
[0030] One of the via combinations 10 (e.g.) Figure 1 (As shown on the right) includes a first via 111 and a second via 112. The first via 111 and the second via 112 are center-aligned and have the same diameter. At least part of the first via 111 and the second via 112 overlap to connect the first attribute network and the second attribute network. It should be noted that the network assigned to the split vias is not limited to a single-point ground network and a main ground network; it can also be any two networks. Through different usage scenarios, a design can be achieved to connect two networks with different attributes at a single point.
[0031] In some optional embodiments, the plate 100 includes multiple layers 20, each including a main ground layer, which are connected to form a main ground network as needed. In this embodiment, the plate 20 is exemplified by ten layers (L1-L10).
[0032] Both the first via 111 and the second via 112 penetrate multiple layers 20, and both via 111 and the second via 112 jointly penetrate at least one layer 20, so that they at least partially overlap, thereby connecting the first attribute network and the second attribute network. The layer 20 penetrated by the first via 111 can be understood as a signal layer, which contains components requiring single-point grounding. These components are connected according to actual needs to form a single-point grounding network. The second via 112 connects to the main ground layer. Optionally, the main ground layer is located in the multilayer of layers penetrated by the second via 112, away from the first via 111. In this embodiment, the main ground layer is the eighth layer (L8) from top to bottom.
[0033] Optionally, the number of board layers 20 through which the first via 111 penetrates is less than the number of board layers 20 through which the second via 112 penetrates. In the present embodiment, the number of board layers 20 through which the first via 111 penetrates is two, which are the third and fourth layers from top to bottom (L3-L4). The number of board layers 20 through which the second via 112 penetrates is five, which are the fourth to eighth layers from top to bottom (L4-L8). It can be understood that the number of board layers 20 through which the first via 111 and the second via 112 jointly penetrate is one, which is the fourth layer from top to bottom (L4).
[0034] In this way, by means of via splitting, the via layer of the first via 111 is connected to the single-point grounding network, the via layer of the second via 112 is connected to the main grounding network, and the first via 111 and the second via 112 overlap each other at the fourth layer. Since the first via 111 and the second via 112 are centrally aligned and have the same aperture, they can be regarded as one via during production. After production, the fourth layer connects the network properties connected by the first via 111 and the second via 112, that is, connects the single-point grounding network and the main grounding network, thereby achieving the best effect of single-point grounding. This design method not only achieves single-point main grounding, but also connects other layers to the main grounding, thereby ensuring the grounding effect of other layers of the PCB and achieving the function of a single-point grounding via and a common grounding via in one. Moreover, the layer splitting of the via is achieved without the need for additional pads, thereby reducing the wiring space.
[0035] In some optional embodiments, the via 11 can be a through-hole, a blind hole, or a buried hole. In the present embodiment, the first via 111 and the second via 112 are both buried holes. It should be noted that the via splitting method of the present disclosure is not limited to buried hole splitting, but can also be blind hole splitting or through-hole splitting design.
[0036] The present disclosure also provides an electronic device comprising the printed circuit board as described in the above embodiments and embodiments. The electronic device can be a mobile phone, a tablet computer, or the like.
[0037] The electronic device of the present disclosure comprises a plurality of vias 11 that are centrally aligned and have the same aperture in one via combination 10 of the printed circuit board, and at least partially overlap each other. In this way, the two adjacent vias 11 can be regarded as one via during production. After production, the network properties of the two vias 11 are connected through the overlapping part. In this way, one via combination is split into a plurality of vias that are centrally aligned and have the same size. That is, by means of via splitting, different network properties can be assigned to the plurality of vias in the same via combination in the design, thereby connecting a plurality of networks with different properties together without the need for additional pads, thereby reducing the wiring space.
[0038] It should be noted that the technical solutions or technical features described in the above embodiments can be combined or supplemented with each other without conflict. The scope of protection of the present application is not limited to the precise structures described in the above embodiments and shown in the drawings; any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the scope of protection of the present application.
Claims
1. A printed circuit board, characterized by The printed circuit board comprises: a board body provided with at least one via hole combination, the via hole combination comprising a plurality of via holes; in the same via hole combination, each of the via holes is connected to a network of different attribute, the centers of each of the via holes are aligned, the aperture diameters of each of the via holes are the same, and at least part of two adjacent via holes overlap, so that the attributes of the networks connected by the two via holes are connected.
2. Printed circuit board according to claim 1, characterized in that The board body comprises a plurality of board layers; in the same via hole combination, each of the two adjacent via holes penetrates a plurality of the board layers, and at least part of the two via holes penetrates at least one of the board layers.
3. Printed circuit board according to claim 1 or 2, characterized in that The networks of different attributes comprise a first attribute network and a second attribute network. One of the via hole combinations comprises a first via hole and a second via hole, the first via hole is connected to the first attribute network, and the second via hole is connected to the second attribute network. The centers of the first via hole and the second via hole are aligned, the aperture diameters of the first via hole and the second via hole are the same, and at least part of the first via hole and the second via hole overlap, so that the first attribute network and the second attribute network are connected.
4. Printed circuit board according to claim 3, characterized in that The first attribute network is a single-point grounding network, and the second attribute network is a main grounding network.
5. Printed circuit board according to claim 4, characterized in that The board body comprises a plurality of board layers, and the plurality of board layers comprises a main grounding layer. The first via hole and the second via hole both penetrate a plurality of the board layers, and the first via hole and the second via hole both penetrate at least one of the board layers, so that at least part of the first via hole and the second via hole overlap. The board layer penetrated by the first via hole is provided with an element requiring single-point grounding, and the second via hole is connected to the main grounding layer.
6. Printed circuit board according to claim 5, characterized in that The number of board layers penetrated by the first via hole and the second via hole is one.
7. The printed circuit board of claim 5, wherein, The number of board layers penetrated by the first via hole is less than the number of board layers penetrated by the second via hole.
8. Printed circuit board according to claim 7, characterized in that The number of board layers penetrated by the first via hole is two, and the number of board layers penetrated by the second via hole is five.
9. The printed circuit board of claim 1, wherein, The via hole is a through hole, a blind hole, or a buried hole.
10. An electronic device, comprising: The printed circuit board comprises any one of claims 1-9.