Data exchange terminal device

Abstract

The utility model relates to the technical field of exchange terminals, in particular to a data exchange terminal device, a data transmission circuit comprises a voltage stabilizing circuit used for providing stable voltage for the data transmission circuit, and the voltage stabilizing circuit comprises a first resistor assembly, a capacitor C5, a crystal tube assembly, a modem EH and a power supply E; when the resistance value of the variable resistor RP is increased, the charging speed of the capacitor C5 is slowed down, the conduction angle of the thyristor VT is reduced, and the output power is reduced; otherwise, the resistance value of the variable resistor RP is reduced, the charging speed of the capacitor C5 is increased, the conduction angle of the thyristor VT is increased, and the output power is increased; when the thyristor VT is conducted, the alternating current power supply supplies power to the modem EH through the thyristor V, and the modem EH starts to work; when the thyristor VT is turned off, the modem EH stops working, the modem EH can be maintained to be in a stable working voltage within an alternating current period by adjusting the conduction angle of the thyristor VT, and accurate transmission of data is ensured.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of exchange terminal, especially data exchange terminal device. BACKGROUND

[0002] The data exchange terminal device is used for realizing the exchange and transmission of data between different devices, networks or systems. The data center is a centralized storage and processing place of massive data, and the data exchange terminal is the network backbone of the data center, which ensures the high-speed and reliable exchange of data between servers, between servers and storage devices, and between the data center and external networks, and supports cloud computing, big data analysis and other businesses. The technical field of the data exchange terminal device covers multiple fields such as communication technology, network protocol, signal processing, interface standard, device integration, security technology, remote monitoring and the like.

[0003] When the data exchange terminal transmits data, it is easily affected by the voltage in the circuit. If the voltage in the circuit cannot be maintained within a predetermined range, the data will not be accurately transmitted. UTILITY MODEL CONTENT

[0004] The main purpose of the utility model is to provide a data exchange terminal device to solve the problem that the voltage cannot be maintained within a predetermined range and the data cannot be accurately transmitted in the related art.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the utility model, a data exchange terminal device is provided, comprising: a data transmission circuit, the data transmission circuit comprises a voltage stabilizing circuit for providing stable voltage for the data transmission circuit, the voltage stabilizing circuit comprises a first resistance component, a capacitor C5, a transistor component, a modem EH and a power supply E, the first resistance component comprises a variable resistance RP, a fixed resistance R1 and a fixed resistance R2, the transistor component comprises a single-junction transistor VU and a thyristor VT, the anode of the thyristor VT is connected with the RS232 interface of the modem EH, the gate of the thyristor VT is connected with the cathode of the single-junction transistor VU and the fixed resistance R1, the anode of the single-junction transistor VU is connected with the positive electrode of the power supply E through the fixed resistance R2, the gate of the single-junction transistor VU is connected with the fixed end of the variable resistance RP and the positive electrode side of the capacitor C5, the negative electrode side of the capacitor C5 is connected with the fixed resistance R1, the fixed resistance R1 is grounded, and the adjustable end of the variable resistance RP is connected with the positive electrode of the power supply E.

[0006] Further, the data transmission circuit further comprises a chip CON1, a second resistance component and a capacitor component, the second resistance component comprises a resistance R3 and a resistance R4, and the capacitor component comprises a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4.

[0007] Further, the chip CON1 has two +VBUS_TYPEC interfaces, one of which is connected with the cathode of the thyristor VT, and the other of which is connected with the V.35 interface of the modem EH.

[0008] Further, the chip CON1 has several GND interfaces, which are all grounded.

[0009] Further, the capacitor C1 is connected between the SSTXp1 interface and the Txp1 interface of the chip CON1, the capacitor C2 is connected between the SSTXn1 interface and the TXN1 interface of the chip CON1, the capacitor C3 is connected between the SSTXp2 interface and the Txp2 interface of the chip CON1, and the capacitor C4 is connected between the SSTXn2 interface and the TXN2 interface of the chip CON1.

[0010] Further, one end of the resistor R3 is connected with the CC1 interface of the chip CON1, and the other end is grounded, and one end of the resistor R4 is connected with the CC2 interface of the chip CON1, and the other end is grounded.

[0011] Compared with the prior art, the utility model has the following beneficial effects: when the resistance of the variable resistor RP increases, the charging speed of the capacitor C5 slows down, the trigger pulse frequency reduces, the conduction angle of the thyristor VT reduces, and the output power reduces; on the contrary, the resistance of the variable resistor RP reduces, the charging speed of the capacitor C5 speeds up, the trigger pulse frequency rises, the conduction angle of the thyristor VT increases, and the output power increases; when the thyristor VT is turned on, the alternating current power supplies the modem EH through the thyristor VT, and the modem EH starts to work; when the thyristor VT is turned off, the modem EH stops working, the conduction angle of the thyristor VT is adjusted, the modem EH can be maintained under a stable working voltage in an alternating current period, and the accurate transmission of data is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 It is a data transmission circuit diagram of the utility model;

[0013] Figure 2 It is a voltage stabilizing circuit diagram of the utility model. DETAILED DESCRIPTION

[0014] In order to further illustrate the technical means and effects adopted by the utility model to achieve the predetermined utility model purposes, the specific embodiments, structures, features and effects of the utility model are described in detail below in combination with the drawings and preferred embodiments.

[0015] Please refer to Figure 1 and Figure 2The embodiment provides a data exchange terminal device, which comprises a data transmission circuit, wherein the data transmission circuit comprises a voltage stabilizing circuit for providing stable voltage for the data transmission circuit; the voltage stabilizing circuit comprises a first resistor assembly, a capacitor C5, a transistor assembly, a modem EH and a power supply E; the first resistor assembly comprises a variable resistor RP, a fixed resistor R1 and a fixed resistor R2; the transistor assembly comprises a single-junction transistor VU and a thyristor VT; the anode of the thyristor VT is connected with an RS232 interface of the modem EH; the gate of the thyristor VT is connected with the fixed resistor R1 and the cathode of the single-junction transistor VU; the anode of the single-junction transistor VU is connected with the positive pole of the power supply E through the fixed resistor R2; the gate of the single-junction transistor VU is connected with the fixed end of the variable resistor RP and the positive pole side of the capacitor C5; the negative pole side of the capacitor C5 is connected with the fixed resistor R1; the fixed resistor R1 is grounded; and the adjustable end of the variable resistor RP is connected with the positive pole of the power supply E.

[0016] Further, the data transmission circuit further comprises a chip CON1, a second resistor assembly and a capacitor assembly; the second resistor assembly comprises a resistor R3 and a resistor R4; and the capacitor assembly comprises a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4.

[0017] Further, the chip CON1 has two +VBUS_TYPEC interfaces, one of which is connected with the cathode of the thyristor VT, and the other of which is connected with a V.35 interface of the modem EH.

[0018] Further, the chip CON1 has a plurality of GND interfaces, which are all grounded.

[0019] Further, the capacitor C1 is connected between an SSTXp1 interface and a TXP1 interface of the chip CON1; the capacitor C2 is connected between an SSTXn1 interface and a TXN1 interface of the chip CON1; the capacitor C3 is connected between an SSTXp2 interface and a TXP2 interface of the chip CON1; and the capacitor C4 is connected between an SSTXn2 interface and a TXN2 interface of the chip CON1.

[0020] Further, one end of the resistor R3 is connected with a CC1 interface of the chip CON1, and the other end is grounded; and one end of the resistor R4 is connected with a CC2 interface of the chip CON1, and the other end is grounded.

[0021] The two +VBUS_TYPEC interfaces of the chip CON1 are respectively connected with the positive and negative poles of the external power supply to provide power for the data transmission circuit, and the chip CON1 further includes RXP1, RXP2, RXN1 and RXN2 interfaces, TXP and TXN are a pair of sending differential signals, and RXP and RXN are a pair of receiving differential signals TXP1 and TXN1, RXP1 and RXN1 constitute a group of high-speed data transmission channels, TXP2 and TXN2, RXP2 and RXN2 constitute another group of high-speed data transmission channels, full-duplex data communication is realized, the data transmission rate is greatly improved, the differential signal transmission mode can effectively reduce electromagnetic interference (EMI) and improve the integrity and transmission distance of the signal. In the sending end, the transmitter encodes the data into a differential signal and transmits it through the TXP and TXN lines; in the receiving end, the receiver decodes the data by comparing the voltage difference between the TXP and TXN lines. This mode has higher anti-interference ability and lower bit error rate than single-ended signal transmission; a plurality of GND pins are used to provide a reference potential for the data transmission circuit to ensure the normal operation of the data transmission circuit, and good grounding can reduce electromagnetic interference and improve the stability and reliability of the data transmission circuit.

[0022] The capacitor C5 and the variable resistor RP constitute a charging circuit, the capacitor C5 is charged to a certain voltage and then discharged through the unijunction transistor VU to generate a trigger pulse, during the charging process of the capacitor C5, the voltage across the capacitor C5 gradually increases, when the voltage reaches the peak voltage of the unijunction transistor VU, the unijunction transistor VU is turned on, the capacitor C5 is rapidly discharged through the gate and cathode of the unijunction transistor VU and the fixed resistor R1, a sharp pulse is generated on the fixed resistor R1, the sharp pulse is used as a trigger signal to the gate of the thyristor VT to turn on the thyristor; during the operation of the unijunction transistor VU, the current cannot be too large, otherwise the device will be damaged, the fixed resistor R2 and the voltage of the power supply and the gate characteristic of the unijunction transistor VU jointly determine the size of the gate current, which plays a role in protecting the unijunction transistor VU; the variable resistor RP is used to adjust the charging speed of the capacitor C5, so as to change the trigger delay angle of the thyristor VT, and then control the on-time of the thyristor VT and the output power, by changing the resistance value of the variable resistor RP, the time for the capacitor C5 to charge to the peak voltage of the unijunction transistor VU can be changed, and then the frequency and phase of the trigger pulse are affected, when the resistance value of the variable resistor RP increases, the charging speed of the capacitor C5 slows down, the frequency of the trigger pulse decreases, the on-time of the thyristor VT decreases, and the output power decreases; on the contrary, when the resistance value of the variable resistor RP decreases, the charging speed of the capacitor C5 increases, the frequency of the trigger pulse increases, the on-time of the thyristor VT increases, and the output power increases; when the thyristor VT is turned on, the AC power supply supplies power to the modem EH through the thyristor VT, and the modem EH starts to work; when the thyristor VT is turned off, the modem EH stops working, by adjusting the on-time of the thyristor VT, the modem EH can be maintained at a stable working voltage within an AC period, and the accurate transmission of data is ensured.

[0023] The above is only a preferred embodiment of the present application, and does not limit the present application in any form. Although the preferred embodiment of the present application has been disclosed as above, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to the above disclosed technical content without departing from the technical solution of the present application, and any equivalent embodiments with equivalent changes and modifications are still within the scope of the technical solution of the present application.

Claims

1. A data exchange terminal device, characterized by The application relates to a data transmission circuit, which comprises a voltage stabilizing circuit for providing stable voltage for the data transmission circuit, wherein the voltage stabilizing circuit comprises a first resistance component, a capacitor C5, a transistor component, a modem EH and a power supply E, the first resistance component comprises a variable resistance RP, a fixed resistance R1 and a fixed resistance R2, the transistor component comprises a single-junction transistor VU and a thyristor VT, the anode of the thyristor VT is connected with the RS232 interface of the modem EH, the gate of the thyristor VT is connected with the fixed resistance R1 and the cathode of the single-junction transistor VU, the anode of the single-junction transistor VU is connected with the positive pole of the power supply E through the fixed resistance R2, the gate of the single-junction transistor VU is connected with the fixed end of the variable resistance RP and the positive pole side of the capacitor C5, the negative pole side of the capacitor C5 is connected with the fixed resistance R1, the fixed resistance R1 is grounded, and the adjustable end of the variable resistance RP is connected with the positive pole of the power supply E. The data transmission circuit further comprises a chip CON1, a second resistance component and a capacitor component, the second resistance component comprises a resistance R3 and a resistance R4, and the capacitor component comprises a capacitor C1, a capacitor C2, a capacitor C3 and a capacitor C4.

2. The data exchange terminal device according to claim 1, characterized by The chip CON1 has two +VBUS_TYPEC interfaces, one of which is connected with the cathode of the thyristor VT, and the other of which is connected with the V.35 interface of the modem EH.

3. The data exchange terminal device according to claim 2, characterized in that, The chip CON1 has several GND interfaces, which are all grounded.

4. The data exchange terminal device according to claim 2, characterized by The capacitor C1 is connected between the SSTXp1 interface and the Txp1 interface of the chip CON1, the capacitor C2 is connected between the SSTXn1 interface and the TXN1 interface of the chip CON1, the capacitor C3 is connected between the SSTXp2 interface and the Txp2 interface of the chip CON1, and the capacitor C4 is connected between the SSTXn2 interface and the TXN2 interface of the chip CON1.

5. The data exchange terminal device according to claim 2, characterized by One end of the resistance R3 is connected with the CCl interface of the chip CON1, and the other end is grounded, and one end of the resistance R4 is connected with the CC2 interface of the chip CON1, and the other end is grounded.

6. The data exchange terminal device according to claim 5, characterized by ​

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