Power supply time sequence control circuit of gallium nitride power amplifier tube
By designing a power supply timing control circuit, the power supply timing problem of depletion-mode gallium nitride transistors under radio frequency conditions was solved, realizing safe power supply and normal operation of the transistors and meeting the power supply requirements of different models.
Patent Information
- Application Number
- CN202520275240.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-20
- Publication Date
- 2026-01-06
- Estimated Expiration
- 2035-02-20
AI Technical Summary
Under radio frequency conditions, the lack of power supply timing control in depletion-mode gallium nitride transistors can lead to large currents during startup that may damage the transistor and circuitry, preventing them from fully utilizing their excellent characteristics and ensuring power supply timing and gate negative bias.
Design a power supply timing control circuit for a gallium nitride power amplifier tube, including a drain power supply delay circuit, a negative voltage generation circuit, and a filter circuit. The hardware circuit realizes the power supply timing control of the depletion-mode gallium nitride power amplifier tube, ensuring reasonable timing of the gate and drain voltages and negative voltage bias.
It realizes the power supply timing control of depletion-mode gallium nitride power amplifier tubes, prevents damage from drain-source maximum current, ensures normal operation, has a simple structure, is easy to implement, and is applicable to different models of gallium nitride power amplifier tubes.
Smart Images
Figure CN223772026U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of shortwave and ultra-shortwave radio frequency power amplifiers, and in particular to a power supply timing control circuit for a gallium nitride power amplifier tube. Background Technology
[0002] The properties of semiconductor materials have a significant impact on the performance of semiconductor devices. Silicon power semiconductor devices are rapidly approaching their theoretical performance limits. Third-generation wide-bandgap semiconductors, represented by gallium nitride (GaN) and silicon carbide (SiN), offer superior performance compared to silicon. In particular, gallium nitride transistors can meet the requirements of high energy efficiency, high power, high power density, wide frequency range, good linearity, small size, light weight, high thermal conductivity, and high reliability.
[0003] Currently, the main suppliers of gallium nitride transistors on the market are companies such as Cree, MACOM, NXP, Integra, Freescale, and Qorvo. The products they provide are depletion-type transistors. Unlike enhancement-type transistors, depletion-type transistors require additional circuitry to achieve gate bias and adjust the drain current by using a negative gate voltage.
[0004] When applied to radio frequency conditions, the lack of a bias circuit and control over the power supply and power-off timing of the gate and drain voltages before applying main power and radio frequency signals makes it impossible to prevent the transistor and circuit from being damaged by a very large current during startup. Compared with enhancement-mode transistors, this is also considered a disadvantage of depletion-mode gallium nitride transistors. It is impossible to widely use depletion-mode gallium nitride transistors to fully utilize their many excellent characteristics, and it is also impossible to guarantee that their power supply timing and gate negative voltage bias are met, and it is impossible to prevent the drain-source maximum current from damaging the transistor.
[0005] Therefore, it is necessary to provide a power supply timing control circuit for gallium nitride power amplifier tubes to solve the above-mentioned technical problems. Utility Model Content
[0006] This invention provides a power supply timing control circuit for a gallium nitride (GaN) power amplifier transistor. It solves the problem that when applied to radio frequency (RF) conditions, the lack of a bias circuit to control the power supply and power-off timing of the gate and drain voltages before applying the main power and RF signal makes it impossible to prevent the transistor and circuit from being damaged by a very large current during startup. Compared with enhancement-mode transistors, this is also considered a disadvantage of depletion-mode GaN transistors, which cannot be widely used to fully utilize the many excellent characteristics of depletion-mode GaN transistors, and cannot guarantee that their power supply timing and gate negative voltage bias are met, thus failing to prevent the drain-source maximum current from damaging the transistor.
[0007] To solve the above-mentioned technical problems, this utility model provides a power supply timing control circuit for a gallium nitride power amplifier tube, comprising: a power supply timing control circuit;
[0008] A DC regulated power supply is provided on one side of the power supply timing control circuit. A gallium nitride power amplifier is provided on one side of the power supply timing control circuit. The power supply timing control circuit includes a drain power supply delay circuit, a negative voltage generation circuit, and a filter circuit.
[0009] Preferably, the input terminal of the drain power supply delay circuit is connected to the DC regulated power supply, and the output terminal of the drain power supply delay circuit is connected to the negative voltage generating circuit and the drain of the gallium nitride power amplifier tube.
[0010] Preferably, the input terminal of the negative voltage generating circuit is connected to the output terminal of the drain power supply delay circuit, and the output terminal of the negative voltage generating circuit is connected to the input terminal of the filter circuit.
[0011] Preferably, the input terminal of the filter circuit is connected to the output terminal of the negative voltage generating circuit, and the output terminal of the filter circuit is connected to the gate of the gallium nitride power amplifier tube.
[0012] Preferably, the drain power supply delay circuit mainly realizes the timing control of the drain voltage and the gate voltage to meet the power supply timing requirements of the gate and drain of the gallium nitride power amplifier tube.
[0013] Preferably, the negative voltage generating circuit is responsible for converting the voltage output by the drain power supply delay circuit for supplying power to the gate of the gallium nitride power amplifier tube from a positive voltage to a negative voltage.
[0014] Preferably, the filter circuit is responsible for filtering out the AC component in the negative voltage output by the negative voltage generation circuit and delivering the DC negative voltage to the gate of the gallium nitride power amplifier tube to ensure the normal operation of the gallium nitride power amplifier tube.
[0015] Compared with related technologies, the power supply timing control circuit for gallium nitride power amplifier tubes provided by this utility model has the following beneficial effects:
[0016] This invention provides a power supply timing control circuit for gallium nitride (GaN) power amplifier transistors. Through the coordinated operation of a drain power supply delay circuit, a negative voltage generation circuit, a filter circuit, a DC regulated power supply, and the GaN power amplifier transistor, the power supply timing of the depletion-mode GaN power amplifier transistor can be controlled. This is a purely hardware circuit without any software, thus offering advantages over software-controlled power supply timing control schemes, including simple structure, small size, ease of implementation, and high reliability. By changing the parameters of the R / C devices in the hardware circuit, the time interval of the power supply timing can be adjusted to meet the power supply timing requirements of different GaN power amplifier transistor models. This widely applies depletion-mode GaN transistors to fully utilize their many excellent characteristics while ensuring that their power supply timing and gate negative voltage bias are met, preventing damage to the transistor from the drain-source maximum current. Attached Figure Description
[0017] Figure 1 A structural block diagram of a power supply timing control circuit for a gallium nitride power amplifier tube provided by this utility model;
[0018] Figure 2 This is a schematic diagram of the filter circuit of this utility model;
[0019] Figure 3 This is a schematic diagram of the drain-powered delay circuit of this utility model;
[0020] Figure 4 This is a schematic diagram of the negative pressure generating circuit of this utility model.
[0021] The following are the labels in the diagram: 1. Power supply timing control circuit, 2. Drain power supply delay circuit, 3. Negative voltage generation circuit, 4. Filter circuit, 5. DC regulated power supply, 6. Gallium nitride power amplifier tube. Detailed Implementation
[0022] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0023] Please refer to the following: Figure 1 , Figure 2 , Figure 3 and Figure 4 ,in, Figure 1 A structural block diagram of a power supply timing control circuit for a gallium nitride power amplifier tube provided by this utility model; Figure 2 This is a schematic diagram of the filter circuit of this utility model; Figure 3 This is a schematic diagram of the drain-powered delay circuit of this utility model; Figure 4 This is a schematic diagram of the negative voltage generation circuit of this utility model. A power supply timing control circuit for a gallium nitride power amplifier tube includes: a power supply timing control circuit 1;
[0024] A DC regulated power supply 5 is disposed on one side of the power supply timing control circuit 1. A gallium nitride power amplifier tube 6 is disposed on one side of the power supply timing control circuit 1. The power supply timing control circuit 1 includes a drain power supply delay circuit 2, a negative voltage generation circuit 3, and a filter circuit 4.
[0025] The input terminal of the drain power supply delay circuit 2 is connected to the DC regulated power supply 5, and the output terminal of the drain power supply delay circuit 2 is connected to the negative voltage generating circuit 3 and the drain of the gallium nitride power amplifier tube 6.
[0026] The input terminal of the negative voltage generating circuit 3 is connected to the output terminal of the drain power supply delay circuit 2, and the output terminal of the negative voltage generating circuit 3 is connected to the input terminal of the filter circuit 4.
[0027] The input terminal of the filter circuit 4 is connected to the output terminal of the negative voltage generating circuit 3, and the output terminal of the filter circuit 4 is connected to the gate of the gallium nitride power amplifier tube 6.
[0028] The drain power supply delay circuit 2 mainly realizes the timing control of drain voltage and gate voltage to meet the power supply timing requirements of the gate and drain of the gallium nitride power amplifier tube 6.
[0029] The negative voltage generating circuit 3 is responsible for converting the voltage output by the drain power supply delay circuit 2, which is used to supply power to the gate of the gallium nitride power amplifier tube 6, from a positive voltage to a negative voltage.
[0030] The filter circuit 4 is responsible for filtering out the AC component in the negative voltage output by the negative voltage generating circuit 3 and sending the DC negative voltage to the gate of the gallium nitride power amplifier tube 6 to ensure that the gallium nitride power amplifier tube 6 works normally.
[0031] The working principle of the power supply timing control circuit for gallium nitride power amplifier tube provided by this utility model is as follows:
[0032] During operation, when the DC regulated power supply first outputs a voltage of 16V to 28V to the power supply timing control circuit 1, the input current flows through two paths through the drain power supply delay circuit 2. One path of the current passes through the voltage divider circuit composed of R10, R11, and Z2 (Zenyl stabilizing diodes) to output a voltage of 9V to 12V to the negative voltage generation circuit 3. The other path of the current flows through the switching circuit composed of Z1, Q1, Q2, and Q3 and the RC delay control circuit composed of R5 and C3 to control the switching sequence of the P-channel MOSFET Q4, ensuring that during the power supply of the gallium nitride power amplifier tube 6, the gate voltage supplies power to the power amplifier tube before the drain voltage; during the power-off process, the gate voltage supplies power to the power amplifier tube after the drain voltage.
[0033] The gate voltage output by the drain-powered delay circuit 2 passes through the square wave circuit composed of D1, R13, R14, C6, and C7 to output a square wave signal. After passing through the detector circuit composed of V3, V4, C4, and C5, the positive voltage in the square wave signal is filtered out and the negative voltage is retained. The negative voltage (-6V to -9V) is output as a -5V voltage by the three-terminal voltage regulator circuit.
[0034] The filter circuit 4 is mainly composed of a low-pass filter network consisting of L1, C8, and C9, which filters out the AC component in the -5V voltage output by the negative voltage generation circuit and supplies the -5V DC voltage to the gate of the gallium nitride power amplifier tube 6.
[0035] Compared with related technologies, the power supply timing control circuit for gallium nitride power amplifier tubes provided by this utility model has the following beneficial effects:
[0036] This invention provides a power supply timing control circuit for a gallium nitride (GaN) power amplifier transistor. Through the coordinated operation of a power supply timing control circuit 1, a drain power supply delay circuit 2, a negative voltage generation circuit 3, a filter circuit 4, a DC regulated power supply 5, and a GaN power amplifier transistor 6, the power supply timing of the depletion-mode GaN power amplifier transistor 6 can be controlled. This is a purely hardware circuit without any software, thus offering advantages over software-controlled power supply timing control schemes, including simple structure, small size, ease of implementation, and high reliability. By changing the parameters of the R / C devices in the hardware circuit, the power supply timing interval can be adjusted to meet the power supply timing requirements of different models of GaN power amplifier transistors 6. This widely applies depletion-mode GaN transistors to fully utilize their many excellent characteristics while ensuring that their power supply timing and gate negative voltage bias are met, preventing damage to the transistor from the drain-source maximum current.
[0037] The above description is merely an embodiment of this utility model and does not limit the patent scope of this utility model. Any equivalent structural or procedural transformations made based on the content of this utility model specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this utility model.
Claims
1. A power supply timing control circuit for a gallium nitride power amplifier transistor, characterized in that, The application relates to a power supply timing control circuit. The power supply timing control circuit comprises a DC voltage stabilizer, a gallium nitride power amplifier tube and a filter circuit. The input end of the drain power supply delay circuit is connected with the DC voltage stabilizer, and the output end of the drain power supply delay circuit is connected with the negative voltage generating circuit and the drain of the gallium nitride power amplifier tube.
2. The power supply timing control circuit of claim 1, wherein The input end of the negative voltage generating circuit is connected with the output end of the drain power supply delay circuit, and the output end of the negative voltage generating circuit is connected with the input end of the filter circuit.
3. The power supply timing control circuit for a gallium nitride power amplifier tube according to claim 1, wherein The input end of the filter circuit is connected with the output end of the negative voltage generating circuit, and the output end of the filter circuit is connected with the gate of the gallium nitride power amplifier tube.
4. The power supply timing control circuit of claim 1, wherein The drain power supply delay circuit mainly realizes timing control of the drain voltage and the gate voltage to meet the power supply timing requirements of the gate and the drain of the gallium nitride power amplifier tube.
5. The timing control circuit for a power supply of a gallium nitride power amplifier tube according to claim 1, wherein The negative voltage generating circuit is responsible for converting the voltage output by the drain power supply delay circuit for supplying power to the gate of the gallium nitride power amplifier tube from positive voltage into negative voltage.
6. The power supply timing control circuit of claim 1, wherein The filter circuit is responsible for filtering the alternating current component in the negative voltage output by the negative voltage generating circuit and delivering the direct current negative voltage to the gate of the gallium nitride power amplifier tube to ensure normal work of the gallium nitride power amplifier tube.
7. The timing control circuit for a power supply of a gallium nitride power amplifier tube according to claim 1, wherein