LED chip structure

Abstract

The utility model relates to the technical field of chip packaging, and provides an LED chip structure, which comprises an LED chip comprising a positive electrode and a negative electrode, the positive electrode and the negative electrode respectively comprise a copper layer and a tin layer, and the tin layer is arranged at the end part of the copper layer; wherein the tin layers in the positive electrode and the negative electrode penetrate through the white wall glue at the bottom of the LED chip and are exposed outside, and the white wall glue is filled between the positive electrode and the negative electrode. According to the utility model, heat can be more effectively dispersed, the junction temperature of the LED chip can be reduced, the positive electrode and the negative electrode of the CSP can be not conducted by using the solder resisting effect of the positive electrode, the negative electrode and the white wall glue, the normal connection among the positive electrode, the negative electrode and the PCB bonding pad is ensured, the service life of the LED chip is prolonged, and the production cost is reduced. And the use condition and optical performance requirements of a user on the LED chip structure are met.

Description

Technical Field

[0001] This utility model relates to the field of chip packaging technology, specifically to an LED chip structure. Background Technology

[0002] Flip chip technology is an advanced chip packaging technology characterized by the chip's electrical side facing down, directly connected to the substrate or other interconnect structures via metal electrodes. This technology avoids the complexity of wire bonding in traditional conventional chip packaging, improving packaging reliability and efficiency.

[0003] Currently, substrate-free LED chip structure CSP (Chip Scale Package) packaging uses tin electrodes and white glue for fixation and electrical connection. However, this design has defects in practical applications: for example, in the CSP packaging structure of substrate-free LED chip structure disclosed in Chinese utility model CN220233227U, tin electrodes are set at the electrode positions of the flip-chip LED in this CSP. During the secondary reflow SMT (Surface Mount Technology) process, the tin electrodes may melt, causing the white glue to expand and lift the chip pads, thereby affecting the normal connection between the tin electrodes, chip electrodes and PCB pads, causing incomplete soldering, which in turn reduces the chip's service life and limits the operating current and conditions of the LED chip. Utility Model Content

[0004] In view of the shortcomings of the existing technology, the purpose of this utility model is to provide an LED chip structure that can effectively prevent the problem of solder bridging between the positive and negative electrodes of CSP.

[0005] To solve the above problems, this utility model provides the following technical solution:

[0006] An LED chip structure comprising:

[0007] An LED chip includes a positive electrode and a negative electrode, both of which include a copper layer and a tin layer, with the tin layer disposed at the end of the copper layer;

[0008] The tin layer in both the positive and negative electrodes protrudes through the white adhesive at the bottom of the LED chip and is exposed on the outside, with the white adhesive filling the space between the positive and negative electrodes.

[0009] In one embodiment, the white wall adhesive includes a first adhesive, a second adhesive, and a third adhesive. The first adhesive is disposed between the positive electrode and the negative electrode, the second adhesive is disposed on the side of the positive electrode away from the negative electrode, and the third adhesive is disposed on the side of the negative electrode away from the positive electrode.

[0010] In one embodiment, the thickness of the tin layer exposed outside the white wall adhesive ranges from 30 to 50 μm.

[0011] In one embodiment, the length of the first colloid is equal to the lengths of both the positive electrode and the negative electrode.

[0012] In one embodiment, the positive electrode and the negative electrode have equal widths, and the width of the first colloid is between 1 / 2 and 3 / 4 of the width of the positive electrode or the negative electrode.

[0013] In one embodiment, the LED chip structure further includes a fluorescent film, which is used to change the spectrum of the light emitted by the LED chip, and the fluorescent film is attached to the side of the LED chip opposite to the conductive layer.

[0014] In one embodiment, the LED chip structure further includes a protective layer covering the side of the fluorescent film opposite to the LED chip.

[0015] In one embodiment, the LED chip structure further includes a fixative, which fills the space between the LED chip and the fluorescent film to form a fixative layer, and the fixative overflows between the LED chip and the fluorescent film to form a beveled layer.

[0016] In one embodiment, the beveled layer is formed between the LED chip and the second colloid, and the beveled layer is bonded to both the second colloid and the fluorescent film.

[0017] In one embodiment, the beveled layer forms an angle relative to the LED chip, and the angle range is between 30° and 60°.

[0018] The beneficial effects of this invention are: it can more effectively disperse heat, reduce the junction temperature of the LED chip, and by utilizing the solder resist effect of the positive and negative electrodes and the white wall adhesive, the positive and negative electrodes of the CSP can be deconductive, ensuring normal connection between the positive and negative electrodes and the PCB pads, thus improving the lifespan of the LED chip and meeting the user's requirements for the usage conditions and optical performance of the LED chip structure. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the optical path of one embodiment of the LED chip structure of this utility model;

[0020] Figure 2 This is a schematic diagram of the first embodiment of the LED chip structure of this utility model;

[0021] Figure 3This is a schematic diagram of the second embodiment of the LED chip structure of this utility model;

[0022] Figure 4 This is a schematic diagram of the third embodiment of the LED chip structure of this utility model;

[0023] Figure 5 This is a cross-sectional schematic diagram of one embodiment of an LED chip.

[0024] Figure label:

[0025] 100. LED chip structure; 110. LED chip; 11a. First region; 11b. Second region; 111a. Contact surface; 111. Conductive layer; 112. Positive electrode; 113. Negative electrode; 121. Copper layer; 122. Tin layer; 131. First colloid; 132. Second colloid; 133. Third colloid; 115. Phosphor film; 116. Protective layer; 141. Fixing layer; 142. Angled layer; 14a. Inclined angle; 301. Pad carrier. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0027] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0028] For ease of description of the first, second, and third directions in the embodiments of this application, the first direction is the left-right direction in the figures, the second direction is the front-back direction in the figures, and the third direction is the top direction in the figures. The x-axis arrow direction is referred to as the "right" direction, the y-axis arrow direction as the "back" direction, and the z-axis arrow direction as the "top" direction, but these are not the sole limitations in the actual application of this application.

[0029] Please refer to Figure 1-4As shown, this embodiment provides an LED chip structure 100, aiming to solve the problems of tin electrode melting, white glue expansion, and poor thermal management in the prior art during secondary reflow SMT. It includes: an LED chip 110, an electrode portion, and white glue. The LED chip 110 includes a conductive layer 111, wherein the electrode portion includes a positive electrode 112 and a negative electrode 113, and both the positive electrode 112 and the negative electrode 113 are disposed on the conductive layer 111. The positive electrode 112 and the negative electrode 113 are respectively composed of a copper layer 121 and a tin layer 122, wherein the copper layer 121 is directly disposed on the conductive layer 111, and the tin layer 122 is disposed on the copper layer 121. Further, white glue covers the bottom of the LED chip 110, and the positive electrode 112 and... The ends of the negative electrode 113 all pass through the white wall adhesive, exposing the tin layer 122 to the outside, and the positive electrode 112 and the negative electrode 113 are separated by the white wall adhesive. By utilizing the solder resist effect of the copper-tin pillar and the white wall adhesive, the positive and negative electrodes 113 of the CSP can be prevented from bridging with tin, making it easier to mount. Furthermore, the copper layer 121 includes a first region 11a and a second region 11b. The first region 11a of the copper layer 121 abuts against the conductive layer 111, and the second region 11b includes multiple contact surfaces 111a. The tin layer 122 covers at least one contact surface 111a.

[0030] According to the above scheme, it is understandable that by designing a white wall adhesive to wrap the bottom of the LED chip 110 and exposing the tin layer 122, the positive electrode 112 and the negative electrode 113 are spaced apart by the white wall adhesive. Utilizing the solder resist effect of the copper-tin pillar and the white wall adhesive, the positive and negative electrodes 113 of the CSP can be prevented from bridging with tin, ensuring normal connection between the tin electrode, the chip electrode, and the PCB pad. This allows for better secondary reflow SMT (Surface Mount Technology) assembly. These improvements enable the LED chip structure 100 provided by this utility model to have higher reliability and better thermal management performance, improve the lifespan of the LED chip, and meet the user's requirements for the usage conditions and optical performance of the LED chip structure 100.

[0031] According to the above scheme, it is understood that by designing the copper layer 121 to have a first region 11a that abuts against the conductive layer 111 and a second region 11b that does not abut against the conductive layer 111, and further subdividing the region of the copper layer 121 that does not contact the conductive layer 111 into multiple contact surfaces 111a, the tin layer 122 can cover at least one contact surface 111a. Thus, the LED chip 110 can be soldered through the tin layer 122 to fix the LED chip 110 onto the pad carrier 301. It is understood that by introducing the copper layer 121 as part of the electrode, heat can be more effectively distributed, the junction temperature (Tj) of the LED chip 110 can be reduced, thereby improving the reliability and thermal management performance of the LED chip, further improving the lifespan of the LED chip, and meeting the user's requirements for the usage conditions and optical performance of the LED chip structure.

[0032] Based on the metallic properties of tin, a tin layer 122 is selected to cover at least one contact surface of the copper layer 121 and to cover the conductive layer 111 on the LED chip. The tin layer 122 facilitates the bonding of the copper layer 121 and the conductive layer 111. Furthermore, in this embodiment, the design of the tin layer 122 is one of the key aspects in order to optimize the electrical connection and thermal management performance of the flip-chip LED chip.

[0033] Preferably, in some embodiments, the tin layer 122 covers one of the contact surfaces of the copper layer 121. When the structure is designed such that only one contact surface of the copper layer 121 is covered by the tin layer 122, the tin layer 122 covers the side of the copper layer 121 facing away from the conductive layer 111. This means that when the structure is designed such that only one contact surface of the copper layer 121 is covered by the tin layer 122, the tin layer 122 covers the side of the copper layer 121 facing away from the conductive layer 111, i.e., the top surface of the copper layer 121. This is because when mounting the LED chip on the pad carrier 301, the tin layer 122 must be located on the top surface of the copper layer 121 to ensure that the LED chip can achieve a reliable soldering connection with the pad substrate through the tin layer 122. In this way, the tin layer 122 acts as a soldering medium, mating with the tin layer 122 on the pad carrier 301 during the soldering process, thereby achieving effective fixation and electrical connection of the LED chip. At the same time, this design allows the LED chip to make full use of the high thermal conductivity of the copper layer 121, quickly transferring heat to the pad carrier 301, thereby improving heat dissipation efficiency.

[0034] Preferably, in other embodiments, the tin layer 122 can cover the contact surfaces of the copper layer 121 along different directions to adapt to different packaging requirements and soldering processes. The first direction and the second direction refer to two directions of the copper layer 121 relative to the horizontal direction of the LED chip. Typically, these two directions correspond to the left and right sides (first direction) and front and back sides (second direction) of the copper layer 121, respectively. Depending on the actual application requirements, the tin layer 122 can selectively cover one or more contact surfaces of the copper layer 121. It is understood that, in addition to the top surface, the tin layer 122 can also selectively cover the sides of the copper layer 121, i.e., the contact surfaces along the first and second directions. This design is suitable for application scenarios that require enhanced side electrical connections or mechanical support. For example, in some special packaging structures, it may be required that the copper layer 121 not only provide good soldering performance on the top surface, but also form additional electrical connection paths or mechanical reinforcement on its sides. In this case, by covering the sides of the copper layer 121 with the tin layer 122, the contact area between the electrode and the external circuit can be increased, the connection reliability can be improved, and stress can be dispersed to improve the stability of the overall structure.

[0035] Preferably, in other embodiments, the tin layer 122 can also simultaneously cover the top surface (third direction), left and right surfaces (first direction), and front and back surfaces (second direction) of the copper layer 121, i.e., omnidirectional coverage along all contact surfaces. This comprehensive design can further optimize electrical connection and mechanical support while ensuring good soldering performance. For example, the tin layer 122 can be covered on the top and all sides of the copper layer 121 to achieve multi-point contact and multi-path heat dissipation. Such a design not only enhances the overall strength of the package structure but also improves thermal management and electrical performance, meeting more complex application requirements.

[0036] Preferably, the height L1 of the copper layer 121 is between 50 and 90 μm. By controlling the height L1 of the copper layer 121 to be between 50 and 90 μm through the electroplating process, a larger space can be reserved for subsequent grinding. After the copper layer 121 is formed, it will be ground to ensure that its surface flatness is consistent, thereby ensuring the uniformity and reliability of the subsequent tin layer 122 formation.

[0037] Preferably, the thickness L2 of the tin layer before polishing is controlled between 30 and 50 μm, and the thickness L3 of the tin layer after polishing is controlled between 15 and 30 μm. Specifically, the thickness L2 of one end of the tin layer 122 exposed outside the adhesive is between 30 and 50 μm; the thickness L3 of the tin layer 122 is controlled between 15 and 30 μm after polishing. This design, with one end of the tin layer 122 exposed outside the adhesive at a thickness L2 range of 30 to 50 μm, allows for reliable connection between the tin layer 122 and the PCB pads during SMT reflow soldering, while avoiding melting problems that might occur with an excessively thick tin layer 122. Furthermore, the total thickness L3 of the tin layer 122 is controlled between 15 and 30 μm after polishing. This thickness ensures good solderability and maintains structural stability at high temperatures, preventing deformation or failure caused by an excessively thick tin layer 122. The final thickness L3 of the tin layer 122 is controlled through a precision grinding process to ensure consistency and high quality for each CSP package product.

[0038] According to the above scheme, it can be understood that the copper layer 121 has the characteristics of high melting point and stable physical properties. By using the copper layer 121 with high melting point and stable physical properties to replace the traditional structure of directly preparing tin electrodes, the deformation or melting problem of tin electrodes under high temperature environment is effectively avoided.

[0039] Preferably, the tin layer 122 is flush with the end face of the white wall adhesive; it is understood that the purpose of this structure is to achieve a good connection between the tin layer 122 and the external circuit, while the positive electrode 112 and the negative electrode 113 are spaced apart by the white wall adhesive to ensure electrical isolation and packaging reliability.

[0040] According to the above scheme, further, white wall adhesive is wrapped around the gap of LED chip 110.

[0041] Preferably, the conductive layer 111 is disposed on the back side of the LED chip 110, and the conductive layer 111 corresponds to the projection of the copper layer 121 toward the LED chip 110. Specifically, in the fabrication process of the LED chip 110, a seed layer is first formed on the entire back side of the flip-chip LED chip 110, including the positions of the positive electrode 112 and the negative electrode 113, by a metal sputtering process. This seed layer is usually made of a metal material such as titanium, and its purpose is to provide a good adhesion base for the subsequent electroplating process. Subsequently, by spin-coating photoresist and exposing and developing specific areas, the areas that do not need to be metallized are covered, while the electrode areas where the copper layer 121 needs to be formed are exposed. Next, the entire wafer is placed in the electroplating solution, and under the condition of power supply, the exposed seed layer begins to electroplat and grow a copper layer, finally forming a copper layer 121 with a predetermined height L1 (e.g., 40-70 μm). Finally, the photoresist is removed, and the formed copper layer 121 is polished to ensure that its surface flatness is consistent. In this way, the conductive layer 111 not only serves as an electrical connection, but also enhances the mechanical strength and thermal conductivity of the electrode structure.

[0042] Preferably, the thickness L8 of the titanium layer is between 0 and 5 μm. Understandably, in the fabrication of flip-chip LEDs, the titanium layer is introduced as a seed layer, primarily to enhance the adhesion and conductivity of the subsequent electroplated copper pillars. Specifically, the titanium layer is deposited on the back electrode of the LED chip via sputtering, forming a uniform and thin metal layer. The role of this titanium layer is not only to provide a good adhesion base but also to improve the current distribution during electroplating, ensuring that the electroplated copper pillars have a uniform thickness and high quality. Furthermore, the titanium layer thickness L8 is chosen to be between 0 and 5 μm primarily to ensure good adhesion without affecting the overall package size and weight. An excessively thick titanium layer may lead to unnecessary material waste and increase the difficulty of subsequent processing. In this embodiment, the titanium layer thickness L8 is preferably 1 μm, which provides sufficient adhesion to ensure a tight bond between the titanium layer and the back electrode of the LED chip, without affecting the overall package size and weight.

[0043] Preferably, the white wall adhesive includes a first adhesive 131, a second adhesive 132, and a third adhesive 133. The first adhesive 131 is disposed between the positive electrode 112 and the negative electrode 113 to fill the gap between them, ensure electrical isolation, prevent short circuits, and provide good support after curing, ensuring the stability of the chip structure. The second adhesive 132 is disposed on the side of the positive electrode 112 away from the negative electrode 113, and the third adhesive 133 is disposed on the side of the negative electrode 113 away from the positive electrode 112, i.e., at the outer edge of each electrode. The function of the second adhesive 132 and the third adhesive 133 is to further enhance the strength of the encapsulation structure and protect the electrodes from external environmental influences. In practical applications, the white wall adhesive is applied to the designated location through a dispensing process and cured by baking to form a robust encapsulation layer.

[0044] Specifically, a copper layer of approximately 70µm is electroplated onto the seed titanium layer sputtered on the back of the entire wafer. Then, the photoresist outside the pads and the sputtered titanium layer are removed by etching. The copper layer is then ground smooth, retaining a height of approximately 50µm. At this point, each small LED chip 110 on the back of the entire wafer has copper electrode pads. This completes the process of growing copper electrodes on the back of the entire wafer. The working principle of the electroplating solution is as follows: During electroplating, copper ions in the copper plating solution gain electrons at the cathode (the part to be plated) and are reduced to copper atoms. These copper atoms deposit on the cathode surface to form a uniform and dense copper film. Simultaneously, copper atoms on the anode (copper anode) lose electrons and are oxidized to copper ions, which enter the plating solution to maintain a stable concentration of copper ions in the solution.

[0045] Preferably, the length L4 of the first colloid 131 is equal to the length L5 of both the positive electrode 112 and the negative electrode 113, which facilitates uniform electrical isolation and support along the entire electrode length. Furthermore, the width L6 of the positive electrode 112 and the negative electrode 113 is equal, giving them symmetry in the packaging structure. This is beneficial for standardization of the manufacturing process and mass production. The width L7 of the first colloid 131 is between 1 / 2 and 3 / 4 of the width L6 of either the positive electrode 112 or the negative electrode 113. This design precisely controls the space occupied by the first colloid 131, ensuring sufficient filling for effective electrical isolation and mechanical fixation, while avoiding an excessively wide first colloid 131 occupying too much space and affecting the overall compactness of the packaging.

[0046] Preferably, the LED chip structure 100 further includes a fluorescent film 115, which is used to change the spectrum of light emitted by the LED chip 110. The fluorescent film 115 is attached to the side of the LED chip 110 away from the conductive layer 111, that is, located on the light-emitting side of the LED chip 110. Further, the LED chip structure 100 also includes a protective layer 116, wherein the fluorescent film 115 is responsible for absorbing the blue light or ultraviolet light emitted by the LED chip 110 and converting it into light of the desired wavelength, such as white light or other visible light of other colors. The protective layer 116 provides physical protection to prevent the fluorescent film 115 from being affected by external environmental factors such as moisture and dust during use, while ensuring that light can pass through efficiently. The fluorescent film 115 is prepared by a precise coating process and can be a single-layer structure, but in this embodiment, a double-layer structure is preferred to enhance the protective effect on the fluorescent film 115 and optimize the optical performance.

[0047] Optionally, the protective layer 116 covers the side of the fluorescent film 115 away from the LED chip 110, that is, it is located on the outermost side of the light-emitting surface of the LED chip 110, thereby playing a protective role. The protective layer 116 is made of transparent material to achieve high light transmittance.

[0048] Preferably, the LED chip structure 100 further includes a fixing adhesive, which fills the space between the LED chip 110 and the fluorescent film 115 to form a fixing layer 141. During the assembly process, the fixing adhesive is precisely applied to the contact area between the LED chip 110 and the fluorescent film 115 to ensure that the two are tightly bonded. The fixing adhesive not only fills the tiny gap between the LED chip 110 and the fluorescent film 115, but also overflows at the edges of the two, naturally forming a beveled layer 142. The beveled layer 142 is formed between the LED chip 110 and the second adhesive 132, and is bonded to both the second adhesive 132 and the fluorescent film 115.

[0049] Preferably, the beveled layer 142 forms an inclined angle 14a relative to the LED chip 110. The angle 14a can be adjusted by controlling the amount of fixative and the dispensing process parameters, generally maintained between 30° and 60°. The design of the beveled layer 142 helps optimize the light propagation path at the interface between the LED chip 110 and the phosphor film 115, reducing light loss and improving overall light emission uniformity. The selection of the fixative needs to consider its adhesive strength, transparency, and good adhesion to different materials to ensure reliability and optical performance during long-term use.

[0050] In summary, this utility model provides an LED chip structure. By designing a copper layer with a first region that abuts against the conductive layer and a second region that does not abut against the conductive layer, and further subdividing the region of the copper layer that does not contact the conductive layer into multiple contact surfaces, a tin layer can be applied to at least one contact surface. This allows the LED chip to be soldered onto the pad carrier. By introducing the copper layer as part of the electrode, heat can be more effectively distributed, reducing the junction temperature (Tj) of the LED chip. This improves the reliability and thermal management performance of the LED chip, further extending its lifespan and meeting the user's requirements for the LED chip structure's operating conditions and optical performance.

[0051] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. An LED chip structure, characterized by, The LED chip structure comprises: An LED chip comprising a positive electrode and a negative electrode, the positive electrode and the negative electrode each comprising a copper layer and a tin layer, the tin layer being arranged at the end of the copper layer; wherein the tin layer of the positive electrode and the negative electrode is exposed to the outside through the white wall glue at the bottom of the LED chip, and the white wall glue is filled between the positive electrode and the negative electrode.

2. The LED chip structure of claim 1, wherein: The white wall glue comprises a first glue, a second glue and a third glue, the first glue being arranged between the positive electrode and the negative electrode, the second glue being arranged on the side of the positive electrode away from the negative electrode, and the third glue being arranged on the side of the negative electrode away from the positive electrode.

3. The LED chip structure of claim 1, wherein: The thickness of the tin layer exposed to the outside of the white wall glue ranges between 30-50 μm.

4. The LED chip structure of claim 2, wherein: The length of the first glue is equal to the length of the positive electrode and the negative electrode.

5. The LED chip structure of claim 2, wherein: The width of the positive electrode and the negative electrode is equal, and the width of the first glue ranges between 1 / 2-3 / 4 of the width of the positive electrode or the negative electrode.

6. The LED chip structure of claim 2, wherein: The LED chip structure further comprises a fluorescent film for changing the spectrum of the light of the LED chip. The LED chip further comprises a conductive layer arranged on the back of the LED chip, and the fluorescent film is attached to the side of the LED chip away from the conductive layer.

7. The LED chip structure of claim 6, wherein: The LED chip structure further comprises a protective layer covering the side of the fluorescent film away from the LED chip.

8. The LED chip structure of claim 6, wherein: The LED chip structure further comprises a fixing glue filled between the LED chip and the fluorescent film to form a fixing layer, the fixing glue overflowing between the LED chip and the fluorescent film and forming an inclined angle layer.

9. The LED chip structure of claim 8, wherein: The inclined angle layer is formed between the LED chip and the second glue, and the inclined angle layer is bonded to the second glue and the fluorescent film.

10. The LED chip structure of claim 8, wherein: The inclined angle layer forms an inclined angle with the LED chip, and the angle of the inclined angle ranges between 30-60°.

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