Circuit for enhancing RS485 communication driving capability

Abstract

The utility model relates to a circuit for enhancing RS485 communication driving capability, which comprises a power conversion circuit, a singlechip processing circuit, a 485 communication transceiving circuit and a level conversion circuit which are matched with the circuit, and the singlechip processing circuit, the level conversion circuit and the 485 communication transceiving circuit are all electrically connected with the power conversion circuit. The single-chip microcomputer processing circuit is also respectively connected with the level conversion circuit and the 485 communication transmit-receive circuit. A new processing method is adopted, an RS485 chip is protected, driving voltage and MOS tube push-pull output are increased, the driving capacity is improved, parameter influences of distributed capacitance and distributed inductance of a cable are reduced, a layer of protection is added for RS485 network communication, economic losses are reduced, and the circuit design for enhancing the RS485 communication driving capacity is provided by integrating the conditions.

Description

TECHNICAL FIELD

[0001] The utility model relates to communication technical field especially point to a kind of circuit of enhanced RS485 communication drive capability. BACKGROUND

[0002] In the RS485 signal cable, the signal will attenuate in the transmission process of cable, which is mainly due to the result of the combined action of cable's distributed capacitance, distributed inductance and resistance. Using low-quality cable or too long cable can cause signal strength to weaken, thereby affecting the stability and speed of data transmission. Some RS485 chips are occasionally damaged during use, and as long as there is a damaged one in the network, the network will collapse, causing disastrous effects. SUMMARY

[0003] The utility model provides a kind of circuit of enhanced RS485 communication drive capability to solve the problems mentioned in prior art.

[0004] To achieve the above purpose, the utility model provides the following technical scheme:

[0005] A kind of circuit of enhanced RS485 communication drive capability, including power conversion circuit, single-chip microcomputer processing circuit, 485 communication transceiver circuit and level conversion circuit, the single-chip microcomputer processing circuit, level conversion circuit and 485 communication transceiver circuit are all electrically connected with power conversion circuit, single-chip microcomputer processing circuit is also connected level conversion circuit and 485 communication transceiver circuit respectively;

[0006] The power conversion circuit includes power conversion chip U1 and chip U2, power conversion chip U1's pin 3 is electrically connected with inductance L1, chip U2's pin 1, chip U1's pin 1 is connected with resistance R1, chip U1's pin 2 is connected with resistance R2 and capacitor C5, and outputs 6V voltage, while the other end of resistance R1, the other end of resistance R2, the other end of capacitor C5 are connected and grounded;The power conversion circuit includes power conversion chip U2, power conversion chip U2's pin 1 is electrically connected with inductance L1 and chip U1's pin 3, chip U2's pin 3 is connected with capacitor C3 and capacitor C4, and outputs 5V voltage;The pin 1 of power connector J1 is connected with +12V voltage, and is connected with capacitor C1, capacitor C2 and inductance L1, the pin 2 of power connector J1, capacitor C1, capacitor C2, capacitor C3, capacitor C4 and the pin 2 of power conversion chip U2 are all grounded;

[0007] The single-chip microcomputer processing circuit comprises a single-chip microcomputer chip U3, the pin 1 of the chip U3 is connected with a capacitor C6 and a resistor R3, the other end of the capacitor C6 is connected with a +5V power supply, and the other end of the resistor R3 is connected with the ground; the pin 2 of the chip U3 is connected with a 485 communication receiving circuit, and the pin 3 is connected with a level conversion circuit; the pins 4 and 5 of the chip U3 are connected with a crystal oscillator Y1, a capacitor C7 and a capacitor C8, the other end of the capacitor C7 and the other end of the capacitor C8 are connected with the ground; the pin 10 of the chip U3 is connected with the ground, the pin 18 is connected with a 485 sending circuit, the pin 20 is connected with a capacitor C9 and a +5V power supply, and the other end of the capacitor C9 is connected with the ground;

[0008] The signal level conversion circuit comprises a triode Q1, a triode Q2 and a triode Q3, the base of the triode Q1 is connected with a resistor R4, the other end of the resistor R4 is connected with the pin 3 of the chip U3, the emitter of the triode Q1 is connected with the ground, the collector of the triode Q1 is connected with a resistor R5 and outputs a data sending signal, and the resistor R5 is connected with a 485 sending circuit and a +6V power supply; the emitter of the triode Q2 and the collector of the triode Q3 are connected with each other, and are connected with the pin 3 of the chip U3 and a resistor R6, the other end of the resistor R6 is connected with a +5V power supply; the base of the triode Q2 and the base of the triode Q3 are connected with each other, and are connected with a resistor R7, the other end of the resistor R7 is connected with a +5V power supply; the emitter of the triode Q3 and the collector of the triode Q2 are connected with each other, and are connected with the 485 sending circuit and a resistor R8, the other end of the resistor R8 is connected with a +6V power supply;

[0009] The resistor RS485 sending circuit comprises a chip U4, MOS tubes Q4, Q5, Q6 and Q7, the pin 1 of the chip U4 is connected with the pin 18 of the chip U3 to control data sending, the pins 2, 3, 11 and 20 of the chip U4 are connected with a +6V power supply, the pin 20 of the chip U4 is connected with a capacitor C10, the other end of the capacitor C10 is connected with the ground, the pins 8, 9 and 10 of the chip U4 are connected with the ground, the pin 12 of the chip U4 is connected with a resistor R12 and the gate of the MOS tube Q7, the pin 13 of the chip U4 is connected with a resistor R10 and the gate of the MOS tube Q5, the pin 18 of the chip U4 is connected with a resistor R11 and the gate of the MOS tube Q6, the pin 19 of the chip U4 is connected with a resistor R9 and the gate of the MOS tube Q4, the other end of the resistor R9, the other end of the resistor R10, the other end of the resistor R11 and the other end of the resistor R12 are connected with a level conversion circuit; the source of the MOS tube Q4 and the source of the MOS tube Q6 are connected with a +6V power supply, the source of the MOS tube Q5 and the source of the MOS tube Q7 are connected with the ground, the drain of the MOS tube Q4 and the drain of the MOS tube Q5 are connected with each other and are connected with a resistor R13, the other end of the resistor R13 is connected with a 485 bus A, the drain of the MOS tube Q6 and the drain of the MOS tube Q7 are connected with each other and are connected with a resistor R14, the other end of the resistor R14 is connected with a 485 bus B;

[0010] The resistance RS485 receiving circuit comprises a chip U5 and an interface J2; a pin 1 of the chip U5 is connected with a pin 2 of the chip U3, pins 2, 3, 4 and 5 of the chip U5 are grounded, a pin 8 of the chip U5 is connected with a power supply +5V, a pin 7 of the chip U5 is connected with a TVS tube TVS1 and a fuse tube F1, the other end of the TVS tube TVS1 is grounded, the other end of the fuse tube F1 is connected with a pin 1 of the interface J2, a pin 6 of the chip U5 is connected with a TVS tube TVS2 and a fuse tube F2, the other end of the TVS tube TVS2 is grounded, and the other end of the fuse tube F2 is connected with a pin 2 of the interface J2.

[0011] Preferably, the model of the power conversion chip U1 is LM317EMP, and a pin 2 of the power conversion chip U1 outputs 6V direct current; the model of the power conversion chip U2 is L7805CV, and a pin 3 of the power conversion chip U2 outputs 5V direct current.

[0012] Preferably, the model of the logic circuit chip U4 is 74HC573D, the model of the RS485 chip U5 is 65LBC184, and the model of the single-chip microcomputer chip U3 is AT89C2051.

[0013] Preferably, the MOS tubes are push-pull output, the models of the MOS tube Q4 and the MOS tube Q6 are I, and the models of the MOS tube Q5 and the MOS tube Q7 are SQD90P04_9M4L.

[0014] Preferably, the models of the triodes Q1, Q2 and Q3 are all S9018.

[0015] Preferably, the pin 1 of the power connector J1 is electrically connected with a 12V direct current power supply, and the capacitors C1, C2, C3 and C4 are all filter capacitors.

[0016] Preferably, the pin 1 of the RS485 bus connector J2 is connected with an external bus B, and the pin 2 is connected with an external bus A.

[0017] In the above technical solution, the technical effects and advantages of the utility model are provided.

[0018] The utility model realizes real-time RS485 data transceiving, and takes necessary measures, wherein the 485 chip only receives input data and does not send output data, so that the 485 chip is protected and is not easy to be damaged; MOS tubes are used to output data and signals, so that the driving capacity is increased, the signal level is improved to be close to ±6V, the anti-interference capacity is enhanced, and economic loss is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings described in the following are only some of the embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0020] Figure 1 The power conversion circuit diagram of the circuit design for enhancing the RS485 communication driving capability is provided for the present application.

[0021] Figure 2 The single-chip microcomputer processing circuit diagram of the circuit design for enhancing the RS485 communication driving capability is provided for the present application.

[0022] Figure 3 The signal level conversion circuit diagram of the circuit design for enhancing the RS485 communication driving capability is provided for the present application.

[0023] Figure 4 The 485 communication data sending circuit diagram of the circuit design for enhancing the RS485 communication driving capability is provided for the present application.

[0024] Figure 5 The 485 communication data receiving circuit diagram of the circuit design for enhancing the RS485 communication driving capability is provided for the present application. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0026] It should be noted that the terms "vertical", "horizontal", "up", "down", "left", "right" and similar expressions used herein are only for the purpose of illustration, and do not represent the only implementation.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs; the terms used in the specification of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application; the term "and / or" used herein includes any and all combinations of one or more related listed items.

[0028] This utility model provides, for example Figures 1-5 The drawing shown is a circuit design to enhance the driving capability of RS485 communication. It includes a power conversion circuit, a level conversion circuit, a microcontroller processing circuit, and an RS485 data transceiver circuit that work with RS485 communication. The microcontroller processing circuit and the RS485 data transceiver circuit are electrically connected to the power conversion circuit, and the RS485 data transceiver circuit is electrically connected to the microcontroller processing circuit.

[0029] Example 2, based on Example 1, such as Figure 1 As shown, the power conversion circuit includes power conversion chips U1 and U2. Pin 3 of power conversion chip U1 is electrically connected to inductor L1, pin 1 of chip U2 is connected to resistor R1, and pin 2 of chip U1 is connected to resistor R2 and capacitor C5, outputting a 6V voltage. The other ends of resistors R1, R2, and capacitor C5 are connected and grounded. The power conversion circuit also includes power conversion chip U2. Pin 1 of power conversion chip U2 is electrically connected to inductor L1, pin 3 of chip U2 is connected to capacitors C3 and C4, and outputs a 5V voltage. Pin 1 of power connector J1 is connected to +12V and is connected to capacitors C1, C2, and L1. Pin 2 of power connector J1, the other ends of capacitors C1, C2, C3, and C4, and pin 2 of power conversion chip U2 are all grounded.

[0030] Example 3, based on Example 1, such as Figure 2 As shown, the microcontroller processing circuit includes a microcontroller chip U3. Pin 1 of chip U3 is connected to capacitor C6 and resistor R3. The other end of capacitor C6 is connected to a +5V power supply, and the other end of resistor R3 is grounded. Pin 2 of chip U3 is connected to a 485 communication receiving circuit, and pin 3 is connected to a level conversion circuit. Pins 4 and 5 of chip U3 are connected to crystal oscillator Y1, capacitor C7, and capacitor C8. The other ends of capacitors C7 and C8 are grounded. Pin 10 of chip U3 is grounded, pin 18 is connected to a 485 transmitting circuit, and pin 20 is connected to capacitor C9 and connected to a +5V power supply. The other end of capacitor C9 is grounded.

[0031] Example 4, based on Example 1, such as Figure 3As shown, the signal level conversion circuit includes transistors Q1, Q2, and Q3. The base of transistor Q1 is connected to resistor R4, and the other end of resistor R4 is connected to pin 3 of chip U3. The emitter of transistor Q1 is grounded, and the collector is connected to resistor R5 and outputs a data transmission signal, connecting to the 485 transmitting circuit. The other end of resistor R5 is connected to the +6V power supply. The emitter of transistor Q2 and the collector of transistor Q3 are connected and connected to pin 3 of chip U3. Resistor R6 is connected, and the other end of resistor R6 is connected to +5V. The bases of transistors Q2 and Q3 are connected and connected to resistor R7, and the other end of resistor R7 is connected to +5V. The emitter of transistor Q3 and the collector of transistor Q2 are connected and connected to the 485 transmitting circuit. Resistor R8 is connected, and the other end of resistor R8 is connected to the +6V power supply.

[0032] Example 5, based on Example 1, such as Figure 4 As shown, the RS485 transmitting circuit includes chip U4, MOSFETs Q4, Q5, Q6, and Q7. Pin 1 of chip U4 is connected to pin 18 of chip U3 to control data transmission. Pins 2, 3, 11, and 20 are connected to the +6V power supply. Pin 20 is connected in parallel with capacitor C10, the other end of which is grounded. Pins 8, 9, and 10 are grounded. Pin 12 is connected to resistor R12 and the gate of MOSFET Q7. Pin 13 is connected to resistor R10 and the gate of MOSFET Q5. Pin 18 is connected to resistor R11 and the gate of MOSFET Q6. Pin 19 is connected to resistor R9 and the gate of MOSFET Q4. The other ends of resistors R9, R10, R11, and R12 are connected to a level shifting circuit. The sources of MOSFET Q4 and Q6 are connected to the +6V power supply. The sources of MOSFET Q5 and Q7 are grounded. The drains of MOSFET Q4 and Q5 are connected to resistor R13, with the other end of resistor R13 connected to 485 bus A. The drains of MOSFET Q6 and Q7 are connected to resistor R14, with the other end of resistor R14 connected to 485 bus B.

[0033] Example 6, based on Example 1, such as Figure 5 As shown, the RS485 receiving circuit includes chips U5 and J2. Pin 1 of chip U5 is connected to pin 2 of chip U3. Pins 2, 3, 4, and 5 are grounded. Pin 8 is connected to the +5V power supply. Pin 7 is connected to TVS1 and fuse F1. The other end of TVS1 is grounded. The other end of F1 is connected to pin 1 of J2. Pin 6 is connected to TVS2 and fuse F2. The other end of TVS2 is grounded. The other end of F2 is connected to pin 2 of J2.

[0034] This invention enables real-time RS485 data communication, improves reliability and stability, and provides protection for the RS485 chip.

[0035] Working principle: When in use, the 12V DC power supply is converted into 5V or 6V DC power through the power conversion circuit to provide power to the system circuit.

[0036] When receiving data, pin 18 (labeled KZ) of chip U3 outputs a low-level signal, and the logic chip of chip U4 outputs an active signal. Pins 18 and 19 output a high level, turning off MOSFETs Q6 and Q4. Pins 12 and 13 output a low level, turning off MOSFETs Q7 and Q5. At this time, the 485 bus is in a high-impedance state, the transmitting circuit is isolated from the bus, and only the 485 chip U5 receives data.

[0037] When sending data, pin 18 (labeled KZ) of chip U3 outputs a high-level signal, and the logic chip output of chip U4 is in a high-impedance state, with pins 18, 19, 12, and 13 outputting high impedance. MOSFETs Q6, Q4, Q7, and Q5 are not affected by the logic chip and can only output the TX-1 signal through pin 3 (labeled TX) of chip U3 after inversion. After level shifting, the same-direction follower signal TX-0 is output. Signals TX-1 and TX-0 drive the MOSFET push-pull output bus differential signal to achieve data output.

[0038] This invention employs a novel processing method to protect the RS485 chip, increases the driving voltage and MOSFET push-pull output, improves driving capability, and reduces the impact of distributed capacitance and inductance parameters of the cable, thus adding a layer of protection for RS485 network communication and reducing economic losses.

[0039] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention.

[0040] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment have been appropriately combined to form other embodiments that are easy for those skilled in the art to understand.

Claims

1. A circuit for enhancing RS485 communication driving capability, comprising a power conversion circuit, a microcontroller processing circuit, a RS485 communication transceiver circuit, and a level conversion circuit, characterized in that, The microcontroller processing circuit, level conversion circuit, and 485 communication transceiver circuit are all electrically connected to the power conversion circuit. The microcontroller processing circuit is also connected to the level conversion circuit and the 485 communication transceiver circuit. The power conversion circuit includes power conversion chips U1 and U2. Pin 3 of power conversion chip U1 is electrically connected to inductor L1 and pin 1 of chip U2. Pin 1 of chip U1 is connected to resistor R1. Pin 2 of chip U1 is connected to resistor R2 and capacitor C5, and outputs a 6V voltage. At the same time, the other ends of resistor R1, resistor R2, and capacitor C5 are connected to and grounded. The power conversion circuit also includes power conversion chip U2. Pin 1 of power conversion chip U2 is electrically connected to inductor L1 and pin 3 of chip U1. Pin 3 of chip U2 is connected to capacitor C3 and capacitor C4, and outputs a 5V voltage. Pin 1 of power connector J1 is connected to +12V voltage and is connected to capacitor C1, capacitor C2, and inductor L1. Pin 2 of power connector J1, the other ends of capacitors C1, C2, C3, and C4, and pin 2 of power conversion chip U2 are all grounded. The microcontroller processing circuit includes a microcontroller chip U3. Pin 1 of chip U3 is connected to capacitor C6 and resistor R3. The other end of capacitor C6 is connected to a +5V power supply, and the other end of resistor R3 is grounded. Pin 2 of chip U3 is connected to a 485 communication receiving circuit, and pin 3 is connected to a level conversion circuit. Pins 4 and 5 of chip U3 are connected to crystal oscillator Y1, capacitor C7, and capacitor C8. The other ends of capacitor C7 and capacitor C8 are grounded. Pin 10 of chip U3 is grounded, pin 18 is connected to a 485 transmitting circuit, and pin 20 is connected to capacitor C9 and connected to a +5V power supply. The other end of capacitor C9 is grounded. The signal level conversion circuit includes transistors Q1, Q2, and Q3. The base of transistor Q1 is connected to resistor R4, and the other end of resistor R4 is connected to pin 3 of chip U3. The emitter of transistor Q1 is grounded, and the collector is connected to resistor R5 and outputs a data transmission signal, connecting to the 485 transmission circuit. The other end of resistor R5 is connected to the +6V power supply. The emitter of transistor Q2 and the collector of transistor Q3 are connected and connected to pin 3 of chip U3 and resistor R6. The other end of resistor R6 is connected to +5V. The bases of transistors Q2 and Q3 are connected and connected to resistor R7. The other end of resistor R7 is connected to +5V. The emitter of transistor Q3 and the collector of transistor Q2 are connected and connected to the 485 transmission circuit and resistor R8. The other end of resistor R8 is connected to the +6V power supply. The RS485 transmitting circuit includes chip U4, MOSFETs Q4, Q5, Q6, and Q7. Pin 1 of chip U4 is connected to pin 18 of chip U3 to control data transmission. Pins 2, 3, 11, and 20 of chip U4 are connected to a +6V power supply. Pin 20 of chip U4 is connected in parallel with capacitor C10, the other end of which is grounded. Pins 8, 9, and 10 of chip U4 are grounded. Pin 12 of chip U4 is connected to resistor R12 and the gate of MOSFET Q7. Pin 13 of chip U4 is connected to resistor R10 and the gate of MOSFET Q5. Pin 18 of chip U4 is connected to resistor R11 and the gate of MOSFET Q7. The gate of transistor Q6 is connected to resistor R9 and the gate of MOSFET Q4 via pin 19 of chip U4. The other ends of resistors R9, R10, R11, and R12 are connected to a level shifting circuit. The sources of MOSFETs Q4 and Q6 are connected to a +6V power supply. The sources of MOSFETs Q5 and Q7 are grounded. The drains of MOSFETs Q4 and Q5 are connected to resistor R13, with the other end of resistor R13 connected to 485 bus A. The drains of MOSFETs Q6 and Q7 are connected to resistor R14, with the other end of resistor R14 connected to 485 bus B. The RS485 receiving circuit includes chip U5 and interface J2; pin 1 of chip U5 is connected to pin 2 of chip U3, pins 2, 3, 4, and 5 of chip U5 are grounded, pin 8 of chip U5 is connected to the +5V power supply, pin 7 of chip U5 is connected to TVS tube TVS1 and fuse F1, the other end of TVS1 is grounded, the other end of fuse F1 is connected to pin 1 of interface J2, pin 6 of chip U5 is connected to TVS tube TVS2 and fuse F2, the other end of TVS tube TVS2 is grounded, and the other end of fuse F2 is connected to pin 2 of interface J2.

2. The circuit for enhancing RS485 communication driving capability according to claim 1, characterized in that: The power conversion chip U1 is model LM317EMP, and pin 2 of the power conversion chip U1 outputs 6V DC. The power conversion chip U2 is model L7805CV, and pin 3 of the power conversion chip U1 outputs 5V DC.

3. The circuit for enhancing RS485 communication driving capability according to claim 1, characterized in that: The logic circuit chip U4 is model 74HC573D, the RS485 chip U5 is model 65LBC184, and the microcontroller chip U3 is model AT89C2051.

4. The circuit for enhancing RS485 communication driving capability according to claim 1, characterized in that: The RS485 chip U5 only receives data and does not send data when it is working.

5. The circuit for enhancing RS485 communication driving capability according to claim 1, characterized in that: The power connector J1 has a 12V DC power supply connected to pin 1. Capacitors C1, C2, C3, and C4 are all filter capacitors.

6. The circuit for enhancing RS485 communication driving capability according to claim 1, characterized in that: The RS485 transmitting circuit uses four MOS transistors in a push-pull configuration to achieve differential output of buses A and B; the logic circuit chip U4 is model 74HC573D.

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