Test attachment plate
By designing test attachments along the edge of the PCB board, including buried via layers, solder mask layers, upper laser via layers, and lower laser via layers, test points are formed and open pads are set, solving the problem of difficult detection of hole cracks and achieving a fast and convenient detection effect.
Patent Information
- Application Number
- CN202422822959.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-19
- Publication Date
- 2026-01-09
- Estimated Expiration
- 2034-11-19
AI Technical Summary
Hole cracks in printed circuit boards (PCBs) are difficult to detect through visual inspection, and existing testing methods such as interconnect stress testing and thermal shock testing are time-consuming.
A test attachment board is designed, including a buried via layer, a solder mask layer, an upper laser via layer, and a lower laser via layer, which is set on the edge of the PCB board. Test points are formed by laser vias on both sides of the buried vias, and open pads are set on the outside of the test attachment board to simulate the layout of laser vias in actual PCB board production, thereby simplifying the detection of hole cracks.
It enables rapid and convenient detection of hole cracks, shortens the detection time, and improves detection efficiency.
Smart Images
Figure CN223786256U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic technology, and in particular to a test attachment board. Background Technology
[0002] Cracks in stacked vias are common in printed circuit boards (PCBs). Because the cracks are embedded in the inner layers, they are difficult to observe visually. Reliability tests such as interconnection test (IST), thermal shock test, and high temperature test can effectively detect cracks in the vias, but the test time is long. Summary of the Invention
[0003] To address the aforementioned issues, this invention provides a test attachment plate to shorten the inspection time for hole cracks.
[0004] The present invention discloses the following technical solutions:
[0005] A test attachment board is disposed on the edge of a PCB board, including a buried via layer, a solder mask layer, an upper laser via layer, and a lower laser via layer;
[0006] The upper laser aperture layer located above the buried via layer includes multiple upper laser apertures; the lower laser aperture layer located below the buried via layer includes multiple lower laser apertures; the buried via layer includes multiple buried vias.
[0007] The top layer of upper laser hole layer has a first pad corresponding to the upper laser hole, and the bottom layer of lower laser hole layer has a second pad corresponding to the lower laser hole; the top layer of solder mask layer has a first open pad connected to the first pad, and the bottom layer of solder mask layer has a second open pad connected to the second pad.
[0008] In the projection perpendicular to the buried via layer, each buried via corresponds to an upper laser hole and a lower laser hole to form a test point. The upper laser hole and the lower laser hole in each test point are located on both sides of the buried via at the test point and are electrically connected to the buried via.
[0009] Optionally, the upper laser aperture layer includes multiple layers, and the upper laser apertures in each upper laser aperture layer are coaxial and electrically connected with the corresponding upper laser apertures in adjacent upper laser aperture layers.
[0010] The lower laser aperture layer comprises multiple layers, and the lower laser apertures in each lower laser aperture layer are coaxial and electrically connected with the corresponding lower laser apertures in adjacent lower laser aperture layers.
[0011] Optionally, the center points of the upper laser aperture, buried aperture, and lower laser aperture included in the test point are projected onto a straight line; the line connecting the projected center points of the upper laser aperture, buried aperture, and lower laser aperture included in each test point is parallel to the line connecting the projected center points of the upper laser aperture, buried aperture, and lower laser aperture included in other test points.
[0012] Optionally, the angle between the projection line connecting the center points of the upper laser hole, the buried hole, and the lower laser hole of the test point and the side of the test attachment plate is an acute angle.
[0013] Optionally, the buried vias include a plurality of buried vias I evenly distributed in a rectangular array, and buried vias II and III located outside the plurality of buried vias I;
[0014] The test points where the multiple buried holes are located are connected in a daisy chain to form a link. The first end of the link is electrically connected to the test point where the buried hole is located, and the last end of the link is connected to the test point where the buried hole is located.
[0015] Optionally, for each buried via, the upper laser hole at the test point corresponds to a first pad, and the lower laser hole corresponds to a second pad. The first and second pads connected to the test point where the buried via is located are both laser hole pads.
[0016] There are multiple buried vias. The upper laser hole of the multiple buried vias at the test point corresponds to a first pad, and the lower laser hole of the multiple buried vias at the test point corresponds to a second pad. The first pad and the second pad connected to the test point where the buried via is located are both rectangular pads.
[0017] There are multiple buried vias. The upper laser hole of the multiple buried vias at the test point corresponds to a first pad, and the lower laser hole of the multiple buried vias at the test point corresponds to a second pad. The first pad and the second pad connected to the test point of the buried via are both rectangular pads.
[0018] Optionally, the test points where buried hole 1, buried hole 2, and buried hole 3 are located are connected in a daisy chain manner.
[0019] Optionally, the size of the test attachment plate is such that at least two test attachment plates are tested simultaneously in the test equipment.
[0020] Optionally, the test attachment board is 30 mm long and 6 mm wide, and the number of stacked via layers is the same as the number of stacked via layers on the PCB board.
[0021] Optionally, the distance between the projections of the center points of the upper laser aperture and the buried aperture included in the test point is 0.35 mm, and the distance between the projections of the center points of the lower laser aperture and the buried aperture included in the test point is 0.35 mm.
[0022] The axial distance between two adjacent buried holes in the length direction is 1 mm, and the axial distance between two adjacent buried holes in the width direction is 0.8 mm; the axial distance between two adjacent upper laser holes in the length direction is 1 mm, and the axial distance between two adjacent upper laser holes in the width direction is 0.8 mm.
[0023] Compared with the prior art, the present invention has the following beneficial effects:
[0024] This utility model provides a test attachment board, disposed on the edge of a PCB board, including a buried via layer, a solder mask layer, an upper laser via layer, and a lower laser via layer. The upper laser via layer above the buried via layer includes multiple upper laser vias; the lower laser via layer below the buried via layer includes multiple lower laser vias; the buried via layer includes multiple buried vias; a first pad is provided on the upper side of the uppermost upper laser via layer corresponding to the upper laser vias, and a second pad is provided on the lower side of the lowermost lower laser via layer corresponding to the lower laser vias; the top solder mask layer has a first open pad connected to the first pad, and the bottom solder mask layer has a second open pad connected to the second pad, allowing for convenient and quick inspection of via cracks through the open points. In a projection perpendicular to the buried via layer, each buried via corresponds to an upper laser via and a lower laser via to form a test point. The upper and lower laser vias in each test point are located on both sides of the buried via and are electrically connected to the buried via. In this way, the layout of laser holes electrically connected to buried vias in actual PCB production is simulated, and open pads are set on the outside of the test attachment board to enable users to easily and quickly complete the data acquisition and detection of hole cracks. Attached Figure Description
[0025] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0026] Figure 1 This is a schematic diagram of the structure of a test attachment plate according to the present invention;
[0027] Figure 2 This is a top view schematic diagram of a test attachment plate according to the present invention;
[0028] Figure 3 This is a schematic diagram of a PCB board stack-up according to the present invention;
[0029] Figure 4 This is a schematic diagram of a copper structure located on the uppermost laser hole layer, as shown in this utility model.
[0030] Figure 5 This is a schematic diagram of a copper structure located below the lowest laser hole layer as shown in this utility model;
[0031] Figure 6 This is a schematic diagram of the first opening pad structure of the top solder mask layer according to the present invention.
[0032] Figure 7 This is a schematic diagram of the second opening pad structure of the bottom solder mask layer according to the present invention.
[0033] Figure 8 This is a schematic diagram of a structure for electrical connection between an upper laser hole and a buried hole, as shown in this utility model;
[0034] Figure 9 This is a schematic diagram of a structure for electrical connection between a lower laser aperture and a buried hole, as shown in this utility model.
[0035] Figure 10 This is a schematic diagram showing the arrangement of the upper laser hole, the buried hole, and the lower laser hole according to this utility model;
[0036] Figure 11 This is a schematic diagram showing the center points of the upper laser aperture, the buried aperture, and the lower laser aperture projected onto a straight line, as shown in this utility model.
[0037] Figure 12 This is a schematic diagram of the AA cross-section shown in this utility model;
[0038] Figure 13 This is a schematic diagram of the cross-section of a sample before and after a wire breakage test, as shown in this utility model.
[0039] Figure 14 This is a comparative schematic diagram showing the cyclic processes of qualified sample 1, qualified sample 2, and abnormal sample 3 as shown in this utility model.
[0040] 11-Upper laser hole; 12-Buried hole; 13-Lower laser hole; 14-Upper laser hole pad; 15-Upper rectangular pad; 16-First lead; 17-Lower laser hole pad; 18-Lower rectangular pad; 19-Second lead. Detailed Implementation
[0041] As described above, via cracks are common in printed circuit boards (PCBs). Because the via cracks are embedded in the inner layers, they are difficult to observe visually. Reliability tests such as interconnection test (IST), thermal shock test, and high temperature test can effectively detect via cracks, but the test time is long.
[0042] Therefore, this application designs a test attachment board, disposed on the edge of a PCB board, including a buried via layer, a solder mask layer, an upper laser via layer, and a lower laser via layer. In the projection perpendicular to the buried via layer, each buried via 12 corresponds to an upper laser via 11 and a lower laser via 13 to form a test point. The upper laser via 11 and the lower laser via 13 in each test point are located on both sides of the buried via 12 of the test point and are electrically connected to the buried via 12, simulating the situation where laser vias electrically connected to buried vias are arranged around the buried vias in the PCB board. Furthermore, a first pad is provided on the upper side of the upper laser via layer corresponding to the upper laser via 11, and a second pad is provided on the lower side of the lower laser via layer corresponding to the lower laser via 13. The top solder mask layer is provided with a first open pad connected to the first pad, and the bottom solder mask layer is provided with a second open pad connected to the second pad, which allows for convenient and quick inspection of via cracks through the open points. In this way, laser holes that are electrically connected are placed on the edge of the PCB board and arranged around the buried vias to simulate the situation in actual PCB board production where laser holes electrically connected to buried vias are arranged around the buried vias. Open pads are set on the outside of the test attachment board so that users can easily and quickly complete the data acquisition and detection of hole cracks.
[0043] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0044] See Figure 1 The diagram shows a structural schematic of a test attachment plate and see also... Figure 2 The diagram shows a top view of a test attachment board, which is disposed on the edge of a PCB board and includes a buried via layer, a solder mask layer, an upper laser via layer, and a lower laser via layer.
[0045] It should be noted that the test attachment board is designed based on the number of stacked via layers of the PCB board it is attached to. The number of stacked via layers of the test attachment board is the same as the number of stacked via layers of the PCB board. The PCB board can have multiple stacked via layers, for example, see [link to relevant documentation]. Figure 3 The diagram shown is a schematic of a PCB board stack-up. Figure 3 The PCB in (a) has 10 layers. Figure 3 (b) has 12 PCB layers. Figure 3 (c) has 14 PCB layers.
[0046] In this application, the buried via layer is disposed in the middle of the test attachment plate, the upper laser via layer is located above the buried via layer, the lower laser via layer is located below the buried via layer, and the solder resist layer includes a solder resist layer located on the top layer of the test attachment plate and a solder resist layer located on the bottom layer of the test attachment plate.
[0047] The upper laser aperture layer located above the buried via layer includes a plurality of upper laser apertures 11; the lower laser aperture layer located below the buried via layer includes a plurality of lower laser apertures 13; and the buried via layer includes a plurality of buried vias 12.
[0048] Optionally, the upper laser hole 11 and the lower laser hole 13 are designed to be the same size as the laser holes (LVH) on the PCB board, and the buried vias (BVH) are designed to be the same size as the buried vias on the PCB board.
[0049] The top layer of upper laser hole layer has a first pad corresponding to the upper laser hole, and the bottom layer of lower laser hole layer has a second pad corresponding to the lower laser hole. The top layer of solder mask layer has a first open pad connected to the first pad, and the bottom layer of solder mask layer has a second open pad connected to the second pad.
[0050] The topmost laser hole layer has a first pad corresponding to the laser hole on its upper side. For example, see [link to example]. Figure 4 The diagram shows a copper structure located above the top laser-etched via layer, wherein the first pad may include Figure 4 The upper laser hole pad 14 (with a size of Ø 0.2mm) corresponding to the upper laser hole setting can also include... Figure 4 The upper rectangular pad 15 (with dimensions of 4.5x1.85mm) is located on one side. The upper rectangular pad 15 can be used to connect a test instrument to collect data such as resistance later.
[0051] A second pad is provided on the lower side of the bottommost laser hole layer, corresponding to the bottom laser hole. For example, see [link to example]. Figure 5 The diagram shows a copper structure located below the bottommost lower laser via layer. The second pad may include a lower laser via pad 17 (with a size of Ø 0.2mm) corresponding to the lower laser via and located on... Figure 5 The lower rectangular pad 18 shown on one side (the size can be 4.5x1.85mm).
[0052] The top solder mask layer has a first open pad that is connected to the first pad. For example, see [link to example]. Figure 6The diagram shows a first open pad structure of a top solder mask layer. The first open pad may include an upper rectangular pad (4.6x2.0mm in size) provided corresponding to the upper rectangular pad 15 in the first pad and an upper laser hole pad (0.35mm in size) provided corresponding to the upper laser hole pad 14 in the first pad.
[0053] The bottom solder mask layer is disposed on the second open pad corresponding to the second pad. For example, see [link to example]. Figure 7 The diagram shows a second open pad structure for a bottom solder mask layer. The second open pad may include a lower rectangular pad (4.6 x 2.0 mm in size) provided corresponding to the lower rectangular pad 18 in the second pad and a lower laser hole pad (0.35 mm in size) provided corresponding to the lower laser hole pad 17 in the second pad.
[0054] In the projection perpendicular to the buried via layer, each buried via corresponds to an upper laser hole and a lower laser hole to form a test point. The upper laser hole and the lower laser hole in each test point are located on both sides of the buried via at the test point and are electrically connected to the buried via.
[0055] The upper and lower laser apertures at each test point are located on either side of the buried aperture at that test point. For example, see [link to example]. Figure 8 The diagram shows a structure for electrical connection between an upper laser-etched hole and a buried hole. Figure 9 The diagram shows a structure in which the lower laser aperture and the buried via are electrically connected. The upper laser aperture is located on the upper left side of the buried via, while the lower laser aperture is located on the lower right side of the buried via.
[0056] Based on the aforementioned test attachment board, the arrangement of test points can take many forms, such as matrix arrangement, circular array arrangement, or manually set arrangement. The following explanation uses a rectangular array arrangement as an example.
[0057] In one specific implementation, the buried vias include a plurality of buried vias I evenly distributed in a rectangular array, and buried vias II and III located outside the plurality of buried vias I.
[0058] The test points for multiple buried holes are arranged in a rectangular array.
[0059] Understandable, see Figure 10 The diagram shows an arrangement of upper laser apertures, buried apertures, and lower laser apertures. Each buried aperture 1 corresponds to one upper laser aperture 11, forming a rectangular array of multiple upper laser apertures 11. Each buried aperture 1 corresponds to one lower laser aperture 13, forming a rectangular array of multiple lower laser apertures 13. Similarly, one buried aperture 2 corresponds to one upper laser aperture and one lower laser aperture, and one buried aperture 3 corresponds to one upper laser aperture and one lower laser aperture.
[0060] The test points where the multiple buried holes are located are connected in a daisy chain to form a link. The first end of the link is electrically connected to the test point where the buried hole is located, and the last end of the link is connected to the test point where the buried hole is located.
[0061] Multiple buried vias can be electrically connected at their test points using a daisy-chain method, as follows: Figure 4 and Figure 5 As shown, multiple upper laser hole pads 14 and multiple lower laser hole pads 17 are interleaved through the first lead 16 and the second lead 19, respectively, so that the test points where multiple buried holes are located form a single-loop hole chain.
[0062] Optionally, for each buried via, the upper laser hole at the test point corresponds to a first pad, and the lower laser hole corresponds to a second pad. The first and second pads connected to the test point where the buried via is located are both laser hole pads, such as the pads with a size of Ø 0.2mm mentioned above.
[0063] There are multiple buried vias. The upper laser hole of the multiple buried vias at the test point corresponds to a first pad, and the lower laser hole of the multiple buried vias at the test point corresponds to a second pad. The first pad and the second pad connected to the test point of the buried via are both rectangular pads, such as the pads with a size of 4.5x1.85mm mentioned above.
[0064] There are multiple buried vias. The upper laser hole of the multiple buried vias at the test point corresponds to a first pad, and the lower laser hole of the multiple buried vias at the test point corresponds to a second pad. The first pad and the second pad connected to the test point of the buried via are both rectangular pads, such as the pads with the size of 4.5x1.85mm mentioned above.
[0065] Multiple buried vias 2 and 3 are set up to minimize the risk of an abnormality in one buried via affecting the resistance measurement of the subsequent rectangular pad connection.
[0066] Optionally, the test points containing buried via 1, buried via 2, and buried via 3 are connected in a daisy-chain configuration. Understandably, the upper laser holes corresponding to the multiple buried vias connected in the daisy-chain configuration are connected to the same upper rectangular pad, which in turn connects to the corresponding upper rectangular pad in the solder mask layer, such as... Figure 6 The upper rectangular pad shown can be 4.6 x 2.0 mm. Multiple buried vias connected in a daisy chain have their corresponding lower laser holes connected to the same lower rectangular pad, which in turn connects to the corresponding lower rectangular pad in the solder mask layer. Figure 7 The lower rectangular pad shown can be 4.6 x 2.0 mm. Similarly, the upper laser holes of multiple buried vias connected in a daisy chain are connected to the same upper rectangular pad, which is connected to the corresponding upper rectangular pad in the solder mask layer, such as... Figure 6 The upper rectangular pad shown can be 4.6 x 2.0 mm. Multiple buried vias connected in a daisy chain have their corresponding lower laser vias connected to the same lower rectangular pad, which in turn connects to the corresponding lower rectangular pad in the solder mask layer, as shown below. Figure 7 The dimensions of the lower rectangular pad shown can be 4.6 x 2.0 mm.
[0067] Subsequent resistance testing instruments can be connected to the upper rectangular pads connected to buried via 2 and buried via 3 to obtain data.
[0068] Based on the aforementioned test attachment board, this application places the test attachment board on the edge of the PCB board, and arranges electrically connected laser holes around the buried vias. The design of the test attachment board is as close as possible to the material, layer design, thickness, and hole design of the PCB board, simulating the situation in actual PCB board production where the laser holes electrically connected to the buried vias are arranged around the buried vias. Open pads are set on the outside of the test attachment board, and multiple test points are connected in series by a daisy chain, so that users can easily and quickly complete the data acquisition and detection of hole cracks. In addition, rectangular pads and rectangular solder pads are designed to increase the contact area of the signal acquisition end of the resistance testing instrument and maintain the stable measurement and acquisition of electrical parameter data.
[0069] Based on the above embodiments, see Figure 11 The diagram shows a scenario where the center points of the upper laser aperture, the buried aperture, and the lower laser aperture are projected onto a straight line. The test point includes the center points of the upper laser aperture 11, the buried aperture 12, and the lower laser aperture 13, which are projected onto a straight line.
[0070] The projection line connecting the center points of the upper laser hole 11, buried hole 12, and lower laser hole 13 at each test point is parallel to the projection line connecting the center points of the upper laser hole 11, buried hole 12, and lower laser hole 13 at other test points. This uniform distribution increases the hole density on the test attachment plate, increases the number of holes, and better simulates the situation where the hole spacing is small in reality, thereby increasing the probability of detecting faults.
[0071] Optionally, to increase the hole density, the angle between the projection line connecting the center points of the upper laser hole 11, the buried hole 12, and the lower laser hole 13 (including the test point) and the side of the test attachment plate can be acute. This tilted arrangement makes the arrangement more compact, increases the hole density, and improves the probability of detecting faults.
[0072] For an example, see the specific hole spacing. Figure 10The distance between the projections of the center points of the upper laser aperture 11 and the buried aperture 12 included in the test point is 0.35 mm, and the distance between the projections of the center points of the lower laser aperture 13 and the buried aperture 12 included in the test point is 0.35 mm; the axial distance between two adjacent buried apertures 12 in the length direction is 1 mm, and the axial distance between two adjacent buried apertures 12 in the width direction is 0.8 mm; the axial distance between two adjacent upper laser apertures 11 in the length direction is 1 mm, and the axial distance between two adjacent upper laser apertures 11 in the width direction is 0.8 mm; the axial distance between two adjacent lower laser apertures 13 in the length direction is 1 mm, and the axial distance between two adjacent lower laser apertures 13 in the width direction is 0.8 mm.
[0073] Based on the above embodiments, each buried hole corresponds to an upper laser hole and a lower laser hole to form a test point, which can be referred to as... Figure 12 The diagram shows a cross-sectional view of section AA.
[0074] The upper laser aperture layer described in this application includes multiple layers, and the upper laser aperture in each upper laser aperture layer is coaxial with and electrically connected to the corresponding upper laser aperture in the adjacent upper laser aperture layer.
[0075] The lower laser aperture layer comprises multiple layers, and the lower laser apertures in each lower laser aperture layer are coaxial and electrically connected with the corresponding lower laser apertures in adjacent lower laser aperture layers.
[0076] Understandably, the dimensions, PCB materials, layer stack-up design, and thickness of the laser holes 11, lower laser holes 13, and buried holes 12 on the test attachment board correspond to the PCB board on which they are located.
[0077] Optionally, the size of the test attachment plate is such that at least two of the test attachment plates are tested simultaneously in the test equipment.
[0078] For example, if the testing equipment is a silicone oil furnace with limited internal space, and we need to test five samples per day, we can perform more than 50 cycles of testing two samples in parallel to meet this requirement. This allows us to complete the testing in three rounds per day, shortening the testing time and improving testing efficiency.
[0079] Optionally, the test attachment plate in this application is 30 mm long and 6 mm wide.
[0080] Based on the above-described test attachment board, specific test steps may include:
[0081] Step 1: Test the initial resistance of the sample.
[0082] Step 2: Bake the sample at 130℃ for 3 hours.
[0083] Step 3: Immerse the sample in a hot oil bath (260℃~265℃) for 30 seconds in a silicone oil furnace, transfer the sample for 15 seconds, immerse the sample in a cold oil bath (5℃~35℃) for 30 seconds, and continuously measure the resistance of the sample through an online resistance recorder connected to the silicone oil furnace.
[0084] Step 4: After the sample is transferred between the hot oil bath and the cold oil bath of the silicone oil furnace for the target number of cycles in Step 3 (e.g., 50 times), the resistance of the sample is measured and the rate of change of the sample resistance is calculated.
[0085] The test pass standard is that the resistance change rate must be less than or equal to 10%.
[0086] In one test, qualified sample 1 and qualified sample 2 were used to perform the tests described in steps 1-4 above. Sample 1 showed a broken wire after 2684 cycles. (Furthermore, a cross-sectional inspection can be performed to confirm that cracks appeared in the hole wall of sample 1, such as...) Figure 13 The diagram shows the cross-sectional views of sample 1 before and after the wire breakage test, while sample 2 showed no fault after 3000 cycles. The test table is as follows:
[0087]
[0088] However, when the abnormal sample 3 was tested using steps 1-4 above, sample 3 experienced a wire breakage on the 21st cycle, significantly reducing the number of cycles. See details below. Figure 14 The diagram shows a comparison of the cyclic processes for each of the qualified sample 1, qualified sample 2, and abnormal sample 3. Figure 14 (a) shows that sample 1 experienced an abnormal line breakage during the 2684th cycle. Figure 14 (b) shows that sample 2 showed no abnormalities after the 3000th cycle. Figure 14 (c) shows that sample 3 showed an anomaly when it was circulated to the 21st cycle.
[0089] The resistance of the sample is continuously measured via an online resistance recorder connected to a silicone oil furnace. If the resistance change rate is >10% according to the online resistance measurement, it indicates a failure. Cross-sectional analysis is not required to check for the fault.
[0090] The above method for measuring resistance involves measuring the resistance of the sample with a milliohm meter before and after the test, thereby calculating the rate of change of resistance after the test.
[0091] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0092] The above description of the disclosed embodiments enables those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A test attachment board, disposed on the edge of a PCB board, characterized in that, Includes buried via layer, solder mask layer, upper laser via layer and lower laser via layer; The upper laser aperture layer located above the buried via layer includes multiple upper laser apertures; the lower laser aperture layer located below the buried via layer includes multiple lower laser apertures; the buried via layer includes multiple buried vias. The top layer of upper laser hole layer has a first pad corresponding to the upper laser hole, and the bottom layer of lower laser hole layer has a second pad corresponding to the lower laser hole. The top layer of solder mask layer has a first open pad connected to the first pad, and the bottom layer of solder mask layer has a second open pad connected to the second pad. In the projection perpendicular to the buried via layer, each buried via corresponds to an upper laser hole and a lower laser hole to form a test point. The upper laser hole and the lower laser hole in each test point are located on both sides of the buried via at the test point and are electrically connected to the buried via.
2. The test attachment plate according to claim 1, characterized in that, The upper laser aperture layer comprises multiple layers, and the upper laser apertures in each upper laser aperture layer are coaxial and electrically connected with the corresponding upper laser apertures in adjacent upper laser aperture layers. The lower laser aperture layer comprises multiple layers, and the lower laser apertures in each lower laser aperture layer are coaxial and electrically connected with the corresponding lower laser apertures in adjacent lower laser aperture layers.
3. The test attachment plate according to claim 2, characterized in that, The center points of the upper laser aperture, buried aperture, and lower laser aperture included in the test point are projected onto a straight line; the line connecting the projected center points of the upper laser aperture, buried aperture, and lower laser aperture included in each test point is parallel to the line connecting the projected center points of the upper laser aperture, buried aperture, and lower laser aperture included in other test points.
4. The test attachment plate according to claim 3, characterized in that, The angle between the projection line connecting the center points of the upper laser hole, the buried hole, and the lower laser hole of the test point and the side of the test attachment plate is an acute angle.
5. The test attachment plate according to claim 1, characterized in that, The buried holes include a plurality of buried holes one evenly distributed in a rectangular array, and buried holes two and three located outside the plurality of buried holes one; The test points where the multiple buried holes are located are connected in a daisy chain to form a link. The first end of the link is electrically connected to the test point where the buried hole is located, and the last end of the link is connected to the test point where the buried hole is located.
6. The test attachment plate according to claim 5, characterized in that, Each buried via has an upper laser hole corresponding to a first pad and a lower laser hole corresponding to a second pad at the test point. The first and second pads connected to the test point of the buried via are both laser hole pads. There are multiple buried vias. The upper laser hole of the multiple buried vias at the test point corresponds to a first pad, and the lower laser hole of the multiple buried vias at the test point corresponds to a second pad. The first pad and the second pad connected to the test point where the buried via is located are both rectangular pads. There are multiple buried vias. The upper laser hole of the multiple buried vias at the test point corresponds to a first pad, and the lower laser hole of the multiple buried vias at the test point corresponds to a second pad. The first pad and the second pad connected to the test point of the buried via are both rectangular pads.
7. The test attachment plate according to claim 6, characterized in that, The test points located at buried hole 1, buried hole 2, and buried hole 3 are connected in a daisy chain manner.
8. The test attachment plate according to claim 1, characterized in that, The dimensions of the test attachment plate are such that at least two test attachment plates are tested simultaneously in the test equipment.
9. The test attachment plate according to claim 1, characterized in that, The test attachment board is 30 mm long and 6 mm wide, and the number of stacked via layers is the same as that of the PCB board it is on.
10. The test attachment plate according to claim 3, characterized in that, The distance between the projections of the center points of the upper laser aperture and the buried aperture included in the test point is 0.35 mm, and the distance between the projections of the center points of the lower laser aperture and the buried aperture included in the test point is 0.35 mm. The axial distance between two adjacent buried holes in the length direction is 1 mm, and the axial distance between two adjacent buried holes in the width direction is 0.8 mm; the axial distance between two adjacent upper laser holes in the length direction is 1 mm, and the axial distance between two adjacent upper laser holes in the width direction is 0.8 mm.