Dynamic difference loading circuit

By using the digital-to-analog conversion, comparison, and MOSFET control circuits in the dynamic differential load circuit, the shortcomings of existing DC control circuits in high-power and high-current control are solved, dynamic balance control of input current is achieved, and the upper limit of current testing is increased.

CN223798126UActive Publication Date: 2026-01-13QINGDAO RUIJIE INTELLIGENT EQUIP CO LTD
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Patent Information

Application Number
CN202520001732.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-01-02
Publication Date
2026-01-13
Estimated Expiration
2035-01-02

AI Technical Summary

Technical Problem

Existing DC control circuits are inadequate in terms of high power and high current control, failing to meet market demands, especially when multiple power supplies need to be controlled simultaneously or when high current load control is required, their practicality is poor.

Method used

A dynamic differential load circuit is adopted, including a digital-to-analog conversion circuit, a comparator circuit, a startup circuit, and a MOSFET control circuit. The comparator circuit amplifies the voltage difference to control the on/off state of the MOSFET, and a second operational amplifier is used to control multiple MOSFETs, thereby increasing the test range.

Benefits of technology

It achieves dynamic balance control of input current, increases the upper limit of current testing, and meets the market demand for high power and high current control.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a dynamic difference loading circuit, which relates to the technical field of direct current control circuits and comprises a digital-to-analog conversion circuit, a comparison circuit, a starting circuit and a metal oxide semiconductor (MOS) tube control circuit, one end of the digital-to-analog conversion circuit is connected with the comparison circuit, one end of the comparison circuit is connected with the starting circuit, and one end of the starting circuit is connected with the MOS tube control circuit. According to the utility model, the structure is scientific and novel, the digital-to-analog conversion circuit, the comparison circuit, the starting circuit and the MOS tube control circuit are utilized, the current firstly flows through the comparison circuit, the starting circuit controls the starting and stopping of an instrument, the MOS tube control circuit controls the actual flowing value of the current after starting, and finally the current returns to the comparison circuit to form continuously-controlled dynamic balance, so that the dynamic balance is realized. And the on-off degree of the MOS tube is controlled by amplifying the voltage difference through the comparison circuit, so that the MOS tube is always in a dynamic working state, thereby ensuring that the load pulling current is maintained in a dynamic balance state.
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Description

Technical Field

[0001] This utility model relates to the field of DC control circuit technology, and more specifically, to a dynamic differential load circuit. Background Technology

[0002] With the rapid development of electronic technology, DC power supply control systems are being used more and more widely in industrial production, scientific research, and daily life. The performance of DC power supply control systems directly affects the working efficiency and reliability of various electronic devices, among which current control accuracy and power output range are important indicators for measuring system performance.

[0003] Currently, most commercially available DC control circuits use MOSFETs as the core control element, achieving precise control of the power supply output current by adjusting the on / off state of the MOSFETs. This control method has advantages such as fast response speed and high control accuracy, and has been widely used in various DC power supply control systems.

[0004] For example, Chinese patent CN216748572U discloses a low-dropout circuit, including: a first MOSFET, the drain of which is connected to the voltage input terminal; a second MOSFET, the drain of which is connected to the source of which is connected to the source of which is connected to the drain of which is connected to the source of which is connected to the source of which is connected to the source of which is connected to the voltage output terminal. This circuit can achieve a lower voltage drop and higher efficiency when the input voltage is close to or less than the set output voltage. However, in practical applications, this circuit has the following shortcomings: due to the design limitations of the circuit, the controllable power is generally low, and the current it can handle is small, failing to meet the current market demand for high-power, high-current control. Especially when multiple power supplies need to be controlled simultaneously or when high-current load control is required, the performance of this circuit may not meet the practical application requirements, resulting in poor practicality.

[0005] No effective solutions have yet been proposed to address the problems in the relevant technologies. Utility Model Content

[0006] In view of the problems in the related technologies, this utility model proposes a dynamic differential load circuit to overcome the above-mentioned technical problems existing in the existing related technologies.

[0007] Therefore, the specific technical solution adopted by this utility model is as follows:

[0008] A dynamic differential load circuit includes a digital-to-analog converter circuit, a comparator circuit, a startup circuit, and a MOSFET control circuit. The digital-to-analog converter circuit is connected to the comparator circuit at one end, the comparator circuit is connected to the startup circuit at one end, and the startup circuit is connected to the MOSFET control circuit at one end.

[0009] Furthermore, the digital-to-analog converter circuit includes a digital-to-analog converter. The seventh pin of the digital-to-analog converter is connected to the PB14 port of the microcontroller, the eighth pin of the digital-to-analog converter is connected to the PB15 port of the microcontroller, the ninth pin of the digital-to-analog converter is connected to the PB13 port of the microcontroller, the tenth pin of the digital-to-analog converter is connected to the PF0 port of the microcontroller, the eleventh pin of the digital-to-analog converter is connected to the PF3 port of the microcontroller, the twelfth pin of the digital-to-analog converter is connected to the PF1 port of the microcontroller, and the thirteenth pin of the digital-to-analog converter is connected to the PF4 port of the microcontroller.

[0010] Furthermore, the sixth pin of the digital-to-analog converter (DAC) is grounded through capacitor C97, and the twentieth pin is grounded through capacitor C95. Both the sixth and twentieth pins are connected to the positive terminal of the first power supply. The first and second pins of the DAC are both connected to the first reference voltage source, and both the first and second pins are connected to capacitor C99, which is grounded. The third, fourth, fourteenth, eighteenth, and nineteenth pins of the DAC are all grounded. The sixteenth and seventeenth pins of the DAC are connected to the comparator circuit.

[0011] Furthermore, the comparator circuit includes a first operational amplifier. The second pin of the first operational amplifier is connected to one end of resistor R102, and the other end of resistor R102 is connected to a voltage divider. The third pin of the first operational amplifier is connected to one end of resistor R107, and the other end of resistor R107 is connected to one end of resistor R108 and capacitor C37. Capacitor C37 is grounded, and the other end of resistor R108 is connected to the digital-to-analog converter circuit. The seventh pin of the first operational amplifier is connected to a second reference voltage source and is grounded through capacitor C29. The fourth pin of the first operational amplifier is connected to a third reference voltage source and is grounded through capacitor C50. The second pin of the first operational amplifier is connected to one end of a secondary filter circuit, and the other end of the secondary filter circuit is connected to the sixth pin of the first operational amplifier. The sixth pin of the first operational amplifier is connected to a startup circuit. The secondary filter circuit includes capacitor C32, resistor R92, and capacitor C33, with one end of capacitor C32 connected in series with one end of resistor R92 and then connected in parallel with capacitor C33.

[0012] Furthermore, the startup circuit includes a transistor Q15, the base of which is connected to one end of a resistor R116, the emitter of which is grounded, and the collector of which is connected to one end of a resistor R110. The other end of the resistor R110 is connected to a first voltage divider circuit, and the other end of the first voltage divider circuit is connected to a comparator circuit. The first voltage divider circuit includes resistors R91 and R96, which are connected in parallel.

[0013] Furthermore, the startup circuit also includes a transistor Q14. The collector of transistor Q14 is connected to one end of the first voltage divider circuit and the MOSFET control circuit, respectively. The base of transistor Q14 is connected to the second voltage divider circuit, and the emitter of transistor Q14 is grounded. One end of the second voltage divider circuit is grounded through capacitor C36, and the other end of the second voltage divider circuit is connected to resistor R94. The second voltage divider circuit includes resistor R106, resistor R105, and diode D16. Resistor R105 and diode D16 are connected in parallel and then connected in series with one end of resistor R106.

[0014] Furthermore, the MOS transistor control circuit includes a second operational amplifier. The first pin of the second operational amplifier is connected to one end of resistor R3. The second pin of the second operational amplifier is connected to one end of the first filter circuit and resistor R14. The other end of the first filter circuit is connected to the first pin of the second operational amplifier. The first filter circuit includes capacitor C31 and resistor R9, and capacitor C31 and resistor R9 are connected in parallel. The third pin of the second operational amplifier is connected to resistor R1 and resistor R4. One end of resistor R4 is grounded. Resistor R1 is connected to resistor R2 and the startup circuit. The fourth pin of the second operational amplifier is grounded through capacitor C1. One end of capacitor C1 is connected to capacitor C4.

[0015] Furthermore, the eighth pin of the second operational amplifier is connected to the positive terminal of the second power supply, and the fourth pin of the second operational amplifier is connected to the negative terminal of the power supply; the seventh pin of the second operational amplifier is connected to one end of the second filter circuit, and the other end of the second filter circuit is connected to one end of resistor R6; the sixth pin of the second operational amplifier is connected to one end of the second filter circuit and one end of resistor R20; the other end of resistor R6 is connected to the anode of the first diode D29, the cathode of the first diode D29 is connected to the cathode of the second diode D28, the anode of the second diode D28 is connected to the anode of the third diode D2, and the other end of resistor R20 is connected to the cathode of the third diode D2; the second filter circuit includes capacitor C27 and resistor R11, and capacitor C27 and resistor R11 are connected in parallel; the fifth pin of the second operational amplifier is connected to resistors R7 and R2, and one end of resistor R7 is grounded.

[0016] The beneficial effects of this utility model are as follows:

[0017] (1) The present invention has a scientific and novel structure. It utilizes the switching principle of MOSFETs and uses a comparison circuit to amplify the voltage difference to control the switching degree of MOSFETs, so that the MOSFETs are always in a dynamic working state, thereby ensuring that the load current is maintained in a dynamic balance state. At the same time, since a second operational amplifier is used for signal amplification, the function of one operational amplifier controlling multiple MOSFETs can be realized, which greatly improves the test range, increases the upper limit of the instrument's test, and better meets market demand.

[0018] (2) The input current is controlled by the digital-to-analog converter circuit, the comparator circuit, the start-up circuit and the MOS transistor control circuit. The current first flows through the comparator circuit, and the start-up circuit controls the start and stop of the instrument. After the start-up, the MOS transistor is controlled by the MOS control circuit to control the on and off of the MOS transistor, thereby controlling the actual value of the current flow. Finally, it returns to the comparator circuit to form a dynamic balance of continuous control. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a circuit diagram of a dynamic differential load circuit according to an embodiment of the present utility model;

[0021] Figure 2 This is a circuit diagram of a digital-to-analog converter circuit in a dynamic differential load circuit according to an embodiment of the present invention;

[0022] Figure 3 This is a circuit diagram of the comparison circuit in a dynamic differential load circuit according to an embodiment of the present invention;

[0023] Figure 4 This is a circuit diagram of the starting circuit in a dynamic differential load circuit according to an embodiment of the present invention;

[0024] Figure 5 This is a circuit diagram of the MOS transistor control circuit in a dynamic differential load circuit according to an embodiment of the present invention.

[0025] In the picture:

[0026] 1. Digital-to-analog converter circuit; 2. Comparator circuit; 3. Start-up circuit; 4. MOSFET control circuit. Detailed Implementation

[0027] To further illustrate the various embodiments, the present invention provides accompanying drawings, which are part of the disclosure of the present invention. These drawings are mainly used to illustrate the embodiments and can be used in conjunction with the relevant descriptions in the specification to explain the operating principles of the embodiments. With reference to these contents, those skilled in the art should be able to understand other possible implementation methods and the advantages of the present invention. The components in the figures are not drawn to scale, and similar component symbols are usually used to represent similar components.

[0028] According to an embodiment of the present invention, a dynamic differential load circuit is provided.

[0029] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments, such as... Figures 1-5 As shown, the dynamic differential load circuit according to an embodiment of the present invention includes a digital-to-analog converter circuit 1, a comparator circuit 2, a startup circuit 3, and a MOS transistor control circuit 4. One end of the digital-to-analog converter circuit 1 is connected to the comparator circuit 2, one end of the comparator circuit 2 is connected to the startup circuit 3, and one end of the startup circuit 3 is connected to the MOS transistor control circuit 4.

[0030] With the help of the above-mentioned technical solution of this utility model, this utility model can realize the control of the input current through the digital-to-analog conversion circuit 1, the comparator circuit 2, the start-up circuit 3 and the MOS transistor control circuit 4. The current first flows through the comparator circuit 2, and the start-up circuit 3 controls the start and stop of the instrument. After the start-up, the MOS transistor control circuit 4 controls the on and off of the MOS transistor, thereby controlling the actual value of the current flowing through. Finally, it returns to the comparator circuit 2 to form a dynamic balance of continuous control.

[0031] In one embodiment, the digital-to-analog converter circuit 1 includes a digital-to-analog converter (in particular applications, the digital-to-analog converter is a DAC7631). The seventh pin of the digital-to-analog converter is connected to the PB14 port of the microcontroller, the eighth pin of the digital-to-analog converter is connected to the PB15 port of the microcontroller, the ninth pin of the digital-to-analog converter is connected to the PB13 port of the microcontroller, the tenth pin of the digital-to-analog converter is connected to the PF0 port of the microcontroller, the eleventh pin of the digital-to-analog converter is connected to the PF3 port of the microcontroller, the twelfth pin of the digital-to-analog converter is connected to the PF1 port of the microcontroller, and the thirteenth pin of the digital-to-analog converter is connected to the PF4 port of the microcontroller.

[0032] In one embodiment, pin 6 of the digital-to-analog converter (DAC) is connected to capacitor C97, which is grounded; pin 20 of the DAC is connected to capacitor C95, which is grounded; both pin 6 and pin 20 of the DAC are connected to the positive terminal of a first power supply (in addition, in a specific application, the positive terminal of the first power supply receives a 5V current); both pin 1 and pin 2 of the DAC are connected to a first reference voltage source (in addition, in a specific application, the reference voltage source VREF receives a +3.3V voltage); both pin 1 and pin 2 of the DAC are connected to capacitor C99, which is grounded; pins 3, 4, 14, 18, and 19 of the DAC are grounded; and pins 16 and 17 of the DAC are connected to a comparator circuit (in addition, in a specific application, pins 16 and 17 of the DAC are connected to resistor R108 in the comparator circuit).

[0033] The working principle of the digital-to-analog converter circuit 1 is as follows: The digital-to-analog converter used in this circuit is a DAC7631. Its pins 7, 8, 9, 10, 11, 12, and 13 need to be connected to the microcontroller's PB14, PB15, PB13, PF0, PF3, PF1, and PF4 ports. These pins belong to the digital signal section and are used to receive the digital signals converted by the microcontroller. Pins 6 and 20 of the digital-to-analog converter are connected to a +5V power supply. Pins 1 and 2 input a +3.3V voltage as the reference voltage VREF. Pins 2, 3, 4, 14, 18, and 19 are connected to ground, forming a complete power supply and grounding system. After receiving the digital signal from the microcontroller, the digital-to-analog converter internally converts it into an analog signal, and finally outputs the ISET signal through pins 16 and 17. This is the converted analog signal, which is connected to resistor R108 in the comparator circuit to provide control instructions for the subsequent comparator circuit.

[0034] Capacitors C95, C97, and C99 in the circuit are all non-polarized capacitors. Capacitor C95 is connected to pin 20 of the digital-to-analog converter, and capacitor C97 is connected to pin 6. These two capacitors are used for filtering the +5V power supply. Capacitor C99 is connected to the input terminal of the reference voltage +3.3V. These capacitors perform filtering functions, which can filter out interference signals and ensure the constantness of the power supply voltage and the reference voltage, thereby ensuring the accuracy and stability of the digital-to-analog conversion process and providing a reliable signal foundation for the normal operation of the entire dynamic differential load circuit.

[0035] In one embodiment, the comparator circuit 2 includes a first operational amplifier (in particular, the first operational amplifier is OP07), the second pin of the first operational amplifier is connected to one end of resistor R102, the other end of resistor R102 is connected to a voltage divider (in particular, the voltage divider inputs a current sampling signal U15-6), the third pin of the first operational amplifier is connected to one end of resistor R107, the other end of resistor R107 is connected to one end of resistor R108 and capacitor C37, capacitor C37 is grounded, and the other end of resistor R108 is connected to a digital-to-analog converter circuit; the seventh pin of the first operational amplifier is connected to a second reference voltage source (in particular, the second... The reference voltage source inputs +12V voltage. The seventh pin of the first operational amplifier is grounded through capacitor C29. The fourth pin of the first operational amplifier is connected to the third reference voltage source (in addition, in specific applications, the third reference voltage source inputs -12V voltage). The fourth pin of the first operational amplifier is grounded through capacitor C50. The second pin of the first operational amplifier is connected to one end of the secondary filter circuit. The other end of the secondary filter circuit is connected to the sixth pin of the first operational amplifier. The sixth pin of the first operational amplifier is connected to the startup circuit. The secondary filter circuit includes capacitor C32, resistor R92, and capacitor C33. One end of capacitor C32 is connected in series with one end of resistor R92 and then in parallel with capacitor C33.

[0036] The working principle of comparator circuit 2 is as follows: This circuit uses an OP07 type first operational amplifier U10 as the core component. Its second pin receives the current sampling signal U15-6 from the voltage divider through the protection resistor R102. This signal is the current value after the current collected by the acquisition circuit is converted by the voltage divider. The third pin of the first operational amplifier receives the ISET signal from the digital-to-analog converter circuit through the protection resistors R107 and R108. These protection resistors can prevent excessive current from damaging the operational amplifier.

[0037] The seventh and fourth pins of the first operational amplifier are connected to +12V and -12V reference voltage sources, respectively, to provide the operating voltage for the operational amplifier. The operational amplifier compares and amplifies the voltage difference inputs at the second and third pins, and after internal calculations, outputs a signal from the sixth pin to the startup circuit. The maximum and minimum values ​​of the output signal are +12V and -12V, respectively.

[0038] In addition, to ensure signal stability and reliability, a multi-stage filtering circuit is set in comparator circuit 2: capacitor C29 is connected to the +12V power supply terminal, capacitor C50 is connected to the -12V power supply terminal for power supply filtering; capacitor C37 is grounded for filtering the ISET signal; a secondary filtering circuit is also set between the second and sixth pins of the operational amplifier, consisting of capacitor C32 and resistor R92 connected in series and then in parallel with capacitor C33. This secondary filtering structure can more effectively remove interference signals and ensure the stability of the entire comparator circuit.

[0039] In one embodiment, the startup circuit 3 includes a transistor Q15 (in some applications, both Q14 and Q15 are NPN-BEC), the base of transistor Q15 is connected to one end of resistor R116 (in some applications, the other end of resistor R116 is connected to port PA1), the emitter of transistor Q15 is grounded, the collector of transistor Q15 is connected to one end of resistor R110, the other end of resistor R110 is connected to a first voltage divider circuit, and the other end of the first voltage divider circuit is connected to a comparator circuit (in some applications, the other end of the first voltage divider circuit is connected to the sixth pin of the first operational amplifier in the comparator circuit); the first voltage divider circuit includes resistors R91 and R96, and resistors R91 and R96 are connected in parallel.

[0040] In one embodiment, the startup circuit 3 further includes a transistor Q14. The collector of transistor Q14 is connected to one end of the first voltage divider circuit and the MOSFET control circuit, respectively. The base of transistor Q14 is connected to the second voltage divider circuit, and the emitter of transistor Q14 is grounded. One end of the second voltage divider circuit is grounded through capacitor C36, and the other end of the second voltage divider circuit is connected to resistor R94 (in addition, in a specific application, the other end of resistor R94 is connected to a 3.3V power supply). The second voltage divider circuit includes resistor R106, resistor R105, and diode D16, and resistor R105 and diode D16 are connected in parallel and then connected in series with one end of resistor R106.

[0041] The working principle of the starting circuit 3 is as follows: This circuit controls the start, stop and different working modes of the instrument by controlling the conduction and cutoff states of transistors Q14 and Q15.

[0042] When in low-current operating mode, the PA1 port outputs a low level (0), causing transistor Q15 to be cut off. At this time, the voltage signal output from pin 6 of the first operational amplifier in the comparator circuit forms the TPK voltage after passing through the parallel resistors R91 and R96 (the first voltage divider circuit). Since R91 and R96 do not produce a voltage divider effect at this time, the TPK voltage is equal to UGS1, and this voltage will flow directly to the subsequent MOSFET control circuit.

[0043] When operating in high-current mode, the PA1 port outputs a high level (1), turning on transistor Q15. At this time, resistor R110 forms a series connection with parallel resistors R91 and R96, creating a new voltage divider circuit. This voltage divider effect reduces the TPK voltage value, preventing excessive voltage generated by the high-current operation from damaging subsequent circuit components.

[0044] Regarding the instrument's startup control, when the PB5 port outputs a low level (0), transistor Q14 is in the off state, and the instrument operates normally, allowing the TPK voltage to be transmitted normally to subsequent circuits. Resistors R105 and R106 form a second voltage divider circuit, and through the unidirectional conduction characteristic of diode D16, ensure that there is no voltage interference when PB5 is low. When the PB5 port outputs a high level (1), transistor Q14 conducts, causing the TPK voltage to be grounded and become 0, thereby stopping the subsequent circuits and achieving instrument stop control. The function of capacitor C36 is to filter out interference from the PB5 signal and improve control stability.

[0045] In one embodiment, the MOSFET control circuit 4 includes a second operational amplifier (in particular, the second operational amplifier is an N5532C4). The first pin of the second operational amplifier is connected to one end of resistor R3 (in particular, the other end of resistor R3 is connected to the gate of the first MOSFET). The second pin of the second operational amplifier is connected to one end of the first filter circuit and resistor R14 (in particular, the other end of resistor R14 is connected to the source of the first MOSFET). The other end of the first filter circuit is connected to the first pin of the second operational amplifier. The first filter circuit includes capacitor C31 and resistor R9, and capacitor C31 and resistor R9 are connected in parallel. The third pin of the second operational amplifier is connected to resistors R1 and R4. One end of resistor R4 is grounded. Resistor R1 is connected to resistor R2 and the startup circuit (in particular, resistor R1 is connected to the collector of transistor Q14 in the startup circuit). The fourth pin of the second operational amplifier is grounded through capacitor C1, and one end of capacitor C1 is connected to capacitor C4.

[0046] In one embodiment, the eighth pin of the second operational amplifier is connected to the positive terminal of the second power supply (in addition, in a specific application, the positive terminal of the second power supply receives a +12V current), the fourth pin of the second operational amplifier is connected to the negative terminal of the power supply (in addition, in a specific application, the negative terminal of the power supply receives a -12V current); the seventh pin of the second operational amplifier is connected to one end of the second filter circuit, the other end of the second filter circuit is connected to one end of resistor R6 (in addition, in a specific application, the other end of resistor R6 is connected to the gate of the second MOSFET), and the sixth pin of the second operational amplifier is connected to both the second filter circuit and resistor R20. One end of resistor R20 is connected to the source of the second MOSFET (in addition, in specific applications, one end of resistor R20 is connected to the source of the second MOSFET); the other end of resistor R6 is connected to the anode of the first diode D29, the cathode of the first diode D29 is connected to the cathode of the second diode D28, the anode of the second diode D28 is connected to the anode of the third diode D2, and the other end of resistor R20 is connected to the cathode of the third diode D2; the second filter circuit includes capacitor C27 and resistor R11, and capacitor C27 and resistor R11 are connected in parallel; the fifth pin of the second operational amplifier is connected to resistors R7 and R2, and one end of resistor R7 is grounded.

[0047] The working principle of MOS transistor control circuit 4 is as follows: This circuit uses N5532C4 type second operational amplifier U1 as the core device, and its main function is to amplify the TPK signal. The operating power supply of operational amplifier U1 is provided by the +12V positive power supply connected to the eighth pin and the -12V negative power supply connected to the fourth pin.

[0048] The TPK signal is first divided by a voltage divider circuit consisting of resistors R2 and R7 before being input to operational amplifier U1. Operational amplifier U1 is designed to control two MOSFETs simultaneously, with the control circuits on its left and right sides operating independently. In the left control circuit, the operational amplifier controls the gate of the first MOSFET through resistor R3 and connects to its source through resistor R14. In the right control circuit, the operational amplifier controls the gate of the second MOSFET through resistor R6 and connects to its source through resistor R20. Operational amplifier U1 amplifies the input TPK voltage value; the amplified voltage value is the voltage difference between the gate and source of the MOSFETs (the difference between Q2-G and Q2-S).

[0049] To protect the MOSFETs from reverse voltage damage, the MOSFET control circuit 4 includes a unidirectional conduction protection circuit composed of diodes D2, D28, and D29. These three diodes are connected in series between the control circuits of the two MOSFETs, ensuring that voltage conduction is unidirectional and effectively preventing reverse voltage from breaking down the MOSFETs. Simultaneously, two sets of filter circuits are also included in the control circuit: the first filter circuit consists of a parallel capacitor C31 and a resistor R9, and the second filter circuit consists of a parallel capacitor C27 and a resistor R11. These filter circuits effectively suppress interference signals and ensure the stability of the MOSFET control.

[0050] In this utility model, unless otherwise explicitly specified and limited, the terms "installation", "setting", "connection", "fixing", "screw connection", etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components or the interaction between two components. Unless otherwise explicitly limited, those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0051] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A dynamic differential pull circuit, comprising: The application relates to a circuit, which comprises a digital-to-analog conversion circuit, a comparison circuit, a starting circuit and a MOS tube control circuit.

2. A dynamic differential pull circuit according to claim 1, wherein, The digital-to-analog conversion circuit comprises a digital-to-analog converter, the seventh pin of the digital-to-analog converter is connected with the PB14 port of a single-chip microcomputer, the eighth pin of the digital-to-analog converter is connected with the PB15 port of the single-chip microcomputer, the ninth pin of the digital-to-analog converter is connected with the PB13 port of the single-chip microcomputer, the tenth pin of the digital-to-analog converter is connected with the PF0 port of the single-chip microcomputer, the eleventh pin of the digital-to-analog converter is connected with the PF3 port of the single-chip microcomputer, the twelfth pin of the digital-to-analog converter is connected with the PF1 port of the single-chip microcomputer, and the thirteenth pin of the digital-to-analog converter is connected with the PF4 port of the single-chip microcomputer.

3. A dynamic difference pull circuit according to claim 2, wherein, The sixth pin of the digital-to-analog converter is grounded through a capacitor C97, the twentieth pin of the digital-to-analog converter is grounded through a capacitor C95, and the sixth pin and the twentieth pin of the digital-to-analog converter are connected with the positive pole of a first power supply; The first pin and the second pin of the digital-to-analog converter are connected with a first reference voltage source, the first pin and the second pin of the digital-to-analog converter are connected with a capacitor C99, and the capacitor C99 is grounded; The third pin, the fourth pin, the fourteenth pin, the eighteenth pin and the nineteenth pin of the digital-to-analog converter are grounded; The sixteenth pin and the seventeenth pin of the digital-to-analog converter are connected with the comparison circuit.

4. The dynamic differential pull circuit of claim 1, wherein, The comparison circuit comprises a first operational amplifier, the second pin of the first operational amplifier is connected with one end of a resistor R102, the other end of the resistor R102 is connected with a voltage divider, the third pin of the first operational amplifier is connected with one end of a resistor R107, the other end of the resistor R107 is connected with one end of a resistor R108 and a capacitor C37, the capacitor C37 is grounded, and the other end of the resistor R108 is connected with the digital-to-analog conversion circuit; The seventh pin of the first operational amplifier is connected with a second reference voltage source, the seventh pin of the first operational amplifier is grounded through a capacitor C29, the fourth pin of the first operational amplifier is connected with a third reference voltage source, and the fourth pin of the first operational amplifier is grounded through a capacitor C50; The second pin of the first operational amplifier is connected with one end of a two-stage filter circuit, the other end of the two-stage filter circuit is connected with the sixth pin of the first operational amplifier, and the sixth pin of the first operational amplifier is connected with the starting circuit. The two-stage filter circuit comprises a capacitor C32, a resistor R92 and a capacitor C33, one end of the capacitor C32 is connected with one end of the resistor R92 in series, and the capacitor C32 and the resistor R92 are connected with the capacitor C33 in parallel.

5. The dynamic differential pull circuit of claim 1, wherein, The starting circuit includes a transistor Q15, the base of the transistor Q15 is connected with one end of a resistor R116, the emitter of the transistor Q15 is grounded, the collector of the transistor Q15 is connected with one end of a resistor R110, the other end of the resistor R110 is connected with a first voltage dividing circuit, the other end of the first voltage dividing circuit is connected with the comparison circuit; The first voltage dividing circuit includes a resistor R91 and a resistor R96, and the resistor R91 and the resistor R96 are connected in parallel.

6. A dynamic difference pull circuit according to claim 5, wherein, The starting circuit further includes a transistor Q14, the collector of the transistor Q14 is connected with one end of the first voltage dividing circuit and the MOS tube control circuit respectively, the base of the transistor Q14 is connected with a second voltage dividing circuit, and the emitter of the transistor Q14 is grounded; One end of the second voltage dividing circuit is grounded through a capacitor C36, and the other end of the second voltage dividing circuit is connected with a resistor R94; The second voltage dividing circuit includes a resistor R106, a resistor R105 and a diode D16, and the resistor R105 and the diode D16 are connected in parallel and then connected in series with one end of the resistor R106.

7. The dynamic differential pull circuit of claim 1, wherein, The MOS tube control circuit includes a second operational amplifier, the first pin of the second operational amplifier is connected with one end of a resistor R3, the second pin of the second operational amplifier is connected with one end of a first filter circuit and a resistor R14 respectively, and the other end of the first filter circuit is connected with the first pin of the second operational amplifier; The first filter circuit includes a capacitor C31 and a resistor R9, and the capacitor C31 and the resistor R9 are connected in parallel. The third pin of the second operational amplifier is connected with a resistor R1 and a resistor R4, one end of the resistor R4 is grounded, and the resistor R1 is connected with a resistor R2 and the starting circuit respectively; The fourth pin of the second operational amplifier is grounded through a capacitor C1, and one end of the capacitor C1 is connected with a capacitor C4.

8. A dynamic difference pull circuit according to claim 7, wherein, The eighth pin of the second operational amplifier is connected with the positive pole of a second power supply, and the fourth pin of the second operational amplifier is connected with the negative pole of the power supply; The seventh pin of the second operational amplifier is connected with one end of a second filter circuit, the other end of the second filter circuit is connected with one end of a resistor R6, and the sixth pin of the second operational amplifier is connected with the second filter circuit and one end of a resistor R20 respectively; The other end of the resistor R6 is connected with the positive pole of a first diode D29, the negative pole of the first diode D29 is connected with the negative pole of a second diode D28, the positive pole of the second diode D28 is connected with the positive pole of a third diode D2, and the other end of the resistor R20 is connected with the negative pole of the third diode D2; The second filter circuit includes a capacitor C27 and a resistor R11, and the capacitor C27 and the resistor R11 are connected in parallel. The fifth pin of the second operational amplifier is connected with a resistor R7 and a resistor R2, and one end of the resistor R7 is grounded.

Citation Information

Patent Citations

  • Input and output low dropout circuit

    CN216748572U