Chip packaging unit for circuit board embedding
By employing a packaging structure that combines a rigid metal body with a semiconductor chip on a circuit board and filling the space between them with an insulating resin layer, the heat dissipation, protection, and reliability issues of high-power chip packaging for new energy vehicles have been solved, achieving high integration and low loss chip packaging.
Patent Information
- Application Number
- CN202423124206.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-18
- Publication Date
- 2026-01-13
- Estimated Expiration
- 2034-12-18
AI Technical Summary
Existing technologies are insufficient to meet the chip packaging requirements of new energy vehicles for high power, low loss, and high integration, and there are also problems with heat dissipation performance, mechanical stress, chip protection capabilities, and reliability.
The packaging structure combines a rigid metal body with a semiconductor chip. The chip's functionality is achieved by filling the space between the groove and the chip with an insulating resin layer, and the connection is made by metal interconnect layers such as silver, copper, and gold-tin alloy.
It improves the chip's protection capabilities, reduces overall costs, enhances reliability, isolates damage from ultraviolet radiation and moisture erosion, and strengthens the chip's durability and long-term storage.
Smart Images
Figure CN223798703U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to a chip packaging unit for embedded circuit board, belonging to the field of chip packaging technology. Background Technology
[0002] Electric drive inverters are a key component of the power system for new energy electric vehicles, and the power modules within them are crucial components that enable the inverters to convert direct current (DC) to alternating current (AC). Currently, the mainstream packaging method for power modules still follows the traditional chip packaging scheme, which is gradually failing to meet the development requirements of new energy vehicles for high power, low loss, and high integration.
[0003] Embedded circuit board packaging is considered one of the development directions for power modules. Power chips can be directly embedded in the circuit board of the electric drive controller to achieve high system integration, while greatly reducing overall parasitic parameters and power loss.
[0004] However, for the high power requirements of automobiles, directly embedding chips into circuit boards involves a series of limitations such as heat dissipation performance, mechanical stress, chip protection capabilities, process window, and reliability, and there are still great difficulties to overcome. Utility Model Content
[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a chip packaging unit for embedded in circuit boards, which can better realize the functional use of chips in circuit boards, strengthen chip protection capabilities, reduce overall costs, and improve reliability.
[0006] To achieve the above objectives, this utility model employs the following technical solution:
[0007] In a first aspect, this utility model provides a chip packaging unit for embedded in a circuit board, comprising:
[0008] A rigid metal body, the surface of which is machined with grooves for accommodating semiconductor chips;
[0009] A semiconductor chip is disposed in the groove. One side of the semiconductor chip is processed with a metal plating layer for connecting to a circuit board, and the other side is processed with a metal connection layer. The semiconductor chip is connected to a rigid metal body through the metal connection layer.
[0010] An insulating resin layer is provided, which fills the pores between the grooves of the rigid metal body and the semiconductor chip.
[0011] Furthermore, the semiconductor chip is connected to the rigid metal body via metal solder.
[0012] Furthermore, the metal bonding layer includes any one of silver, copper, and gold-tin alloy.
[0013] Furthermore, the size of the groove is larger than the size of the semiconductor chip.
[0014] Furthermore, the semiconductor chip is connected to the rigid metal body by any one of silver sintering, copper sintering, or diffusion bonding.
[0015] Furthermore, the insulating resin layer is flush with the surface of the rigid metal body.
[0016] Compared with the prior art, the beneficial effects achieved by this utility model are as follows:
[0017] This invention provides a chip packaging unit for embedded in a circuit board. By filling the gap between the groove of the rigid metal body and the semiconductor chip with an insulating resin layer, the chip can be better used in the circuit board. The coated insulating resin layer can isolate the chip from damage caused by ultraviolet radiation, moisture erosion, air oxidation, and ion contamination, increasing the chip's tolerance to the external environment and its long-term preservation. In addition, the coated resin material has a certain buffering effect, preventing large pressure from acting directly on the chip, playing a mechanical support role, strengthening the chip's protection capability, reducing the overall cost, and improving reliability. The insulating resin layer of this invention can also effectively avoid the problem of insufficient filling or too small process window caused by poor filling. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of the chip surface plating process provided in this embodiment of the utility model;
[0019] Figure 2 This is a schematic diagram of the rigid metal body processing provided in an embodiment of the present invention;
[0020] Figure 3 This is a schematic diagram showing the connection and fixation between the chip and the rigid metal body provided in this embodiment of the utility model;
[0021] Figure 4 This is a schematic diagram of the insulating resin coating and encapsulation provided in an embodiment of this utility model.
[0022] In the diagram: 1. Semiconductor chip; 2. Metal plating layer; 3. Metal interconnect layer; 4. Rigid metal body; 5. Insulating resin layer. Detailed Implementation
[0023] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.
[0024] In the description of this utility model, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this utility model, unless otherwise stated, "a plurality of" means two or more.
[0025] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0026] Example 1, such as Figures 1-4 As shown in the figure, this embodiment introduces a chip packaging unit for embedded circuit board, including: a rigid metal body 4, a semiconductor chip 1, and an insulating resin layer 5. The surface of the rigid metal body 4 is processed with a groove for accommodating the semiconductor chip 1; the size of the groove is larger than the size of the semiconductor chip 1; the semiconductor chip 1 is disposed in the groove, one side of the semiconductor chip 1 is processed with a metal plating layer 2 for connecting to the circuit board, and the other side is processed with a metal connection layer 3, the metal connection layer 3 including any one of silver, copper, and gold-tin alloy; the semiconductor chip 1 is connected to the rigid metal body 4 through the metal connection layer 3; the semiconductor chip 1 and the rigid metal body 4 are connected by metal solder; the semiconductor chip 1 and the rigid metal body 4 are connected by any one of silver sintering, copper sintering, and diffusion soldering; the insulating resin layer 5 fills the gap between the groove of the rigid metal body 4 and the semiconductor chip 1; the insulating resin layer 5 is flush with the surface of the rigid metal body 4.
[0027] In this embodiment, a semiconductor chip structure suitable for embedding in a circuit board is first fabricated. To accommodate copper-plated vias on the circuit board, the front side of the semiconductor chip 1 is copper-plated to obtain a metal plating layer 2. Different metal connection layers 3 are selected for the bottom of the semiconductor chip 1 based on different metal connection processes, such as silver, copper, or gold-tin alloy. Combining the same metal can reduce circuit resistance and enhance connection reliability. Then, a groove slightly larger than the size of the semiconductor chip 1 is created on the surface of the rigid metal body 4 to accommodate the semiconductor chip 1. The pre-treated semiconductor chip 1 and the rigid metal body 4 are then connected together through the metal connection layer 3, preferably using silver sintering, copper sintering, or diffusion bonding processes. Finally, an insulating resin layer 5 is coated onto the chip using spin coating, spraying, or other processes. The resin material's fluidity fills the gap between the groove 4 of the rigid metal body and the chip 1, and it becomes flush with the surface of the rigid metal body 4, completing the encapsulation.
[0028] This invention provides a chip packaging unit for embedded in a circuit board. By filling the gap between the groove of the rigid metal body 4 and the semiconductor chip 1 with an insulating resin layer 5, the chip can be better used in the circuit board. The coated insulating resin layer 5 can isolate the chip from damage caused by ultraviolet radiation, moisture erosion, air oxidation, and ion contamination, increasing the chip's tolerance to the external environment and its long-term preservation. The coated resin material also has a certain buffering effect, preventing large pressure from acting directly on the chip, providing mechanical support, strengthening the chip's protection capabilities, reducing overall cost, and improving reliability. The coated insulating resin layer 5 of this invention can also effectively avoid the problem of insufficient filling or a small process window caused by poor filling.
[0029] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.
Claims
1. A chip package unit for embedded in a circuit board, characterized by, Comprising: a rigid metal body having a recess for accommodating a semiconductor chip formed on a surface thereof; a semiconductor chip accommodated in the recess, one surface of the semiconductor chip being formed with a metal plating layer for connection to a circuit board and the other surface being formed with a metal connection layer, the semiconductor chip being connected to the rigid metal body by the metal connection layer; an insulating resin layer filled in a gap between the recess of the rigid metal body and the semiconductor chip.
2. The chip package unit for embedded circuit board according to claim 1, characterized in that: The semiconductor chip and the rigid metal body are connected by a metal solder.
3. The chip package unit for embedded circuit board according to claim 1, wherein: The metal connection layer includes any one of silver, copper, gold-tin alloy.
4. The chip package unit for embedded circuit board according to claim 1, wherein: The recess has a size greater than that of the semiconductor chip.
5. The chip package unit for embedded circuit board according to claim 1, wherein: The semiconductor chip and the rigid metal body are connected by any one of silver sintering, copper sintering, and diffusion welding.
6. The chip package unit for embedded circuit board according to claim 1, wherein: The insulating resin layer is flush with the surface of the rigid metal body.