Level control circuit and chip

Abstract

The utility model discloses a level control circuit and a chip. The level control circuit comprises a first switch tube, a first capacitor and a first current source. Wherein the first switching tube is connected between the output end and a common ground end; the first capacitor is connected between the output end and the controlled end of the first switching tube; the first current source is connected between the first voltage end and the controlled end of the first switch tube, and in the process that the voltage of the output end changes from the high level to the low level, the first current source charges the first capacitor, and the polarity of the first capacitor is reversed. Through the implementation of the embodiment, the voltage regulation response speed and the driving capability of the output end can be effectively improved, when the output signal frequency is relatively high, the signal integrity can be effectively ensured, the circuit structure is simple, and the chip area can be reduced.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit technology, specifically to a level control circuit and chip. Background Technology

[0002] In existing technologies, the following methods are commonly used: Figure 1 The circuit structure shown in section (a) is used to regulate the rise and fall times of the output voltage. However, this circuit has weak driving capability and requires an additional output stage to improve it, such as... Figure 1 As shown in section (b), this also increases the circuit area and system power consumption, reduces efficiency, and is limited by the response speed of the output stage, making it impossible to guarantee signal integrity when the output signal frequency is high. Utility Model Content

[0003] The purpose of this utility model embodiment is to provide a level control circuit and chip to solve the above-mentioned problems. This utility model embodiment achieves the above objective through the following technical solutions.

[0004] This utility model embodiment provides a level control circuit, which includes a first switching transistor, a first capacitor, and a first current source. The first switching transistor is connected between the output terminal and a common ground terminal; the first capacitor is connected between the output terminal and the controlled terminal of the first switching transistor; the first current source is connected between a first voltage terminal and the controlled terminal of the first switching transistor. During the process of the output voltage changing from a high level to a low level, the first current source charges the first capacitor, and the polarity of the first capacitor reverses.

[0005] In some embodiments, the level control circuit further includes: a second switching transistor connected between the second voltage terminal and the output terminal; a third switching transistor connected in series with the first current source and connected between the first voltage terminal and the controlled terminal of the first switching transistor; and the third switching transistor being turned off when the second switching transistor is fully turned on.

[0006] In some embodiments, the level control circuit further includes: a second current source and a first resistor connected in series, connected between the third voltage terminal and the common ground terminal; when the voltage at the output terminal is at a high level, the common terminal formed by the second current source and the first resistor provides voltage to the controlled terminal of the first switching transistor, and the first switching transistor is in a weak conduction state.

[0007] In some embodiments, the level control circuit further includes: a second current source and a first resistor connected in series, connected between the third voltage terminal and the common ground terminal; when the voltage at the output terminal is at a low level, the common terminal formed by the second current source and the first resistor provides voltage to the controlled terminal of the second switch, and the second switch is in a weak conduction state.

[0008] In some embodiments, the level control circuit further comprises: a second capacitor connected between the controlled end of the second switch tube and the common ground end; a fourth switch tube and a third current source connected in series and connected between the fourth voltage end and the controlled end of the second switch tube.

[0009] In some embodiments, the level control circuit further comprises: a unidirectional switch connected between the controlled end of the second switch tube and the second capacitor.

[0010] In some embodiments, the level control circuit further comprises: a second resistor connected between the output end and the first end of the first capacitor; and a third resistor connected between the controlled end of the first switch tube and the second end of the first capacitor.

[0011] In some embodiments, the level control circuit further comprises: a fourth resistor connected between the first current source and the second end of the first capacitor.

[0012] In some embodiments, the level control circuit further comprises: a second current source having a first end connected to the common ground end; a fifth switch tube having a first end connected to a second end of the second current source; a sixth switch tube having a first end connected to the second end of the second current source; a seventh switch tube having a first end connected to a second end of the fifth switch tube and a controlled end of the second switch tube; an eighth switch tube having a first end connected to a second end of the sixth switch tube and a controlled end of the first switch tube; and a first resistor having a first end connected to the second end of the seventh switch tube and the second end of the eighth switch tube and a second end connected to the common ground end.

[0013] The embodiment of the utility model further provides a level control chip, comprising the level control circuit of any one of the above embodiments.

[0014] Compared with the prior art, by adopting the level control circuit comprising the first switch tube, the first capacitor and the first current source, the voltage regulation response speed and the driving capability of the output end can be effectively improved, the integrity of the signal can be effectively ensured when the output signal frequency is high, and the circuit structure is simple, and the chip area can also be reduced. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical scheme of the embodiment of the utility model, the following will briefly introduce the drawings needed to be used in the description of the embodiment of the utility model, and obviously, the drawings in the following description are only some embodiments of the utility model, and for those skilled in the art, other drawings can also be obtained according to these drawings without creative labor.

[0016] Figure 1 It is a structural schematic view of a level control circuit in the prior art;

[0017] Figure 2is a structural schematic diagram of a level control circuit provided by the embodiment;

[0018] Figure 3 is another structural schematic diagram of a level control circuit provided by the embodiment;

[0019] Figure 4 is another structural schematic diagram of a level control circuit provided by the embodiment;

[0020] Figure 5 is still another structural schematic diagram of a level control circuit provided by the embodiment;

[0021] Figure 6 is a voltage waveform effect schematic diagram of a level control circuit provided by the embodiment. DETAILED DESCRIPTION

[0022] The technical solutions in the embodiments of the utility model will be clearly and completely described in combination with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model.

[0023] In the utility model, the 'coupling' or 'connection' includes direct connection and indirect connection, such as connection through some active devices, passive devices or electrically conductive media; it can also include the connection of other active devices or passive devices known to those skilled in the art on the basis of achieving the same or similar functional purposes, such as the connection of circuits or components such as switches, follower circuits, etc.

[0024] Please refer to Figure 2 The utility model embodiment provides a level control circuit, the level control circuit includes first switch tube K1, first capacitor C1 and first current source I1. Wherein, first switch tube K1 is connected between output end OUT and common ground terminal GND;First capacitor C1 is connected between output end OUT and the controlled end A of first switch tube K1;First current source I1 is connected between first voltage terminal V1 and the controlled end A of first switch tube K1, in the process that the voltage of output end OUT changes from high level to low level, first current source I1 charges first capacitor C1, and the polarity of first capacitor C1 is reversed.

[0025] In the embodiment, when the voltage of output end OUT is in high level state, the voltage of the controlled end A of first switch tube K1 is in the non-full conduction state of first switch tube K1.

[0026] In the embodiment, the first end of the first capacitor C1 can be as the output end OUT, and the second end of the first capacitor C1 can be connected with the first current source I1 and the controlled end A of the first switch tube K1 respectively. When the voltage of the output end OUT is reduced from high level to low level, the voltage of the controlled end A of the first switch tube K1 remains unchanged first, and then gradually rises to the voltage of the first voltage end V1 when the voltage of the output end OUT changes to low level, and the first switch tube K1 is completely turned on. In this process, the voltage of the first end of the first capacitor C1 is reduced from high level to low level, the voltage of the second end of the first capacitor C1 is raised from the voltage of the non-completely turned on state of the first switch tube K1 to the voltage of the first voltage end V1, and the polarity of the first capacitor C1 is reversed. The voltage of the output end OUT can be considered to be consistent with the voltage of the common ground end GND when the voltage of the output end OUT is low.

[0027] In the embodiment, the speed of the voltage of the output end OUT from high level to low level can be controlled by adjusting the current size of the first current source I1.

[0028] In the embodiment, by adopting the level control circuit including the first switch tube K1, the first capacitor C1 and the first current source I1, the voltage adjustment response speed and the driving capability of the output end OUT can be effectively improved, the integrity of the signal can be effectively ensured when the output signal frequency is high, and the circuit structure is simple, and the chip area can also be reduced.

[0029] Further, in some embodiments, as shown in Figure 2 the level control circuit can further include: a second switch tube K2 connected between the second voltage end V2 and the output end OUT; a third switch tube K3 connected in series with the first current source I1 and connected between the first voltage end V1 and the controlled end A of the first switch tube K1; and the third switch tube K3 is turned off in the completely turned on state of the second switch tube K2.

[0030] In the embodiment, the on-off states of the first switch tube K1, the third switch tube K3 and the second switch tube K2 are opposite, the second switch tube K2 is completely turned on when the output end OUT outputs high level, and the first switch tube K1 and the third switch tube K3 are completely turned on when the output end OUT outputs low level. The voltage of the second voltage end V2 can be consistent with the voltage corresponding to high level.

[0031] In the embodiment, the on-off control of the first switch tube K1, the second switch tube K2 and the third switch tube K3 can be used to realize the high-low switching of the level output by the output end OUT.

[0032] In the embodiment, the first switch tube K1 and the second switch tube K2 can both be NMOS transistors.

[0033] It should be noted that the level control circuit provided in the embodiment is adapted to output a small voltage level.

[0034] Further, in some embodiments, the level control circuit can further comprise: a second current source I2 and a first resistor R1 connected in series and connected between the third voltage terminal V3 and the common ground terminal GND; when the voltage at the output terminal OUT is in a high level state, the common terminal formed by the second current source I2 and the first resistor R1 provides a voltage for the controlled terminal A of the first switch tube K1, and the first switch tube K1 is in a weak conduction state.

[0035] In the embodiment, a switch tube can be arranged between the common terminal formed by the second current source I2 and the first resistor R1 and the controlled terminal A of the first switch tube K1, and when the output terminal OUT needs to output a high level, the switch tube is controlled to be turned on, so that the first switch tube K1 is in a weak conduction state, and the output terminal OUT is ready to be switched to a low level, thereby improving the switching speed of the first switch tube K1.

[0036] Further, in some embodiments, the level control circuit can further comprise: a second current source I2 and a first resistor R1 connected in series and connected between the third voltage terminal V3 and the common ground terminal GND; when the voltage at the output terminal OUT is in a low level state, the common terminal formed by the second current source I2 and the first resistor R1 provides a voltage for the controlled terminal B of the second switch tube K2, and the second switch tube K2 is in a weak conduction state.

[0037] In the embodiment, a switch tube can be arranged between the common terminal formed by the second current source I2 and the first resistor R1 and the controlled terminal B of the second switch tube K2, and when the output terminal OUT needs to output a low level, the switch tube is controlled to be turned on, so that the second switch tube K2 is in a weak conduction state, and the output terminal OUT is ready to be switched to a high level, thereby improving the switching speed of the second switch tube K2.

[0038] It should be noted that the "common terminal" described in the embodiment can be used for convenient description of the circuit structure, and should not be limited to only a specific intersection point formed by connecting two lines, but also can be a line extending on the basis of the specific intersection point formed by connecting two lines. Here, only the "common terminal" is used to describe the circuit structure of the level control circuit.

[0039] Specifically, as shown in FIG. 1, the level control circuit comprises a first switch tube K1, a second switch tube K2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first current source I1, a second current source I2, a third current source I3, a fourth current source I4, a first voltage terminal V1, a second voltage terminal V2, a third voltage terminal V3, a common ground terminal GND, and an output terminal OUT. Figure 3As shown, the level control circuit may further include: a second current source I2, the first end of which is connected to the common ground GND; a fifth switch K5, the first end of which is connected to the second end of the second current source I2; a sixth switch K6, the first end of which is connected to the second end of the second current source I2; a seventh switch K7, the first end of which and the second end of the fifth switch K5 are connected to the controlled terminal B of the second switch K2; an eighth switch K8, the first end of which and the second end of the sixth switch K6 are connected to the controlled terminal A of the first switch K1; and a first resistor R1, the first end of which is connected to the second end of the seventh switch K7 and the second end of the eighth switch K8, and the second end of which is connected to the common ground GND.

[0040] In this embodiment, when the output terminal OUT needs to output a high level, the sixth switch K6 and the eighth switch K8 can be turned on, while the fifth switch K5 and the seventh switch K7 can be turned off. Voltage is then provided to the controlled terminal A of the first switch K1 through the second current source I2 and the first resistor R1, so that the first switch K1 is in a weakly conducting state. When the output terminal OUT needs to output a low level, the fifth switch K5 and the seventh switch K7 can be turned on, while the sixth switch K6 and the eighth switch K8 can be turned off. Voltage is then provided to the controlled terminal B of the second switch K2 through the second current source I2 and the first resistor R1, so that the second switch K2 is in a weakly conducting state.

[0041] Furthermore, in some embodiments, such as Figure 4 As shown, the level control circuit may further include: a second capacitor C2, connected between the controlled terminal B of the second switch K2 and the common ground terminal GND; and a fourth switch K4 and a third current source I3 connected in series, connected between the fourth voltage terminal V4 and the controlled terminal B of the second switch K2.

[0042] In this embodiment, when the output terminal OUT outputs a high level, the fourth switch K4 can be controlled to turn on, and the second capacitor C2 is charged through the third current source I3. The voltage of the controlled terminal B of the second switch K2 reaches the voltage of the fourth voltage terminal V4, and the second switch K2 can be fully turned on.

[0043] Furthermore, in some embodiments, the level control circuit further includes a one-way switch D connected between the controlled terminal B of the second switching transistor K2 and the second capacitor C2.

[0044] In this embodiment, the unidirectional switch D can be a diode. During the process of the voltage at the output terminal OUT switching from a low level to a high level, the voltage at the controlled terminal B of the second switch K2 jumps from I2*R1 to the conduction threshold voltage of the unidirectional switch D, and then gradually rises to the voltage at the fourth voltage terminal V4, thereby quickly turning on the second switch K2 completely. This makes the level control circuit provided in this embodiment particularly suitable for level signal output at higher frequencies.

[0045] Furthermore, in some embodiments, the level control circuit may further include: a second resistor R2 connected between the output terminal OUT and the first terminal of the first capacitor C1; and a third resistor R3 connected between the controlled terminal A of the first switch K1 and the second terminal of the first capacitor C1.

[0046] Furthermore, in some embodiments, the level control circuit may also include a fourth resistor R4 connected between the first current source I1 and the second terminal of the first capacitor C1.

[0047] Furthermore, in some embodiments, the level control circuit may also include a fifth resistor R5 connected between the controlled terminal B of the fourth switch K4 and the second switch K2.

[0048] Specifically, when the voltage at the output terminal OUT needs to switch from a high level to a low level, the third switch K3, the fifth switch K5, and the seventh switch K7 can be turned on, while the fourth switch K4, the sixth switch K6, and the eighth switch K8 can be turned off, making the second switch K2 in a weak conducting state and the first switch K1 fully conducting. When the voltage at the output terminal OUT needs to switch from a low level to a high level, the third switch K3, the fifth switch K5, and the seventh switch K7 can be turned off, while the fourth switch K4, the sixth switch K6, and the eighth switch K8 can be turned on, making the second switch K2 fully conducting and the first switch K1 in a weak conducting state.

[0049] like Figure 6 As shown, taking a unidirectional switch D with a conduction threshold of 0.7V as an example, during the process of the output voltage OUT switching from high to low, the voltage at the controlled terminal A of the first switch K1 remains at I2*R1 for a period of time until the output voltage OUT reaches GND. Then, the voltage at the controlled terminal A of the first switch K1 gradually rises from I2*R1 to the voltage at the first voltage terminal V1, and the voltage at the controlled terminal B of the second switch K2 changes from the voltage at the second voltage terminal V2 to I2*R1. During this process, the polarity of the first capacitor C1 reverses. During the process of the output voltage OUT switching from low to high, the voltage at the controlled terminal A of the first switch K1 changes from the voltage at the first voltage terminal V1 to I2*R1, and the voltage at the controlled terminal B of the second switch K2 changes from I2*R1 to 0.7V, gradually rising from 0.7V to the voltage at the fourth voltage terminal V4. During this process, the polarity of the first capacitor C1 also reverses.

[0050] This utility model embodiment also provides a level control chip, the level control circuit including the level control circuit described in any of the above embodiments.

[0051] Since the circuit structure and working mode of the level control circuit in the level control chip in the embodiment are the same as those of the level control circuit in the previous embodiment, no further description is given here.

[0052] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can still be modified, or some technical features can be replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A level control circuit, characterized by, comprising; a first switch tube connected between an output terminal and a common ground terminal; a first capacitor connected between the output terminal and a control terminal of the first switch tube; a first current source connected between a first voltage terminal and the control terminal of the first switch tube, the first current source charging the first capacitor during a voltage change of the output terminal from a high level to a low level, and the first capacitor reverses its polarity.

2. The level control circuit of claim 1, wherein, further comprising: a second switch tube connected between a second voltage terminal and the output terminal; a third switch tube connected in series with the first current source and connected between the first voltage terminal and the control terminal of the first switch tube, the third switch tube being turned off when the second switch tube is fully turned on.

3. The level control circuit of claim 2, wherein, further comprising: a second current source and a first resistor connected in series and connected between a third voltage terminal and the common ground terminal; when the voltage of the output terminal is at a high level, the common terminal of the second current source and the first resistor provides a voltage for the control terminal of the first switch tube, and the first switch tube is in a weakly turned-on state.

4. The level control circuit of claim 2, wherein, further comprising: a second current source and a first resistor connected in series and connected between a third voltage terminal and the common ground terminal; when the voltage of the output terminal is at a low level, the common terminal of the second current source and the first resistor provides a voltage for the control terminal of the second switch tube, and the second switch tube is in a weakly turned-on state.

5. The level control circuit of claim 3, wherein, further comprising: a second capacitor connected between the control terminal of the second switch tube and the common ground terminal; a fourth switch tube and a third current source connected in series and connected between a fourth voltage terminal and the control terminal of the second switch tube.

6. The level control circuit of claim 5, wherein, further comprising: a unidirectional switch connected between the control terminal of the second switch tube and the second capacitor.

7. The level control circuit according to any one of claims 1 to 6, characterized in that, further comprising: a second resistor connected between the output terminal and a first terminal of the first capacitor; a third resistor connected between the control terminal of the first switch tube and a second terminal of the first capacitor.

8. The level control circuit of claim 7, wherein, further comprising: a fourth resistor connected between the first current source and the second terminal of the first capacitor.

9. The level control circuit of claim 2, wherein, further comprising: a second current source, a first terminal of which is connected to the common ground terminal; a fifth switch tube, a first terminal of which is connected to a second terminal of the second current source; a sixth switch tube, a first terminal of which is connected to the second terminal of the second current source; a seventh switch tube, a first terminal of which, a second terminal of the fifth switch tube, and a control terminal of the second switch tube are connected; an eighth switch tube, a first terminal of which, a second terminal of the sixth switch tube, and a control terminal of the first switch tube are connected; a first resistor, a first terminal of which is connected to the second terminal of the seventh switch tube and the second terminal of the eighth switch tube, and a second terminal of which is connected to the common ground terminal.

10. A level control chip, characterized by, comprising the level control circuit according to any one of claims 1 to 9.

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