Filter and vehicle-mounted gateway
By designing a filter structure that includes a control module, coefficient memory, and selector, the problems of high hardware resource consumption and inflexible use of FIR filters are solved, achieving hardware resource saving and real-time adjustment of filter coefficients.
Patent Information
- Application Number
- CN202520201338.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-08
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2035-02-08
AI Technical Summary
Existing FIR filters consume a lot of hardware resources and are not flexible in use, making it impossible to adjust the filter coefficients in real time.
A filter structure including a control module, a coefficient memory, a sampled data memory, a selector, a multiplier, and an accumulator is designed. The selector selects the filter coefficients and sampled data for multiplication, and the coefficient update module is used to achieve real-time adjustment.
The number of multipliers and adders was reduced, hardware resource consumption was lowered, and real-time adjustment and flexible use of the filter were achieved.
Smart Images
Figure CN223829294U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of filtering technology, in particular to a filter and a vehicle-mounted gateway. BACKGROUND
[0002] FIR (Finite Impulse Response) filter is a finite-length unit impulse response filter, also known as non-recursive filter, which is the most basic element in digital signal processing system. It can guarantee arbitrary amplitude-frequency characteristics while having strict linear phase-frequency characteristics, and its unit sample response is finite length, so the filter is a stable system. Therefore, FIR filter has a wide range of applications in communication, image processing, pattern recognition and other fields.
[0003] At present, a plurality of adders and a plurality of multipliers need to be set in the common FIR filter, which leads to large consumption of hardware resources. At the same time, the FIR filter cannot realize real-time adjustment of filter coefficients, and is not flexible in use. CONTENT OF THE INVENTION
[0004] The purpose of the present application is to provide a filter and a vehicle-mounted gateway to solve the problems of large consumption of hardware resources and inflexible use of FIR filter in the prior art.
[0005] In order to achieve the above purpose, the technical scheme adopted by the embodiments of the present application is as follows:
[0006] On the one hand, the present application provides a filter, which comprises a control module, a coefficient storage, a sampling data storage, a first selector, a multiplier, an accumulator and a coefficient updating module, the coefficient updating module is connected with the first input end of the first selector and the coefficient storage respectively, the coefficient storage is also connected with the second input end of the first selector, the output end of the first selector and the sampling data storage are connected to the multiplier, the output end of the multiplier is connected to the accumulator, and the control module is connected with the coefficient storage, the sampling data storage and the accumulator respectively; wherein,
[0007] The coefficient storage is used for storing a plurality of serially arranged filter coefficients, and the sampling data storage is used for storing a plurality of serially arranged sampling data, and the number of sampling data is equal to that of filter coefficients;
[0008] The first selector is used for selecting the filter coefficients in the coefficient updating module or the coefficient storage to the multiplier;
[0009] The multiplier is used for multiplying the filter coefficients and the sampling data, and transmitting the operation result to the accumulator;
[0010] The accumulator is used to accumulate the results of the multiplication and then output the filtered result.
[0011] Optionally, the filter further includes a second selector, the first input of which is connected to the coefficient update module, the second input of which is connected to the control module, and the output of which is connected to the coefficient memory.
[0012] When the second selector selects the first input terminal as the output, the coefficient update module is used to write data into the coefficient memory;
[0013] When the second selector selects the second input terminal as the output, the control module is used to read data from the coefficient memory.
[0014] Optionally, there are multiple coefficient memories, sample data memories, and multipliers, and the number of coefficient memories, sample data memories, and multipliers is the same; the output of each sample data memory is connected to a corresponding multiplier, the output of each sample data memory is also connected to a corresponding multiplier, and the output of each multiplier is connected to the accumulator.
[0015] Optionally, the number of the first selectors is less than or equal to the number of the coefficient memories;
[0016] When the number of first selectors is equal to the number of coefficient memories, the output of each first selector is connected to one of the coefficient memories.
[0017] When the number of first selectors is less than the number of coefficient memories, the coefficient memories not connected to the first selectors are directly connected to the multiplier.
[0018] Optionally, the number of coefficient memories and sampled data memories is multiple, the filter further includes a third selector, and the number of multipliers is one. The input of the first selector is connected to the coefficient update module and multiple coefficient memories respectively, and the output is connected to the multiplier. The input of the third selector is connected to multiple sampled data memories, and the output is connected to the multiplier.
[0019] Optionally, the coefficient memory includes a read interface and a write interface, the read interface being connected to the control module and the write interface being connected to the coefficient update module.
[0020] Optionally, the accumulator includes an adder, a first register, and a second register, which are connected in sequence, and both the first register and the second register are connected to the control module.
[0021] Optionally, the control module includes coefficient read address lines and data read / write address lines, the coefficient read address lines being connected to the coefficient memory, and the data read / write address lines being connected to the sampled data memory.
[0022] Optionally, the filter is an FIR filter.
[0023] On the other hand, embodiments of this application also provide an in-vehicle gateway, which includes the aforementioned filter.
[0024] Compared with the prior art, this application has the following advantages:
[0025] This application provides a filter and an in-vehicle gateway. The filter includes a control module, a coefficient memory, a sampled data memory, a first selector, a multiplier, an accumulator, and a coefficient update module. The coefficient update module is connected to the first input terminal of the first selector and the coefficient memory, respectively. The coefficient memory is also connected to the second input terminal of the first selector. The output terminal of the first selector and the sampled data memory are both connected to the multiplier. The output terminal of the multiplier is connected to the accumulator. The control module is connected to the coefficient memory, the sampled data memory, and the accumulator. The coefficient memory stores multiple sequentially arranged filter coefficients, and the sampled data memory stores multiple sequentially arranged sampled data, with the number of sampled data equal to the number of filter coefficients. The first selector selects filter coefficients from the coefficient update module or the coefficient memory to be output to the multiplier. The multiplier performs a multiplication operation between the filter coefficients and the sampled data and transmits the result to the accumulator. The accumulator sums the results output by the multiplier and outputs the filtering result. On the one hand, the filter provided in this application uses a coefficient memory to store multiple sequentially arranged filter coefficients and a sampling data memory to store multiple sequentially arranged sampling data. This significantly reduces the number of multipliers and adders during the filtering process, thus reducing the waste of hardware resources. On the other hand, the use of the first selector allows for the selection of filter coefficients from the coefficient memory or from the coefficient update module during filtering, enabling real-time adjustment of the filter and making it more flexible in use.
[0026] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0027] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 This is a schematic diagram of the structure of an FIR filter in the prior art.
[0029] Figure 2 This is a schematic diagram of the filter module provided in an embodiment of this application.
[0030] Figure 3 This is a schematic diagram of a first type of filter provided in an embodiment of this application.
[0031] Figure 4 This is a second circuit diagram of a filter provided in an embodiment of this application.
[0032] Figure 5 This is a third circuit diagram of the filter provided in an embodiment of this application.
[0033] In the picture:
[0034] 110 - Control module; 120 - Coefficient memory; 130 - Sampled data memory; 140 - First selector; 150 - Multiplier; 160 - Accumulator; 161 - Adder; 162 - First register; 163 - Second register; 170 - Coefficient update module; 180 - Second selector. Detailed Implementation
[0035] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0036] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0037] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this application, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0038] It should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.
[0039] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0040] As described in the background section, current FIR filters require multiple adders and multipliers, resulting in significant hardware resource consumption. Furthermore, FIR filters cannot achieve real-time adjustment of the filter coefficients, making them inflexible in use.
[0041] For example, please see Figure 1 , Figure 1 A schematic diagram of a prior art FIR filter is shown. In the diagram, "X" represents a multiplier and "+" represents an adder. As can be seen from the diagram, prior art FIR filters require a large number of multipliers and adders, resulting in significant hardware resource consumption. Furthermore, their filter coefficients cannot be adjusted in real time, limiting their flexibility in application.
[0042] In view of this, embodiments of this application provide a filter that, through the configuration of the filter architecture, achieves the effect of reducing hardware resource consumption and flexibly using the filter.
[0043] The filter provided in this application is illustrated below:
[0044] As an optional implementation, please refer to Figure 2The filter includes a control module 110, a coefficient memory 120, a sampled data memory 130, a first selector 140, a multiplier 150, an accumulator 160, and a coefficient update module 170. The coefficient update module 170 is connected to the first input terminal of the first selector 140 and the coefficient memory 120, respectively. The coefficient memory 120 is also connected to the second input terminal of the first selector 140. The output terminal of the first selector 140 and the sampled data memory 130 are both connected to the multiplier 150. The output terminal of the multiplier 150 is connected to the accumulator 160. The control module 110 is connected to the coefficient memory 120, the sampled data memory 130, the first selector 140, the first multiplier 150, the first accumulator 160, and the first coefficient update module 170. The memory 130 and the accumulator 160 are connected; wherein, the coefficient memory 120 is used to store multiple serially arranged filter coefficients, and the sample data memory 130 is used to store multiple serially arranged sample data, and the number of sample data is equal to the number of filter coefficients; the first selector 140 is used to select the filter coefficients in the output coefficient update module 170 or the coefficient memory 120 to the multiplier 150; the multiplier 150 is used to perform a multiplication operation on the filter coefficients and the sample data, and transmit the operation result to the accumulator 160; the accumulator 160 is used to accumulate the operation result output by the multiplier 150 and output the filtering operation result.
[0045] On the one hand, the coefficient memory 120 in the filter provided in this application is used to store multiple serially arranged filter coefficients, and the sampling data memory 130 is used to store multiple serially arranged sampling data. This significantly reduces the number of multipliers 150 and adders 161 during the filtering process, thus reducing the waste of hardware resources. On the other hand, the use of the first selector 140 allows for the selection of filter coefficients from the coefficient memory 120 or coefficients output by the coefficient update module 170 during filtering, thereby enabling real-time adjustment of the filter and making it more flexible in use.
[0046] Please see Figure 3 The control module 110 includes coefficient read address lines and data read / write address lines. The coefficient read address lines are connected to the coefficient memory 120, and the data read / write address lines are connected to the sampled data memory 130. Through the coefficient read address lines, the control module 110 can read data from the coefficient memory 120, and through the data read / write address lines, the control module 110 can read or write data from the sampled data memory 130.
[0047] The accumulator 160 includes an adder 161, a first register 162, and a second register 163, which are connected sequentially. Both the first register 162 and the second register 163 are connected to the control module 110. The control module 110 controls the first register 162 and the second register 163 to perform accumulation or output.
[0048] based on Figure 3 The specific working principle of the filter shown is as follows:
[0049] The coefficient memory 120 stores filter coefficients arranged in a serial order, such as C0 to Cn. The sample data memory 130 stores multiple sample data arranged in a serial order, such as S0 to Sn. The first selector 140 selects either the first input terminal or the second input terminal as the output based on an external control signal, where the external control signal can be an MCU control signal. When the second input terminal is selected as the output, the control module 110 reads the sample data S0 to Sn from the sample data memory 130, and the first selector 140 outputs the filter coefficients C0 to Cn together to the multiplier 150. The multiplier 150 performs a multiplication operation, and the result is output to the adder 161. The adder 161 connects the first flip-flop and the second flip-flop. Under the control of the control logic, the second flip-flop outputs the filtering operation result.
[0050] Meanwhile, if real-time adjustment of the filter coefficients is required, under the control of an external control signal, the first selector 140 can output the signal from the first input terminal. In this case, the filter coefficients from the coefficient update module 170 will be output. For example, if the filter coefficients are C10 to C1n, then the filter coefficients output to the multiplier 150 will be C10 to C1n. Based on this, software algorithms can be combined to adjust the filter coefficients according to real-time operating conditions, making the use of the filter more flexible.
[0051] Of course, the coefficient update module 170 can also write data into the coefficient memory 120, so that the data stored in the coefficient memory 120 is updated. For example, the coefficient update module 170 can update the filter coefficients C0 to Cn stored in the coefficient memory 120 to C10 to C1n.
[0052] Furthermore, in one implementation, the coefficient memory 120 can be configured in a dual-port mode. In this mode, the coefficient memory 120 includes a read interface and a write interface. The read interface is connected to the control module 110, and the write interface is connected to the coefficient update module 170. The coefficient update module 170 can write data to the coefficient memory 120 through the write interface; the control module 110 can read the filter coefficients in the coefficient memory 120 through the read interface.
[0053] In another implementation, the coefficient memory 120 can be configured in single-port mode. In this case, please refer to... Figure 4The filter also includes a second selector 180, the first input of the second selector 180 is connected to a coefficient update module 170, the second input of the second selector 180 is connected to a control module 110, and the output of the second selector 180 is connected to a coefficient memory 120.
[0054] By configuring the second selector 180, reading and writing to the coefficient memory 120 can be achieved with only one interface. Specifically, when the first selector 140 uses the first input terminal as an output, data can be written to the coefficient memory 120 through the coefficient update module 170; when the first selector 140 uses the second input terminal as an output, data can be read from the coefficient memory 120 through the control module 110.
[0055] Furthermore, to reduce the computational load of multiplier 150 and improve the processing speed of the filter, as one implementation method, please refer to [link to relevant documentation]. Figure 5 There are multiple coefficient memories 120, sample data memories 130, and multipliers 150, and the number of coefficient memories 120, sample data memories 130, and multipliers 150 is the same. The output of each sample data memory 130 is connected to the corresponding multiplier 150, and the output of each sample data memory 130 is also connected to the corresponding multiplier 150. The output of each multiplier 150 is connected to the accumulator 160.
[0056] Figure 5 Taking the coefficient memory 120, the sampling data memory 130, and the multiplier 150 as an example, the number can be more in actual applications. For example, the number of coefficient memory 120, sampling data memory 130, and multiplier 150 can be 4 or 5.
[0057] Taking two coefficient memory 120, two sampled data memory 130, and two multipliers 150 as an example, the Nth-order filter coefficients and the Nth-order data can be segmented into N / 2 segments of length. One coefficient memory 120 stores N / 2 serial filter coefficients, i.e., C0 to C10. N / 2 Another coefficient memory 120 stores coefficient C. (N / 2)+1 ~C N Similarly, one of the sampling data memories 130 stores N / 2 serial sampling data, namely S0 to S1. N / 2 The coefficient S is stored in another sampling data memory 130. (N / 2)+1 ~S N .
[0058] Simultaneously, two multipliers 150 perform parallel operations, and the segmented operation results are output to an accumulator 160. The accumulator 160 sums the results of the segmented calculations and then outputs them. Understandably, this method distributes the computational load across the two multipliers 150, enabling parallel operations by multiple multipliers 150, thereby improving the filter's processing speed.
[0059] In one implementation, the number of first selectors 140 can be less than or equal to the number of coefficient memories 120. Specifically, when the number of first selectors 140 equals the number of coefficient memories 120, the output of each first selector 140 is connected to one coefficient memory 120. For example... Figure 5 As shown, each first selector 140 is connected to the corresponding coefficient memory 120 and multiplier 150.
[0060] When the number of first selectors 140 is less than the number of coefficient memories 120, the coefficient memories 120 not connected to the first selectors 140 are directly connected to the multiplier 150. That is, when the number of first selectors 140 is less than the number of coefficient memories 120, only a portion of the filter coefficients can be selected for real-time recall, while the other portion of the filter coefficients can remain unchanged.
[0061] Furthermore, in one implementation, there are multiple coefficient memories 120 and multiple sample data memories 130. The filter also includes a third selector and a single multiplier 150. The input of the first selector 140 is connected to the coefficient update module 170 and multiple coefficient memories 120, respectively, and the output is connected to the multiplier 150. The input of the third selector is connected to multiple sample data memories 130, and the output is connected to the multiplier 150.
[0062] In this implementation, only one multiplier 150 can be used to perform the operation. In this case, although the sampled data memory 130 is divided into multiple segments, the third selector can be used to output them sequentially. At the same time, the first selector 140 can be used to select and output the filter coefficients of any one of the multiple coefficient memories 120, or the filter coefficients updated in real time by the output coefficient update module 170, which is not limited here.
[0063] Based on the above implementation, this application also provides an in-vehicle gateway, which includes the aforementioned filter. The filter provided in this application is an FIR filter.
[0064] In summary, this application provides a filter and an in-vehicle gateway. The filter includes a control module, a coefficient memory, a sampled data memory, a first selector, a multiplier, an accumulator, and a coefficient update module. The coefficient update module is connected to the first input terminal of the first selector and the coefficient memory, respectively. The coefficient memory is also connected to the second input terminal of the first selector. The output terminal of the first selector and the sampled data memory are both connected to the multiplier. The output terminal of the multiplier is connected to the accumulator. The control module is connected to the coefficient memory, the sampled data memory, and the accumulator. The coefficient memory stores multiple sequentially arranged filter coefficients, and the sampled data memory stores multiple sequentially arranged sampled data, with the number of sampled data equal to the number of filter coefficients. The first selector selects filter coefficients from the coefficient update module or the coefficient memory to be output to the multiplier. The multiplier performs a multiplication operation between the filter coefficients and the sampled data and transmits the result to the accumulator. The accumulator sums the result output by the multiplier and outputs the filtering result. On the one hand, the filter provided in this application uses a coefficient memory to store multiple sequentially arranged filter coefficients and a sampling data memory to store multiple sequentially arranged sampling data. This significantly reduces the number of multipliers and adders during filtering, thus reducing the waste of hardware resources. On the other hand, the use of a first selector allows for the selection of filter coefficients from the coefficient memory or from the coefficient update module during filtering, enabling real-time adjustment of the filter and making it more convenient to use.
[0065] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
[0066] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this application. No reference numerals in the claims should be construed as limiting the scope of the claims.
Claims
1. A filter, characterized in that, The filter includes a control module, a coefficient memory, a sampled data memory, a first selector, a multiplier, an accumulator, and a coefficient update module. The coefficient update module is connected to the first input of the first selector and the coefficient memory. The coefficient memory is also connected to the second input of the first selector. The output of the first selector and the sampled data memory are both connected to the multiplier. The output of the multiplier is connected to the accumulator. The control module is connected to the coefficient memory, the sampled data memory, and the accumulator. The coefficient memory is used to store multiple filter coefficients arranged in sequence, and the sampled data memory is used to store multiple sampled data arranged in sequence, wherein the number of sampled data is equal to the number of filter coefficients; The first selector is used to select the filter coefficients from the output coefficient update module or the coefficient memory to the multiplier; The multiplier is used to multiply the filter coefficients with the sampled data and transmit the result to the accumulator; The accumulator is used to accumulate the results of the multiplication and then output the filtered result.
2. The filter as described in claim 1, characterized in that, The filter further includes a second selector, the first input of which is connected to the coefficient update module, the second input of which is connected to the control module, and the output of which is connected to the coefficient memory. When the second selector selects the first input terminal as the output, the coefficient update module is used to write data into the coefficient memory; When the second selector selects the second input terminal as the output, the control module is used to read data from the coefficient memory.
3. The filter as described in claim 1, characterized in that, The coefficient memory, the sampled data memory, and the multiplier are all multiple, and the number of coefficient memories, sampled data memories, and multipliers are all the same; the output of each sampled data memory is connected to a corresponding multiplier, the output of each sampled data memory is also connected to a corresponding multiplier, and the output of each multiplier is connected to the accumulator.
4. The filter as described in claim 3, characterized in that, The number of the first selectors is less than or equal to the number of the coefficient memory; When the number of first selectors is equal to the number of coefficient memories, the output of each first selector is connected to one of the coefficient memories. When the number of first selectors is less than the number of coefficient memories, the coefficient memories not connected to the first selectors are directly connected to the multiplier.
5. The filter as described in claim 1, characterized in that, The number of coefficient memories and sampled data memories is multiple. The filter also includes a third selector. The number of multipliers is one. The input of the first selector is connected to the coefficient update module and multiple coefficient memories respectively, and the output is connected to the multiplier. The input of the third selector is connected to multiple sampled data memories, and the output is connected to the multiplier.
6. The filter as described in claim 1, characterized in that, The coefficient memory includes a read interface and a write interface. The read interface is connected to the control module, and the write interface is connected to the coefficient update module.
7. The filter as described in claim 1, characterized in that, The accumulator includes an adder, a first register, and a second register, which are connected in sequence, and both the first register and the second register are connected to the control module.
8. The filter as described in claim 1, characterized in that, The control module includes coefficient read address lines and data read / write address lines. The coefficient read address lines are connected to the coefficient memory, and the data read / write address lines are connected to the sampled data memory.
9. The filter as described in claim 1, characterized in that, The filter is an FIR filter.
10. A vehicle-mounted gateway, characterized in that, The vehicle gateway includes the filter as described in any one of claims 1 to 9.