Self-locking switch circuit and circuit board

Abstract

The utility model provides a self-locking switch circuit and a circuit board, and relates to the technical field of self-locking circuits, and the circuit comprises an MCU, and a first switch branch and a second switch branch which are respectively connected with a power supply end. The first switch branch is provided with a first switch and a first self-locking node, and the second switch branch is provided with a second switch and a second self-locking node; the first self-locking node is connected with the control end of the second switch, and the second self-locking node is connected with the control end of the first switch and the MCU. The self-locking switch circuit allows the MCU to enter the deep sleep mode without continuously monitoring the circuit state, and the self-locking switch circuit can maintain the required conduction state even in the sleep period of the MCU, thereby significantly reducing the overall power consumption. After the self-locking switch circuit is locked, the program of the MCU can be directly restarted after being upgraded, and human intervention is not needed.

Description

TECHNICAL FIELD

[0001] The utility model relates to the technical field of self-locking circuit, especially relates to a self-locking switch circuit and circuit board. BACKGROUND

[0002] Traditional power switch design usually relies on physical switch or button to directly control the on-off of power supply. However, this method may not be flexible enough or unable to meet the requirements of modern electronic devices on energy efficiency and intelligent control in some application occasions. For example, to ensure the conduction of circuit, MCU cannot enter sleep state, or MCU upgrade and restart will cause power supply to be disconnected. SUMMARY

[0003] Therefore, the utility model discloses a self-locking switch circuit and circuit board to solve the problem that MCU cannot enter sleep state and MCU upgrade and restart will cause power supply to be disconnected.

[0004] To achieve the above purpose, the utility model provides a self-locking switch circuit, which comprises:

[0005] MCU and first switch branch and second switch branch connected with power supply end respectively;First switch and first self-locking node are equipped on the first switch branch, and second switch and second self-locking node are equipped on the second switch branch;The control end of the first self-locking node is connected with the second switch, and the second self-locking node is connected with the control end of the first switch and the MCU respectively;

[0006] Wherein, the MCU is used to send start signal;The control end of the first switch turns on the first switch branch after receiving the start signal, and makes the first self-locking node send first self-locking signal, and the control end of the second switch turns on the second switch branch after receiving the first self-locking signal, and makes the second self-locking node send second self-locking signal, and the control end of the first switch turns on the first switch branch after receiving the second self-locking signal;

[0007] The first switch branch and the second switch branch are continuously turned on under the interaction of the first self-locking signal and the second self-locking signal.

[0008] Optionally, the self-locking switch circuit further comprises first control branch and second control branch connected with the power supply end, the control node and the key switch are equipped on the first control branch, the control switch and the MCU are equipped on the second control branch, and the control node is connected with the control end of the control switch;

[0009] After the key switch turns on the first control branch, the control node sends a control signal to the control switch, and the control switch turns on the first control branch after receiving the control signal, so that the MCU sends a start signal.

[0010] Optionally, the control node is also connected with the second switch branch.

[0011] After the second switch branch is turned on, the control node sends a control signal to the control switch, and the control switch turns on the first control branch after receiving the control signal, so that the power supply end supplies power to the MCU.

[0012] Optionally, the control switch comprises a transistor, an input end of the transistor is connected with the power supply end, and a control end of the transistor is connected with the power supply end through a first resistor.

[0013] Optionally, an input end of the second switch is connected with the control node, a control end of the second switch is connected with the control node through a second resistor, and an output end of the second switch is connected with a second self-locking node.

[0014] Optionally, an input end of the first switch is connected with the power supply end, an output end of the first switch is grounded, and a control end of the first switch is grounded through a third resistor.

[0015] Optionally, the first switch comprises a triode, a base of the triode is a control end, and the base of the triode is connected with the MCU through a fourth resistor.

[0016] Optionally, the self-locking switch circuit comprises a capacitor connected with the third resistor in parallel.

[0017] Optionally, the self-locking switch circuit comprises a direct current conversion module arranged between the control switch and the MCU.

[0018] From the above, it can be seen that the self-locking switch circuit and the circuit board provided by the utility model, wherein the self-locking switch circuit comprises: MCU and first switch branch and second switch branch connected with power supply end respectively;The first switch branch is equipped with first switch and first self-locking node, and the second switch branch is equipped with second switch and second self-locking node;The first self-locking node is connected with the control end of the second switch, and the second self-locking node is connected with the control end of the first switch and the MCU respectively;Wherein, the MCU is used to send starting signal;The control end of the first switch is turned on the first switch branch after receiving the starting signal, and makes the first self-locking node send first self-locking signal, the control end of the second switch is turned on the second switch branch after receiving the first self-locking signal, and makes the second self-locking node send second self-locking signal, and the control end of the first switch is turned on the first switch branch after receiving the second self-locking signal;The first switch branch and the second switch branch are continuously turned on under the interaction of the first self-locking signal and the second self-locking signal.The self-locking switch circuit allows the MCU to enter the deep sleep mode without needing to continuously monitor the circuit state, and even during the sleep of the MCU, the self-locking switch circuit can keep the required on state, thereby significantly reducing the overall power consumption.After the program upgrade of the MCU, the self-locking switch circuit can be restarted directly without human intervention. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0020] Figure 1 It is the principle diagram of the self-locking switch circuit of the embodiment of the present application;

[0021] Figure 2 It is the principle diagram of the self-locking switch circuit of the embodiment of the present application; Figure 1 ;

[0022] Figure 3 It is the principle diagram of the self-locking switch circuit of the embodiment of the present application; Figure 2 ;

[0023] Figure 4 It is the principle diagram of the self-locking switch circuit of the embodiment of the present application; Figure 3 ;

[0024] Figure 4 It is the principle diagram of the self-locking switch circuit of the embodiment of the present application;Figure 1 .

[0025] In the figure, 1, MCU, 2, power terminal, 3, first switch, 4, first self-locking node, 5, second switch, 6, second self-locking node, 7, control node, 8, key switch, 9, control switch, 10, first resistor, 11, second resistor, 12, third resistor, 13, fourth resistor, 14, capacitor, 15, DC conversion module, 16, power output terminal, 3A, NPN transistor, 3B, NMOS transistor, 5A, PNP transistor, 5B, PMOS transistor, 9A, PMOS transistor, 9B, PNP transistor, 9C, normally open relay. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical scheme and advantages of the utility model more clearly, the following will be combined with specific embodiments, and referring to the drawings, the utility model is further explained in detail.

[0027] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the utility model should be understood as the usual meaning understood by those skilled in the art to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not represent any order, quantity or importance, but are only used to distinguish different components. "Include" or "contain" and similar words mean that the elements or objects before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connected" or "connected" and similar words are not limited to physical or mechanical connection, but can include electrical connection, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to represent the relative positional relationship, when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0028] In the design of modern electronic devices, power management is a key link, especially in situations where the power of the device needs to be controlled through user interaction. Traditional power switch designs usually rely on physical switches or buttons to directly control the on-off of the power supply. However, this method may not be flexible enough or may not meet the requirements of modern electronic devices for energy efficiency and intelligent control in some application scenarios. For example, in some portable devices that need to run with low power consumption, such as displays, smart watches, remote control devices, etc., the device often needs to automatically enter a sleep state when not in use to save energy and prolong battery life. In addition, these devices often need to be quickly awakened and perform tasks through simple user interaction, such as key operation. Traditional switch designs are difficult to meet these needs at the same time because they cannot maintain a low power consumption state when the device is in sleep mode.

[0029] The applicant found that a self-locking switch circuit was designed to solve the above technical problems, comprising: MCU1 and first and second switch branches connected with power supply end 2 respectively; the first switch branch is provided with first switch 3 and first self-locking node 4, and the second switch branch is provided with second switch 5 and second self-locking node 6; the control end of the second switch 5 is connected with the first self-locking node 4, and the control end of the first switch 3 and the MCU1 are connected with the second self-locking node 6 respectively; wherein the MCU1 is used to send a start signal; the control end of the first switch 3 turns on the first switch branch after receiving the start signal, and makes the first self-locking node 4 send a first self-locking signal; the control end of the second switch 5 turns on the second switch branch after receiving the first self-locking signal, and makes the second self-locking node 6 send a second self-locking signal; the control end of the first switch 3 turns on the first switch branch after receiving the second self-locking signal; the first switch branch and the second switch branch are continuously turned on under the interaction of the first self-locking signal and the second self-locking signal. The circuit design allows the MCU1 to enter a deep sleep mode without the need for continuous monitoring of the circuit state, and even during the sleep of the MCU1, the self-locking switch circuit can maintain the required on state, thereby significantly reducing the overall power consumption. After the program upgrade of the MCU1, it can be restarted directly without human intervention.

[0030] In some embodiments, as shown in Figure 1 the self-locking switch circuit comprises: MCU1 and first and second switch branches connected with power supply end 2 respectively; the first switch branch is provided with first switch 3 and first self-locking node 4, and the second switch branch is provided with second switch 5 and second self-locking node 6; the control end of the second switch 5 is connected with the first self-locking node 4, and the control end of the first switch 3 and the MCU1 are connected with the second self-locking node 6 respectively;

[0031] wherein the MCU1 is used to send a start signal; the control end of the first switch 3 turns on the first switch branch after receiving the start signal, and makes the first self-locking node 4 send a first self-locking signal; the control end of the second switch 5 turns on the second switch branch after receiving the first self-locking signal, and makes the second self-locking node 6 send a second self-locking signal; the control end of the first switch 3 turns on the first switch branch after receiving the second self-locking signal;

[0032] the first switch branch and the second switch branch are continuously turned on under the interaction of the first self-locking signal and the second self-locking signal.

[0033] In implementation, the first switch branch includes the first switch 3 and the first self-locking node 4. When the MCU 1 sends a start signal (exemplarily, a high-level signal), the start signal is sent to the control end of the first switch 3, so that the first switch 3 is turned on. When the first switch 3 is turned on, the first switch branch is turned on, and the first self-locking node 4 sends a first self-locking signal. The second switch branch includes the second switch 5 and the second self-locking node 6. The first self-locking signal sent by the first self-locking node 4 is transmitted to the control end of the second switch 5, so that the second switch 5 is turned on. At this time, the second switch branch is turned on, and the second self-locking node 6 sends a second self-locking signal. The second self-locking signal is fed back to the control end of the first switch 3, so that the first switch 3 is turned on again. A feedback loop is formed. The first switch branch and the second switch branch are continuously turned on under the interaction of the first self-locking signal and the second self-locking signal. The self-locking switch circuit is locked. Even if the original start signal has stopped (the MCU 1 is in a high state), the self-locking switch circuit still remains in an active state. The self-locking switch circuit can maintain the turned-on state without a continuous external signal. The MCU 1 enters a deep sleep mode without the need for continuous monitoring of the circuit state. Even during the sleep of the MCU 1, the self-locking switch circuit can maintain the required turned-on state, thereby significantly reducing the overall power consumption. After the self-locking switch circuit is locked, the MCU 1 can be directly restarted after program upgrade without human intervention. When the MCU 1 sends a shutdown signal (exemplarily, a low-level signal), the shutdown signal is sent to the control end of the first switch 3, so that the first switch 3 is turned off. When the first switch 3 is turned off, the first switch branch is turned off, and the first self-locking node 4 sends a first locking signal. The second switch branch includes the second switch 5 and the second self-locking node 6. The first locking signal sent by the first self-locking node 4 is transmitted to the control end of the second switch 5, so that the second switch 5 is turned off. At this time, the second switch branch is turned off.

[0034] The self-locking switch circuit allows the MCU 1 to enter a deep sleep mode without the need for continuous monitoring of the circuit state. This indicates that when the device is not active, the MCU 1 can turn off most or all functions, thereby significantly reducing power consumption. Although the MCU 1 is in a sleep state, the self-locking switch circuit can still maintain the turned-on state, so that the device can quickly recover to a working state when receiving a wake-up signal, thereby ensuring the instant response of user interaction. After the self-locking switch circuit is locked, even if the program of the MCU 1 needs to be upgraded or restarted, human intervention or resetting of the circuit state is not required, thereby increasing the reliability of the device.

[0035] Further, as Figure 1As shown, the self-locking switch circuit further includes: a first control branch and a second control branch connected to the power supply terminal 2. The first control branch is provided with a control node 7 and a push-button switch 8, and the second control branch is provided with a control switch 9 and the MCU1. The control node 7 is connected to the control terminal of the control switch 9.

[0036] After the push-button switch 8 turns on the first control branch, the control node 7 sends a control signal to the control switch 9. After receiving the control signal, the control switch 9 turns on the first control branch so that the MCU1 can issue a start signal.

[0037] In specific implementation, the first control branch includes a control node 7 and a push-button switch 8. When the push-button switch 8 is pressed, current can flow through the first control branch and trigger the control node 7. The control node 7 sends a control signal to the control switch 9, which activates the control switch 9 in the second control branch. The second control branch includes the control switch 9 and the MCU1. After receiving the control signal from the control node 7, the control switch 9 is turned on. At this time, the second control branch is turned on, and the MCU1 is activated so that the MCU1 can send a start signal. The start signal is the signal that triggers the self-locking mechanism of the first switch 3 and the second switch 5, so that the two switch branches of the self-locking switch circuit are turned on and remain in the conducting state under the action of the self-locking node.

[0038] Users can activate the device directly through a simple physical operation via button switch 8. When button switch 8 is triggered, control node 7 sends a control signal to control switch 9. After receiving the control signal, control switch 9 conducts the first control branch, so that MCU1 sends a start signal, ensuring that the device can start immediately when needed.

[0039] Furthermore, such as Figure 2 As shown, the control node 7 is also connected to the second switch branch;

[0040] After the second switch branch is turned on, the control node 7 sends a control signal to the control switch 9. After receiving the control signal, the control switch 9 turns on the first control branch so that the power supply terminal 2 supplies power to the MCU1.

[0041] In specific implementation, the control node 7 is connected to the second switch branch so that the control node 7 can detect the state of the second switch branch. That is, when the second switch branch is on, the control node 7 sends a control signal to the control switch 9 to make the control switch 9 on. The control switch 9 being on allows the power supply terminal 2 to supply power to the MCU1 through the first control branch. When the first switch branch and the second switch branch are continuously on under the interaction of the first self-locking signal and the second self-locking signal, that is, when the self-locking switch circuit is locked, the control switch 9 is continuously on so that the power supply terminal 2 can continuously supply power to the MCU1 through the first control branch. When the second switch branch and the push button switch 8 are both off, the second control branch is off and the power supply terminal 2 stops supplying power to the MCU1.

[0042] Control node 7 can automatically adjust the power supply according to the state of the second switch branch. When the first switch branch and the second switch branch are continuously conducting under the interaction of the first self-locking signal and the second self-locking signal, the power supply terminal 2 can continuously supply power to MCU1 through the first control branch, which can avoid power failure due to MCU1 hibernation or restart. When the second switch branch and the push button switch 8 are both disconnected, the control switch 9 will automatically disconnect, thereby stopping the power supply to MCU1 to prevent unnecessary energy waste.

[0043] Furthermore, the control switch 9 includes a transistor, the input terminal of which is connected to the power supply terminal 2, and the control terminal of which is connected to the power supply terminal 2 through a first resistor 10.

[0044] In specific implementation, the transistor can be configured as a field-effect transistor, such as... Figure 3 The PMOS transistor 9A shown in the diagram has its gate as the control terminal. The control terminal of the PMOS transistor 9A is connected to the power supply terminal 2 through a first resistor 10, and the source of the PMOS transistor 9A is connected to the power supply terminal 2. When the first control branch is turned on, a voltage difference is generated across the first resistor 10, that is, a voltage difference is generated between the source and gate of the PMOS transistor 9A. When the voltage difference meets the conduction condition of the PMOS transistor 9A, the PMOS transistor 9A is turned on, and at this time the second control branch is turned on.

[0045] A field-effect transistor (FET) is a semiconductor device that uses an electric field to control the flow of current. It is mainly composed of three parts: source, drain, and gate. The basic working principle of a field-effect transistor is to control the current between the source and the drain by applying a voltage between the gate and the source. Field-effect transistors are mainly divided into two categories: junction field-effect transistors (JFET) and insulated gate field-effect transistors (IGFET), among which the most common insulated gate field-effect transistor is the metal-oxide-semiconductor field-effect transistor (MOSFET). The gate is a control element and is not directly connected to the main current path (source to drain). In a MOSFET, the gate is usually separated from the semiconductor channel by an insulating layer (such as silicon dioxide), so there is almost no direct current flow between the gate and the channel. When a voltage is applied between the gate and the source, an electric field is generated on the surface of the semiconductor, which affects the concentration of carriers (electrons or holes) in the semiconductor, thereby controlling the current between the source and the drain. For an N-type MOSFET, increasing the positive gate voltage will attract more electrons to form a conductive channel, thereby increasing the current; while for a P-type MOSFET, increasing the negative gate voltage will attract more holes to form a conductive channel. Due to the ability of the gate to control current, field-effect transistors are very suitable for use as electronic switches. In digital circuits, MOSFETs can quickly switch between on (saturation) and off (off) states, achieving efficient switching operation.

[0046] The transistor can also be configured as a triode, such as a PNP triode 9B as shown in Figure 4 The base of the PNP triode 9B is the control terminal; the control terminal of the PNP triode 9B is connected to the power supply terminal 2 through the first resistor 10, and the source emitter of the PNP triode 9B is connected to the power supply terminal 2. When the first control branch is turned on, a voltage difference is generated across the first resistor 10, i.e. a voltage difference is generated between the emitter and the base of the PNP triode 9B. When the voltage difference meets the conduction condition of the PNP triode 9B, the PNP triode 9B is turned on, and at this time the second control branch is turned on.

[0047] A triode, also known as a bipolar junction transistor (BJT), is an electronic device composed of three layers of semiconductor material, with the function of amplifying electrical signals. A triode is composed of three parts: the emitter, base, and collector. Triodes can be divided into two types: NPN and PNP. The main difference between these two types is the arrangement of the majority and minority types of semiconductor materials. The structure of an NPN triode is N-type semiconductor-P-type semiconductor-N-type semiconductor, while the structure of a PNP triode is P-type semiconductor-N-type semiconductor-P-type semiconductor. In an NPN triode, when a forward voltage is applied between the base and emitter (making the base positive with respect to the emitter), a large number of electrons are injected from the emitter into the base. In a PNP triode, the situation is reversed, with holes being injected from the emitter into the base. The injected carriers (electrons or holes) pass through a very thin base region and are attracted by the electric field of the collector (which is reverse-biased with respect to the base). Most of the carriers successfully reach the collector, with only a small fraction recombining in the base. Due to the thinness of the base and the low forward bias voltage between the base and emitter, the base current is very small. However, due to the high reverse bias voltage of the collector, the collector current is large. Therefore, a triode can achieve current amplification.

[0048] It can be understood that the control switch 9 can also be set as a relay, such as a normally open relay 9C as shown in the middle, the output end of the coil of the normally open relay 9C being a control end, the control end of the normally open relay 9C being connected with the power supply end 2 through a first resistor 10, the input end of the coil of the normally open relay 9C being connected with the power supply end 2, and the normally open relay 9C being closed and turned on when the first control branch is turned on, at which time the second control branch is turned on. Figure 2

[0049] By using transistors or relays, the switching of the power supply can be precisely controlled, achieving fine power management. Different control switches 9 are suitable for different voltage and current ranges; relays provide physical isolation and can be used in high-voltage or high-current environments, increasing the safety of the latching switch circuit. Transistors, due to their fast switching characteristics, can effectively control the power supply and prevent overloading and short circuits. According to the specific application of the application, different control switches 9 can be selected to control the cost while ensuring performance. For example, transistors are relatively low in cost and suitable for cost-sensitive applications; while relays, although more expensive, can provide higher current carrying capacity and electrical isolation, making them suitable for high-power applications.

[0050] ​Further, the input end of the second switch 5 is connected with the control node 7, the control end of the second switch 5 is connected with the control node 7 through the second resistor 11, and the output end of the second switch 5 is connected with the second self-lock node 6.

[0051] In implementation, the second switch 5 can be set as a triode, such as a PNP triode 5A shown in the figure, the input end (emitter) of the PNP triode 5A is connected with the control node 7, the control end (base) of the PNP triode 5A is connected with the control node 7 through the second resistor 11, and the output end (collector) of the PNP triode 5A is connected with the second self-lock node 6. Figure 5 When the first self-lock node 4 sends the first self-lock signal, a voltage difference is generated between the two ends of the second resistor 11, that is, a voltage difference is generated between the base and the emitter of the PNP triode 5A, the PNP triode 5A is turned on when the voltage difference meets the turn-on condition of the PNP triode 5A, at this time, the second switch branch is turned on, and the control switch 9 is continuously turned on due to the control signal sent by the control node 7, at this time, even if the key switch 8 is turned off, the control switch 9 is still turned on, so that the power supply end 2 continuously supplies power to the MCU 1 through the second control branch.

[0052] The second switch 5 can also be set as a field effect tube, such as a PMOS tube 5B shown in the figure, the input end (source) of the PMOS tube 5B is connected with the control node 7, the control end (gate) of the PMOS tube 5B is connected with the control node 7 through the second resistor 11, and the output end (drain) of the PMOS tube 5B is connected with the second self-lock node 6. Figure 5 When the first self-lock node 4 sends the first self-lock signal, a voltage difference is generated between the two ends of the second resistor 11, that is, a voltage difference is generated between the gate and the source of the PMOS tube 5B, the PMOS tube 5B is turned on when the voltage difference meets the turn-on condition of the PMOS tube 5B, at this time, the second switch branch is turned on.

[0053] The second switch 5 will be turned on when the first self-lock node 4 sends the first self-lock signal, the power supply can still be maintained even if the key switch 8 is turned off, the continuous power supply of the MCU 1 is maintained, and it is ensured that the MCU 1 will not be reset or turned off due to a short-term power interruption, thereby increasing the overall reliability of the circuit.

[0054] Further, the input end of the first switch 3 is connected with the power supply end 2, the output end of the first switch 3 is grounded, and the control end of the first switch 3 is grounded through the third resistor 12.

[0055] In implementation, the first switch 3 can be set as a field effect tube, such as a PMOS tube 3A shown in the figure, the input end (source) of the PMOS tube 3A is connected with the power supply end 2, the output end (drain) of the PMOS tube 3A is grounded, and the control end (gate) of the PMOS tube 3A is grounded through the third resistor 12. Figure 2NMOS transistor 3B shown in the figure, the input end (drain) of the NMOS transistor 3B is connected with the power supply end 2, the output end (source) of the NMOS transistor 3B is grounded, the control end (gate) of the NMOS transistor 3B is grounded through the third resistor 12, when the MCU 1 sends a start signal, because the output end (source) of the NMOS transistor 3B is grounded, a voltage difference is generated between the output end (source) of the NMOS transistor 3B and the control end (gate) of the NMOS transistor 3B, when the voltage difference meets the conduction condition of the NMOS transistor 3B, the NMOS transistor 3B is turned on, at this time, the first switch branch is turned on.

[0056] In addition, the self-locking switch circuit further comprises a capacitor 14 connected in parallel with the third resistor 12. In electronic circuits, especially circuits related to switch operation, electrical noise or interference often occurs. These noises can come from electromagnetic interference inside or outside the circuit. The capacitor 14 can store electric charge and release it when the voltage changes, thereby smoothing voltage fluctuations and filtering high-frequency noise. When the capacitor 14 is connected in parallel with the third resistor 12, the capacitor 14 and the third resistor 12 work together to reduce voltage spikes caused by the output voltage of the MCU 1 or external interference.

[0057] Further, the first switch 3 comprises a transistor, the base of the transistor is the control end, and the base of the transistor is connected with the MCU 1 through the fourth resistor 13.

[0058] In a specific implementation, the first switch 3 comprises a transistor, as shown in the figure Figure 2 NPN transistor 3A, the input end (emitter) of the NPN transistor 3A is connected with the power supply end 2, the output end (collector) of the NPN transistor 3A is grounded, the control end (base) of the NPN transistor 3A is grounded through the third resistor 12, and the base of the NPN transistor 3A is connected with the MCU 1 through the fourth resistor 13, the MCU 1 controls the opening and closing of the NPN transistor 3A by outputting a start signal to the base of the NPN transistor 3A, and the fourth resistor 13 limits the current from the MCU 1 to the base of the NPN transistor 3A, preventing the NPN transistor 3A from being damaged due to excessive current.

[0059] Further, as shown in the figure ​ The self-locking switch circuit further comprises a DC conversion module 15 arranged between the control switch 9 and the MCU 1.

[0060] In the implementation, the direct current conversion module 15 is arranged between the control switch 9 and the MCU 1, and the power supply end 2 is connected with the power supply output end 16, and there is a voltage between the power supply end 2 and the power supply output end 16, when the voltage passes through the direct current conversion module 15, the direct current conversion module 15 converts the voltage between the power supply end 2 and the power supply output end 16 into the power supply voltage of the MCU 1, and the voltage compatibility problem between the power supply and the MCU 1 can be solved. The direct current conversion module 15 can ensure that different parts in the circuit operate at appropriate voltage levels, thereby improving the efficiency and reliability of the entire system.

[0061] It should be understood by those of ordinary skill in the art that the above discussion of any embodiment is only exemplary and is not intended to imply that the scope of the disclosure (including claims) is limited to these examples; under the idea of the present application, the above embodiments or technical features in different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes of different aspects of the present application as described above, which are not provided in details for the sake of brevity.

[0062] The embodiments of the present application are intended to cover all such alternatives, modifications, and variations as fall within the broad scope of the appended claims. Therefore, any omission, modification, equivalent replacement, improvement, etc. made in the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A self-locking switch circuit, characterized in that, include: The MCU and a first switch branch and a second switch branch are respectively connected to the power supply terminal; the first switch branch is provided with a first switch and a first self-locking node, and the second switch branch is provided with a second switch and a second self-locking node; the first self-locking node is connected to the control terminal of the second switch, and the second self-locking node is connected to the control terminal of the first switch and the MCU respectively. The MCU is used to issue a start signal; after receiving the start signal, the control terminal of the first switch turns on the first switch branch and causes the first self-locking node to issue a first self-locking signal; after receiving the first self-locking signal, the control terminal of the second switch turns on the second switch branch and causes the second self-locking node to issue a second self-locking signal; after receiving the second self-locking signal, the control terminal of the first switch turns on the first switch branch. The first switch branch and the second switch branch are continuously connected under the interaction of the first self-locking signal and the second self-locking signal.

2. The self-locking switch circuit according to claim 1, characterized in that, Also includes: A first control branch and a second control branch are connected to the power supply terminal. The first control branch is provided with a control node and a push-button switch, and the second control branch is provided with a control switch and the MCU. The control node is connected to the control terminal of the control switch. After the push-button switch activates the first control branch, the control node sends a control signal to the control switch. Upon receiving the control signal, the control switch activates the first control branch, causing the MCU to issue a start signal.

3. The self-locking switch circuit according to claim 2, characterized in that, The control node is also connected to the second switch branch; After the second switch branch is turned on, the control node sends a control signal to the control switch. Upon receiving the control signal, the control switch turns on the first control branch so that the power supply terminal supplies power to the MCU.

4. The self-locking switch circuit according to claim 3, characterized in that, The control switch includes a transistor, the input terminal of which is connected to the power supply terminal, and the control terminal of which is connected to the power supply terminal through a first resistor.

5. The self-locking switch circuit according to claim 3, characterized in that, The input terminal of the second switch is connected to the control node, the control terminal of the second switch is connected to the control node through the second resistor, and the output terminal of the second switch is connected to the second self-locking node.

6. The self-locking switch circuit according to claim 1, characterized in that, The input terminal of the first switch is connected to the power supply terminal, the output terminal of the first switch is grounded, and the control terminal of the first switch is grounded through a third resistor.

7. The self-locking switch circuit according to claim 6, characterized in that, The first switch includes a transistor, the base of which is a control terminal, and the base of which is connected to the MCU via a fourth resistor.

8. The self-locking switch circuit according to claim 6, characterized in that, include: A capacitor connected in parallel with the third resistor.

9. The self-locking switch circuit according to claim 2, characterized in that, include: A DC-DC converter module is installed between the control switch and the MCU.

10. A circuit board, characterized in that, Includes the self-locking switch circuit according to any one of claims 1-9.

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