Substation data communication gateway machine equipment

Abstract

A substation data communication gateway machine device belongs to the field of communication control equipment and comprises a power supply module, and a CPU core board, a multi-network module, a multi-serial port module, a multi-network interface, a multi-serial interface, a dual-machine mutual standby interface and an expansion plug-in interface which are connected with the power supply module. Wherein the CPU core board is used for realizing program operation control, network protocol conversion, data calculation and data storage; the multi-network module is used for providing multiple paths of RJ45 network channels; the multi-network interface is used for providing multi-path network connection access; the multi-serial port module is used for providing a plurality of paths of RS485 and RS232 serial channels; the multi-serial interface is used for providing multi-path serial bus access; and the dual-host mutual standby interface is used for providing a dual-host switching interface. Scheduling management personnel can remotely manage the integrated automation system of the transformer substation through the system, real-time parameters of line operation of the transformer substation are accurately monitored, the online rate of equipment is improved, and the maintenance cost of the transformer substation is reduced.

Description

Technical Field

[0001] This utility model belongs to the field of communication control equipment technology, specifically relating to a substation data communication gateway device. Background Technology

[0002] Traditional substation integrated automation monitoring methods typically use CAN bus communication for local networks and analog channels for remote transmission. Local networks suffer from drawbacks such as low bandwidth, limited data acquisition capacity, and high failure rates due to connection limitations; while remote channels suffer from low bandwidth, limited data transmission capacity, and high maintenance workload. Therefore, traditional substation integrated automation monitoring methods are not conducive to modern substation integrated automation dispatch and management.

[0003] Dispatch and management personnel must accurately monitor real-time parameters of substation line operation to remotely manage the substation's integrated automation system. Therefore, this invention was developed to improve equipment online rate, provide more comprehensive monitoring of detailed substation data, and reduce substation maintenance costs. Utility Model Content

[0004] Therefore, this utility model provides a substation data communication gateway device, which is a data communication gateway device for substation integrated automation data monitoring and remote network communication.

[0005] The technical solution adopted by this utility model to solve the technical problem is as follows:

[0006] The present invention provides a substation data communication gateway device, which mainly includes: a power supply module, a CPU core board, a multi-network module, a multi-serial port module, a multi-network interface, a multi-serial interface, and a dual-machine backup interface;

[0007] The CPU core board, multi-network module, multi-serial port module, multi-network interface, multi-serial interface, dual-machine backup interface, and expansion plug-in interface are all connected to the power supply module.

[0008] The CPU core board is used to implement program execution control, network protocol conversion, data calculation, and data storage.

[0009] The multi-network module is connected to the CPU core board and is used to provide multiple RJ45 network channels;

[0010] The multi-network interface is connected to the multi-network module and is used to provide multiple network connection access;

[0011] The multi-serial port module is connected to the CPU core board and is used to provide multiple RS485 and RS232 serial channels;

[0012] The multi-serial interface is connected to the multi-serial port module to provide access to multiple serial buses;

[0013] The dual-machine backup interface is connected to the CPU core board and the back-end machine respectively, and is used to provide a dual-host switching interface.

[0014] Furthermore, the substation data communication gateway device provided by this utility model also includes a main board connected to the power supply module; the main board is connected to the CPU core board, multiple network modules, multiple serial port modules, multiple network interfaces, multiple serial interfaces and dual-machine backup interfaces respectively.

[0015] Furthermore, the substation data communication gateway device provided by this utility model also includes an expansion plug-in interface connected to the main board and the CPU core board, for providing an expansion analog channel interface and other secondary development interfaces.

[0016] Furthermore, the system connects to internal and external network channels through the multiple network modules and interfaces; the CPU core board communicates with the remote dispatch and management department through the multiple network modules and interfaces.

[0017] Furthermore, the CPU core board communicates with the central control center via a multi-serial port module and a multi-serial interface.

[0018] Furthermore, the network protocol specification is CDT, Modbus, DL-645, IEC101, IEC102 or IEC104 issued by the Ministry.

[0019] Furthermore, the power supply module circuit specifically includes a power chip, a first resistor, a second resistor, a third resistor, an inductor, a first capacitor, a second capacitor, a third capacitor, a Zener diode, a first non-polarized electrolytic capacitor, and a second non-polarized electrolytic capacitor; one end of the first resistor is grounded, and the other end of the first resistor is connected to the sixth pin of the power chip and one end of the second resistor, respectively; the other end of the second resistor is connected to one end of the third resistor; the third pin of the power chip is connected to one end of the first capacitor; the other end of the first capacitor is connected to the first pin of the power chip, one end of the inductor, and one end of the Zener diode, respectively; the other end of the inductor, the other end of the third resistor, one end of the third capacitor, and one end of the first non-polarized electrolytic capacitor are connected; the other end of the third capacitor, the other end of the first non-polarized electrolytic capacitor, the other end of the Zener diode, the fourth pin of the power chip, one end of the second capacitor, and one end of the second non-polarized electrolytic capacitor are connected; the other end of the second capacitor, the other end of the second non-polarized electrolytic capacitor, and the second pin of the power chip are connected.

[0020] Furthermore, the circuit of the CPU core board specifically includes a main control chip, a fourth resistor, a fifth resistor, and a light-emitting diode. One end of the fourth resistor is grounded, and the other end of the fourth resistor is connected to a pin of the main control chip. The light-emitting diode is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the twenty-second pin of the main control chip.

[0021] Furthermore, the specific circuits of the multi-network module, multi-network interface, multi-serial port module, and multi-serial interface include: first chip-seventh chip, ninth chip-nineteenth chip, sixth resistor-twenty-third resistor, fourth capacitor-eighteenth capacitor;

[0022] The seventeenth chip is connected to the main control chip through the second chip. The twelfth and eighteenth chips are connected to the seventeenth chip respectively. The twelfth chip is connected to the fourteenth chip, the sixth resistor, and the eleventh chip through the nineteenth chip respectively. The eighteenth chip is connected to the fifteenth chip, the ninth resistor, and the eleventh chip through the nineteenth chip respectively. The seventh and eighth resistors are connected to the fourteenth chip, and the tenth and eleventh resistors are connected to the fifteenth chip. The twelfth, fourteenth, fifteenth, and eighteenth chips are all isolation chips, which can ensure electrical isolation between the seventeenth and eleventh chips and the main control chip. The twelfth capacitor is connected between the twenty-fourth and twenty-eighth pins of the eleventh chip. The thirteenth capacitor is connected between the first and second pins of the eleventh chip. The fourteenth capacitor is connected to the twenty-seventh pin of the eleventh chip, and the fifteenth capacitor is connected to the third pin of the eleventh chip.

[0023] The fourth, sixteenth, and fifth chips are all connected to the main control chip through the third chip. The fourth chip is connected to the ninth chip, the twelfth resistor, and the thirteenth chip through the nineteenth chip. The sixteenth chip is connected to the tenth chip, the fifteenth resistor, and the thirteenth chip through the nineteenth chip. The fifth chip is connected to the thirteenth chip. The thirteenth and fourteenth resistors are connected to the ninth chip. The sixteenth and seventeenth resistors are connected to the tenth chip. A fourth capacitor is connected between the twenty-fourth and twenty-eighth pins of the thirteenth chip. A sixth capacitor is connected between the first and second pins of the thirteenth chip. A fifth capacitor is connected to the twenty-seventh pin of the thirteenth chip. A seventh capacitor is connected to the third pin of the thirteenth chip.

[0024] The sixteenth and seventeenth capacitors are connected in parallel, with one end grounded and the other end connected to pins 7, 18, 31, and 42 of the first chip. The seventh chip is connected to the main control chip through the first chip. The nineteenth resistor is connected to pin 64 of the seventh chip. One end of the eighteenth resistor is connected to pin 77 of the seventh chip, and the other end of the eighteenth resistor is connected to pins 76, 85, 90, and 95 of the seventh chip. One end of the twentieth resistor is connected to pins 89 and 93 of the seventh chip, and the other end of the twentieth resistor is connected to pin 94. The first pin of the sixth chip is connected to one end of the twentieth resistor and pin 92 of the seventh chip. The connection is as follows: the second pin of the sixth chip is connected to the eleventh capacitor; the eleventh capacitor is connected to the tenth capacitor; the tenth capacitor is connected to the seventh pin of the sixth chip; the third pin of the sixth chip is connected to the other end of the twenty-first resistor and the ninety-first pin of the seventh chip; the sixth pin of the sixth chip is connected to one end of the twenty-second resistor and one end of the eighteenth capacitor; the other end of the twenty-second resistor is connected to the eighty-eighth pin of the seventh chip; the eighth pin of the sixth chip is connected to the other end of the eighteenth capacitor and one end of the twenty-third resistor; the other end of the twenty-third resistor is connected to the eighty-seventh pin of the seventh chip; the fifteenth pin of the sixth chip is connected to one end of the eighth capacitor; the other end of the eighth capacitor is connected to one end of the ninth capacitor; and the other end of the ninth capacitor is connected to the tenth pin.

[0025] Furthermore, the specific circuit of the expansion plug-in interface includes: resistors 24-32, an SD card interface chip, and a card reader chip. The SD card interface chip is connected to the main control chip. The two ends of the 24th resistor are respectively connected to the 10th pin of the card reader chip and the 10th pin of the SD card interface chip. One end of the 25th resistor is grounded. The other end of the 25th resistor is connected to one end of the 26th resistor and the 11th pin of the SD card interface chip. The other end of the 26th resistor, one end of the 27th resistor, one end of the 28th resistor, one end of the 29th resistor, one end of the 30th resistor, one end of the 31st resistor, and one end of the 32nd resistor are connected. The other end of the 27th resistor is connected to the 9th pin of the SD card interface chip. The other end of the 28th resistor is connected to the 8th pin of the SD card interface chip. The other end of the 29th resistor is connected to the 7th pin of the SD card interface chip. The other end of the 30th resistor is connected to the 5th pin of the SD card interface chip. The other end of the 31st resistor is connected to the 2nd pin of the SD card interface chip. The other end of the 32nd resistor is connected to the 1st pin of the SD card interface chip.

[0026] The beneficial effects of this utility model are:

[0027] This utility model provides a substation data communication gateway device that aggregates information such as remote signaling, remote measurement, remote control, and remote adjustment of the substation, and compiles a point table to forward to the remote dispatch management department and the centralized control center. This enables dispatch management personnel to monitor substation operation data in real time, obtain system operation status, and provide effective data monitoring and operation control for dispatch management personnel, monitoring centers, operation and maintenance personnel, etc., providing data basis and effective centralized control methods for dispatch management.

[0028] Dispatch and management personnel can remotely manage the substation integrated automation system through the substation data communication gateway equipment provided by this utility model, accurately monitor the real-time parameters of substation line operation, improve equipment online rate, and reduce substation maintenance costs. Attached Figure Description

[0029] Figure 1 This utility model provides an overall structural block diagram of a substation data communication gateway device.

[0030] Figure 2 This is the circuit diagram for the power supply module.

[0031] Figure 3 This is the circuit diagram of the CPU core board.

[0032] Figure 4 This is the circuit diagram for the second chip.

[0033] Figure 5 Circuit diagrams for the seventeenth, twelfth, eighteenth, eleventh, etc.

[0034] Figure 6 This is the circuit diagram for the third chip.

[0035] Figure 7 Circuit diagrams for the fourth, sixteenth, fifth, thirteenth, etc.

[0036] Figure 8 This is the circuit diagram of the first chip.

[0037] Figure 9 The circuit diagrams are for the sixth and seventh chips.

[0038] Figure 10 Circuit diagram for expanding plug-in interfaces.

[0039] In the diagram, 1 is the power supply module, 2 is the motherboard, 3 is the CPU core board, 4 is the multi-network module, 5 is the multi-serial port module, 6 is the multi-network interface, 7 is the multi-serial interface, 8 is the dual-machine backup interface, and 9 is the expansion plug-in interface. Detailed Implementation

[0040] This utility model provides a substation data communication gateway device, which serves as an intermediary device between the inside and outside of the substation. The inside of the substation performs data aggregation and command issuance, while the outside of the substation remotely forwards data and receives commands through the dispatch data network.

[0041] To enable those skilled in the art to better understand the technical solution of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings.

[0042] like Figure 1 As shown, the substation data communication gateway device provided by this utility model specifically includes the following modules:

[0043] Power supply module 1, motherboard 2, CPU core board 3, multi-network module 4, multi-serial port module 5, multi-network interface 6, multi-serial interface 7, dual-machine backup interface 8, and expansion plug-in interface 9.

[0044] The motherboard 2, CPU core board 3, multi-network module 4, multi-serial port module 5, multi-network interface 6, multi-serial interface 7, dual-machine backup interface 8, and expansion plug-in interface 9 are all connected to the power supply module 1 via cables. The power supply module 1 provides power input to the entire device.

[0045] The motherboard 2 is connected to the CPU core board 3, the multi-network module 4, the multi-serial port module 5, the multi-network interface 6, the multi-serial interface 7, the dual-machine backup interface 8, and the expansion plug-in interface 9 via cables. The motherboard 2 is mainly used for the integration of auxiliary equipment circuits and provides interfaces for connecting equipment with other boards.

[0046] CPU core board 3 is connected to motherboard 2 via a cable. CPU core board 3 is mainly used to implement program execution control, network protocol conversion, data calculation, and data storage. The network protocol can be CDT, Modbus, DL-645, IEC101, IEC102, IEC104, etc., but is not limited to these.

[0047] The multi-network module 4 is connected to the CPU core board 3 via a cable. The multi-network module 4 is mainly used to provide multiple RJ45 network channels.

[0048] The multi-network interface 6 is connected to the multi-network module 4 via a cable. The multi-network interface 6 is primarily used to provide multiple network connections. The multi-network module 4 and multi-network interface 6 establish intra-station and inter-station network connections. The CPU core board 3 can communicate with the remote dispatch and management department via the multi-network module 4 and multi-network interface 6.

[0049] The multi-serial port module 5 is connected to the CPU core board 3 via a cable. The multi-serial port module 5 is mainly used to provide multiple RS485 and RS232 serial channels.

[0050] The multi-serial interface 7 is connected to the multi-serial port module 5 via a cable. The multi-serial interface 7 is mainly used to provide access to multiple serial buses. The CPU core board 3 can communicate with the central control center through the multi-serial port module 5 and the multi-serial interface 7.

[0051] The dual-machine backup interface 8 is connected to the CPU core board 3 and the back-end machine respectively via cables. The dual-machine backup interface 8 is mainly used to provide a dual-host switching interface.

[0052] The expansion plug-in interface 9 is connected to the CPU core board 3 via a cable. The expansion plug-in interface 9 is mainly used to provide an expansion analog channel interface and other secondary development interfaces.

[0053] This utility model provides a substation data communication gateway device, which mainly serves as an intermediary device between the inside and outside of the substation. Inside the substation, it performs data aggregation and command issuance, while outside the substation, it remotely forwards data and receives commands through the dispatch data network.

[0054] This utility model provides a substation data communication gateway device, mainly used to receive data information from various acquisition and control devices within the substation, and to summarize, edit, organize, and forward it. Specifically, the CPU core board 3 receives data from various acquisition and control devices within the substation, summarizes data information from substation remote signaling, telemetry, remote control, and remote adjustment, and compiles point tables. These data are then forwarded to the back-end machine, remote dispatch management department, and centralized control center via dual-machine backup interface 8, multiple network modules 4 and 6, multiple serial port modules 5 and 7. This enables dispatch management personnel to monitor substation operating data in real time, obtain the operating status of the substation integrated automation system, provide data basis for substation dispatch management, and provide an effective method for centralized control of the substation. During the above process, the CPU core board 3 needs to perform network protocol conversion to establish communication channels with internal and external substations. This is an important basis for modern substation integrated automation dispatch management, providing effective data monitoring and operation control for dispatch management personnel, monitoring centers, operation and maintenance personnel, and repair personnel.

[0055] The technical solutions of this utility model will be clearly and completely described below with reference to the embodiments of this utility model. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this utility model.

[0056] In this embodiment, as Figure 2As shown, the circuit of power supply module 1 specifically includes a power chip U8, a first resistor R1, a second resistor R2, a third resistor R3, an inductor L1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a Zener diode D1, a first non-polarized electrolytic capacitor CB1, and a second non-polarized electrolytic capacitor CB2. One end of the first resistor R1 is grounded, and the other end of the first resistor R1 is connected to pin 6 of the power chip U8 and one end of the second resistor R2. The other end of the second resistor R2 is connected to one end of the third resistor R3. Pin 3 of the power chip U8 is connected to one end of the first capacitor C1. The other end is connected to pin 1 of power chip U8, one end of inductor L1, and one end of Zener diode D1. The other end of inductor L1, the other end of third resistor R3, one end of third capacitor C3, and one end of first non-polarized electrolytic capacitor CB1 are connected. The other end of third capacitor C3, the other end of first non-polarized electrolytic capacitor CB1, the other end of Zener diode D1, pin 4 of power chip U8, one end of second capacitor C2, and one end of second non-polarized electrolytic capacitor CB2 are connected. The other end of second capacitor C2, the other end of second non-polarized electrolytic capacitor CB2, and pin 2 of power chip U8 are connected. Specifically, power chip U8 can be an LM2676.

[0057] In this embodiment, as Figure 3 As shown, the circuit of CPU core board 3 specifically includes a main control chip CON1, a fourth resistor R4, a fifth resistor R5, and a light-emitting diode V2. One end of the fourth resistor R4 is grounded, and the other end is connected to the first pin B1 of the main control chip CON1. ​​The light-emitting diode V2 is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected to the twenty-second pin B22 of the main control chip CON1. ​​The main control chip CON1 has a rich set of pins, including pins A1-A100 and pins B1-B100. The main control chip CON1 connects to the multi-network module 4, the multi-serial port module 5, the dual-machine backup interface 8, and the expansion plug-in interface 9 through these pins. The main control chip CON1 enables program execution control, network protocol conversion, data calculation, and data storage.

[0058] In this embodiment, the specific circuits of the multi-network module 4, the multi-network interface 6, the multi-serial port module 5, and the multi-serial interface 7 are as follows: Figures 4-9As shown, it mainly includes: second chip U2, seventeenth chip U17, twelfth chip U12, eighteenth chip U18, nineteenth chip U19, fourteenth chip U14, fifteenth chip U15, eleventh chip U11, sixth resistor R6, seventh resistor R7, eighth resistor R8, ninth resistor R9, tenth resistor R10, eleventh resistor R11, twelfth capacitor C12, thirteenth capacitor C13, fourteenth capacitor C14, fifteenth capacitor C15, and third chip U3, fourth chip U4, sixteenth chip U16, fifth chip U5, ninth chip U9, tenth chip U10, thirteenth chip U13, tenth chip U14, and so on. Resistors R12, R13, R14, R15, R16, R17; capacitors C4, C5, C6, C7; and chips U1, C16, C17, U6, U7, C8, C9, C10, C11, C18; resistors R18, R19, R20, R21, R22, and R23.

[0059] like Figure 5 As shown, the seventeenth chip U17 is connected to the main control chip CON1 through the second chip U2. The twelfth chip U12 and the eighteenth chip U18 are connected to the seventeenth chip U17. The twelfth chip U12 is connected to the fourteenth chip U14, the sixth resistor R6, and the eleventh chip U11 through the nineteenth chip U19. The eighteenth chip U18 is connected to the fifteenth chip U15, the ninth resistor R9, and the eleventh chip U11 through the nineteenth chip U19. The seventh resistor R7 and the eighth resistor R8 are connected to the fourteenth chip U14. The tenth resistor R10 and the eleventh resistor R11 are connected to the fifteenth chip U15. Above, the twelfth chip U12, the fourteenth chip U14, the fifteenth chip U15, and the eighteenth chip U18 are all isolation chips, which can ensure the electrical isolation between the seventeenth chip U17, the eleventh chip U11 and the main control chip CON1. ​​The twelfth capacitor C12 is connected between the twenty-fourth pin 24 and the twenty-eighth pin 28 of the eleventh chip U11. The thirteenth capacitor C13 is connected between the first pin 1 and the second pin 2 of the eleventh chip U11. The fourteenth capacitor C14 is connected to the twenty-seventh pin 27 of the eleventh chip U11. The fifteenth capacitor C15 is connected to the third pin 3 of the eleventh chip U11.

[0060] like Figure 7As shown, the fourth chip U4, the sixteenth chip U16, and the fifth chip U5 are all connected to the main control chip CON1 through the third chip U3. The fourth chip U4 is connected to the ninth chip U9, the twelfth resistor R12, and the thirteenth chip U13 through the nineteenth chip U19. The sixteenth chip U16 is connected to the tenth chip U10, the fifteenth resistor R15, and the thirteenth chip U13 through the nineteenth chip U19. The fifth chip U5 is connected to the thirteenth chip U13. The thirteenth resistor R13 and the fourteenth resistor R14 are connected to the ninth chip U9. The sixteenth resistor R16 and the seventeenth resistor R17 are connected to the tenth chip U10. The fourth capacitor C4 is connected between the twenty-fourth pin 24 and the twenty-eighth pin 28 of the thirteenth chip U13. The sixth capacitor C6 is connected between the first pin 1 and the second pin 2 of the thirteenth chip U13. The fifth capacitor C5 is connected to the twenty-seventh pin 27 of the thirteenth chip U13. The seventh capacitor C7 is connected to the third pin 3 of the thirteenth chip U13. Among them, the fourth chip U4, the sixteenth chip U16, the fifth chip U5, the ninth chip U9 and the tenth chip U10 are all isolation chips, which can ensure the electrical isolation between the thirteenth chip U13 and the main control chip CON1.

[0061] like Figure 8 and Figure 9As shown, capacitors C16 (sixteenth) and C17 (seventeenth) are connected in parallel, with one end grounded and the other end connected to pins 7 (seventh), 18 (eighteenth), 31 (thirty-first), and 42 (forty-second) of the first chip U1. The seventh chip U7 is connected to the main control chip CON1 through the first chip U1. The nineteenth resistor R19 is connected to pin 64 of the seventh chip U7. One end of the eighteenth resistor R18 is connected to pin 77 of the seventh chip U7, and the other end is connected to pins 76, 85, 90, and 95 of the seventh chip U7. One end of the twentieth resistor R20 is connected to pins 89 and 93 of the seventh chip U7, and the other end is connected to pin 94. Pin 1 of the sixth chip U6 is connected to one end of the twenty-first resistor R21 and pin 92 of the seventh chip U7. Pin 2 of the sixth chip U6 is connected to the eleventh capacitor C11. The eleventh capacitor C11 is connected to the... The tenth capacitor C10 is connected to the seventh pin 7 of the sixth chip U6. The third pin 3 of the sixth chip U6 is connected to the other end of the twenty-first resistor R21 and the ninety-first pin 91 of the seventh chip U7. The sixth pin 6 of the sixth chip U6 is connected to one end of the twenty-second resistor R22 and one end of the eighteenth capacitor C18. The other end of the twenty-second resistor R22 is connected to the eighty-eighth pin 88 of the seventh chip U7. The eighth pin 8 of the sixth chip U6 is connected to the other end of the eighteenth capacitor C18 and one end of the twenty-third resistor R23. The other end of the twenty-third resistor R23 is connected to the eighty-seventh pin 87 of the seventh chip U7. The fifteenth pin 15 of the sixth chip U6 is connected to one end of the eighth capacitor C8. The other end of the eighth capacitor C8 is connected to one end of the ninth capacitor C9. The other end of the ninth capacitor C9 is connected to the tenth pin 10.

[0062] In this embodiment, the expansion plug-in interface 9 can specifically be an SD card interface. The specific circuit of the expansion plug-in interface 9 is as follows: Figure 10As shown, it mainly includes: resistors 24-32, SD card interface chip CON111, and card reader chip TF1. SD card interface chip CON111 is connected to the main control chip CON1. ​​The two ends of resistor 24 are connected to pin 10 of card reader chip TF1 and pin 10 of SD card interface chip CON111, respectively. One end of resistor 25 is grounded, and the other end of resistor 25 is connected to one end of resistor 26 and pin 11 of SD card interface chip CON111, respectively. The other end of resistor 26, one end of resistor 27, one end of resistor 28, one end of resistor 29, and the... One end of resistor R30 (30), one end of resistor R31 (31), and one end of resistor R32 (32) are connected together. The other end of resistor R27 (27) is connected to pin 9 of SD card interface chip CON111. The other end of resistor R28 (28) is connected to pin 8 of SD card interface chip CON111. The other end of resistor R29 (29) is connected to pin 7 of SD card interface chip CON111. The other end of resistor R30 (30) is connected to pin 5 of SD card interface chip CON111. The other end of resistor R31 (31) is connected to pin 2 of SD card interface chip CON111. The other end of resistor R32 (32) is connected to pin 1 of SD card interface chip CON111.

[0063] The above are merely preferred embodiments of this utility model. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of this utility model, and these improvements and modifications should also be considered within the scope of protection of this utility model.

Claims

1. A substation data communication gateway device, characterized in that, include: Power supply module, CPU core board, multi-network module, multi-serial port module, multi-network interface, multi-serial interface and dual-machine backup interface; The CPU core board, multi-network module, multi-serial port module, multi-network interface, multi-serial interface, dual-machine backup interface, and expansion plug-in interface are all connected to the power supply module. The CPU core board is used to implement program execution control, network protocol conversion, data calculation, and data storage. The multi-network module is connected to the CPU core board and is used to provide multiple RJ45 network channels; The multi-network interface is connected to the multi-network module and is used to provide multiple network connection access; The multi-serial port module is connected to the CPU core board and is used to provide multiple RS485 and RS232 serial channels; The multi-serial interface is connected to the multi-serial port module to provide access to multiple serial buses; The dual-machine backup interface is connected to the CPU core board and the back-end machine respectively, and is used to provide a dual-host switching interface.

2. The substation data communication gateway device according to claim 1, characterized in that, It also includes a motherboard connected to the power supply module; the motherboard is connected to the CPU core board, the multi-network module, the multi-serial port module, the multi-network interface, the multi-serial interface and the dual-machine backup interface respectively.

3. The substation data communication gateway device according to claim 2, characterized in that, It also includes an expansion plug-in interface connected to the motherboard and CPU core board, which provides an expansion simulation channel interface and other secondary development interfaces.

4. The substation data communication gateway device according to claim 1, characterized in that, The system connects to internal and external network channels through the multiple network modules and interfaces; the CPU core board communicates with the remote dispatch and management department through the multiple network modules and interfaces.

5. A substation data communication gateway device according to claim 1, characterized in that, The CPU core board communicates with the central control center via multiple serial port modules and multiple serial interfaces.

6. A substation data communication gateway device according to claim 1, characterized in that, The network protocol specifications are CDT, Modbus, DL-645, IE1, IE2 or IE4 issued by the Ministry.

7. A substation data communication gateway device according to claim 1, characterized in that, The power supply module circuit specifically includes a power chip, a first resistor, a second resistor, a third resistor, an inductor, a first capacitor, a second capacitor, a third capacitor, a Zener diode, a first non-polar electrolytic capacitor, and a second non-polar electrolytic capacitor. One end of the first resistor is grounded, and the other end of the first resistor is connected to the sixth pin of the power chip and one end of the second resistor. The other end of the second resistor is connected to one end of the third resistor. The third pin of the power chip is connected to one end of the first capacitor. The other end of the first capacitor is connected to the first pin of the power chip, one end of the inductor, and one end of the Zener diode. The other end of the inductor, the other end of the third resistor, one end of the third capacitor, and one end of the first non-polarized electrolytic capacitor are connected. The other end of the third capacitor, the other end of the first non-polarized electrolytic capacitor, the other end of the Zener diode, the fourth pin of the power chip, one end of the second capacitor, and one end of the second non-polarized electrolytic capacitor are connected. The other end of the second capacitor, the other end of the second non-polarized electrolytic capacitor, and the second pin of the power chip are connected.

8. A substation data communication gateway device according to claim 1, characterized in that, The circuit of the CPU core board specifically includes a main control chip, a fourth resistor, a fifth resistor, and a light-emitting diode. One end of the fourth resistor is grounded, and the other end of the fourth resistor is connected to a pin of the main control chip. The light-emitting diode is connected to one end of the fifth resistor, and the other end of the fifth resistor is connected to the twenty-second pin of the main control chip.

9. A substation data communication gateway device according to claim 8, characterized in that, The specific circuits of the multi-network module, multi-network interface, multi-serial port module, and multi-serial interface include: a first chip, a second chip, a third chip, a fourth chip, a fifth chip, a sixth chip, a seventh chip, a ninth chip, a tenth chip, an eleventh chip, a twelfth chip, a thirteenth chip, a fourteenth chip, a fifteenth chip, a sixteenth chip, a seventeenth chip, an eighteenth chip, a nineteenth chip, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a twentieth resistor, a twenty-first resistor, a twenty-second resistor, a twenty-third resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, and an eighteenth capacitor; The seventeenth chip is connected to the main control chip through the second chip. The twelfth and eighteenth chips are connected to the seventeenth chip respectively. The twelfth chip is connected to the fourteenth chip, the sixth resistor, and the eleventh chip through the nineteenth chip respectively. The eighteenth chip is connected to the fifteenth chip, the ninth resistor, and the eleventh chip through the nineteenth chip respectively. The seventh and eighth resistors are connected to the fourteenth chip, and the tenth and eleventh resistors are connected to the fifteenth chip. The twelfth, fourteenth, fifteenth, and eighteenth chips are all isolation chips, which can ensure electrical isolation between the seventeenth and eleventh chips and the main control chip. The twelfth capacitor is connected between the twenty-fourth and twenty-eighth pins of the eleventh chip. The thirteenth capacitor is connected between the first and second pins of the eleventh chip. The fourteenth capacitor is connected to the twenty-seventh pin of the eleventh chip, and the fifteenth capacitor is connected to the third pin of the eleventh chip. The fourth, sixteenth, and fifth chips are all connected to the main control chip through the third chip. The fourth chip is connected to the ninth chip, the twelfth resistor, and the thirteenth chip through the nineteenth chip. The sixteenth chip is connected to the tenth chip, the fifteenth resistor, and the thirteenth chip through the nineteenth chip. The fifth chip is connected to the thirteenth chip. The thirteenth and fourteenth resistors are connected to the ninth chip. The sixteenth and seventeenth resistors are connected to the tenth chip. A fourth capacitor is connected between the twenty-fourth and twenty-eighth pins of the thirteenth chip. A sixth capacitor is connected between the first and second pins of the thirteenth chip. A fifth capacitor is connected to the twenty-seventh pin of the thirteenth chip. A seventh capacitor is connected to the third pin of the thirteenth chip. The sixteenth and seventeenth capacitors are connected in parallel, with one end grounded and the other end connected to pins 7, 18, 31, and 42 of the first chip. The seventh chip is connected to the main control chip through the first chip. The nineteenth resistor is connected to pin 64 of the seventh chip. One end of the eighteenth resistor is connected to pin 77 of the seventh chip, and the other end of the eighteenth resistor is connected to pins 76, 85, 90, and 95 of the seventh chip. One end of the twentieth resistor is connected to pins 89 and 93 of the seventh chip, and the other end of the twentieth resistor is connected to pin 94. The first pin of the sixth chip is connected to one end of the twentieth resistor and pin 92 of the seventh chip. The connection is as follows: the second pin of the sixth chip is connected to the eleventh capacitor; the eleventh capacitor is connected to the tenth capacitor; the tenth capacitor is connected to the seventh pin of the sixth chip; the third pin of the sixth chip is connected to the other end of the twenty-first resistor and the ninety-first pin of the seventh chip; the sixth pin of the sixth chip is connected to one end of the twenty-second resistor and one end of the eighteenth capacitor; the other end of the twenty-second resistor is connected to the eighty-eighth pin of the seventh chip; the eighth pin of the sixth chip is connected to the other end of the eighteenth capacitor and one end of the twenty-third resistor; the other end of the twenty-third resistor is connected to the eighty-seventh pin of the seventh chip; the fifteenth pin of the sixth chip is connected to one end of the eighth capacitor; the other end of the eighth capacitor is connected to one end of the ninth capacitor; and the other end of the ninth capacitor is connected to the tenth pin.

10. A substation data communication gateway device according to claim 8, characterized in that, The specific circuit of the expansion plug-in interface includes: resistors 24-32, an SD card interface chip, and a card reader chip. The SD card interface chip is connected to the main control chip. The two ends of the 24th resistor are respectively connected to pin 10 of the card reader chip and pin 10 of the SD card interface chip. One end of the 25th resistor is grounded. The other end of the 25th resistor is connected to one end of the 26th resistor and pin 11 of the SD card interface chip. The other end of the 26th resistor, one end of the 27th resistor, one end of the 28th resistor, one end of the 29th resistor, one end of the 30th resistor, one end of the 31st resistor, and one end of the 32nd resistor are connected. The other end of the 27th resistor is connected to pin 9 of the SD card interface chip. The other end of the 28th resistor is connected to pin 8 of the SD card interface chip. The other end of the 29th resistor is connected to pin 7 of the SD card interface chip. The other end of the 30th resistor is connected to pin 5 of the SD card interface chip. The other end of the 31st resistor is connected to pin 2 of the SD card interface chip. The other end of the 32nd resistor is connected to pin 1 of the SD card interface chip.

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