Feedback detection circuit based on load point
By designing a load-point-based feedback detection circuit, the voltage change of the feedback node is monitored in real time, output voltage fluctuations are quickly identified, and the operating mode of the buck converter is adjusted. This solves the problem of slow feedback response speed of the BUCK converter during load switching and improves the stability and adaptability of the system.
Patent Information
- Application Number
- CN202522421315.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-14
- Publication Date
- 2026-01-27
- Estimated Expiration
- 2035-11-14
AI Technical Summary
In existing technologies, BUCK converters have slow feedback response speeds when switching between high and low load states, resulting in large transient voltage fluctuations that affect system stability and the normal operation of downstream loads.
Design a load-point-based feedback detection circuit, including a buck converter module, a feedback detection module, and a U/O analog counting delay module. By monitoring the voltage change of the feedback node in real time, the circuit can quickly identify output voltage fluctuations and output logic signals to guide the buck converter chip to enter a specific operating mode and adjust its response speed.
It accelerates the circuit's response speed to load changes, reduces the impact of voltage fluctuations on downstream loads, and improves the system's stability and adaptability.
Smart Images
Figure CN223843688U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power electronics technology, and in particular to a feedback detection circuit based on the point of load. Background Technology
[0002] With the development of the electronics market, the functions of electronic products have become increasingly complex, and more and more functions are being discovered. This has led to power supply modules within these products needing to have stronger load-carrying capacity and faster response speeds. When a product is operating normally and switching function modes occurs, it is equivalent to switching the load for the internal power supply module. At this point, the speed of circuit feedback becomes crucial. The power supply module must have a faster response speed and smaller voltage fluctuations to ensure that the downstream load can operate normally. Therefore, fast response is particularly important in the design of BUCK converters.
[0003] In existing technologies, when the load switches between high and low states, the FB (Feedback) response speed of the BUCK converter is slow, resulting in large transient voltage fluctuations, which affects system stability and the normal operation of downstream loads. Utility Model Content
[0004] This application provides a feedback detection circuit based on the load point to at least solve the problem in the related art where the feedback circuit has a slow response speed when the load switches between high and low states, which affects the system stability and the normal operation of the downstream load.
[0005] This application provides a load-point-based feedback detection circuit, comprising: a buck converter module, the buck converter module including a buck converter chip having an output node and a feedback node, the feedback node being used to follow the voltage change of the output node, the output node being used to be electrically connected to a load, and the buck converter chip being used to provide an output voltage to the load; a feedback detection module, the input terminal of the feedback detection module being electrically connected to the feedback node, the feedback detection module being used to detect the voltage change of the feedback node and output a signal characterizing the voltage trend of the feedback node; and a U / O (Undershoot / Overshoot) analog counting delay module, the input terminal of the U / O analog counting delay module being electrically connected to the output terminal of the feedback detection module, the U / O analog counting delay module being used to output a logic signal based on the output signal of the feedback detection module, the logic signal being used to guide the operating mode of the buck converter chip.
[0006] This application enables real-time monitoring of voltage changes at the output node of the buck converter via a feedback detection module. This allows for rapid detection of voltage rises or falls at the feedback node. Since the feedback node follows the voltage changes at the output node, which provides the output voltage to the load, the feedback detection module can quickly identify voltage fluctuations during rapid load switching. The module then outputs corresponding logic signals via a U / O analog counting delay module. These logic signals guide the buck converter chip into a specific operating mode, allowing for timely adjustment of the buck converter's operating mode. This accelerates the circuit's response to load changes, reduces the impact of voltage fluctuations on downstream loads, and improves the circuit's adaptability to load changes and the overall system stability. Attached Figure Description
[0007] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0008] Figure 1 This is a schematic diagram of a feedback detection circuit provided in an embodiment of this application;
[0009] Figure 2 A schematic diagram of the circuit structure of a specific feedback detection circuit provided for an embodiment of this application;
[0010] Figure 3 A schematic diagram of the circuit structure of a feedback overshoot detection module provided for an embodiment of this application;
[0011] Figure 4 A schematic diagram of the circuit structure of another feedback overshoot detection module provided for an embodiment of this application;
[0012] Figure 5 A schematic diagram of the circuit structure of a feedback undershoot detection module provided for an embodiment of this application;
[0013] Figure 6 A schematic diagram of the circuit structure of another feedback undershoot detection module provided for an embodiment of this application;
[0014] Figure 7 This is a schematic diagram of the circuit structure of a specific buck converter module provided for an embodiment of this application.
[0015] The above figures include the following reference numerals:
[0016] 10. Buck converter module; 101. Buck converter chip; 11. Feedback detection module; 12. U / O analog counting delay module; 111. Feedback overshoot detection module; 112. Feedback undershoot detection module; 102. First voltage divider resistor; 103. Second voltage divider resistor; 104. Feedforward capacitor; 13. First transistor; 14. Third voltage divider resistor; 15. Second transistor; 16. Third transistor; 17. First inverter; 18. Fourth transistor; 19. Fifth transistor; 2 0. Sixth transistor; 21. Seventh transistor; 22. First current source; 23. First Schmitt trigger; 24. First capacitor; 25. Eighth transistor; 26. Fourth voltage divider resistor; 27. Ninth transistor; 28. Tenth transistor; 29. Second inverter; 30. Third inverter; 31. Eleventh transistor; 32. Twelfth transistor; 33. Thirteenth transistor; 34. Fourteenth transistor; 35. Second current source; 36. Second capacitor; 37. Second Schmitt trigger. Detailed Implementation
[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.
[0018] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.
[0019] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0020] The specific application environment architecture or specific hardware architecture on which the execution of the load-point-based feedback detection circuit depends is described here.
[0021] Embodiments of this application provide a feedback detection circuit based on the point of load, such as Figure 1 and Figure 7 As shown, it includes:
[0022] The buck converter module 10 includes a buck converter chip 101, which has an output node SW and a feedback node FB. The feedback node FB is used to follow the voltage change of the output node SW. The output node SW is used to be electrically connected to a load (not shown). The buck converter chip 101 is used to provide an output voltage to the load.
[0023] Feedback detection module 11, the input terminal of the feedback detection module 11 is electrically connected to the feedback node SW, the feedback detection module 11 is used to detect the voltage change of the feedback node SW and output a signal characterizing the voltage trend of the feedback node SW.
[0024] U / O analog counting delay module 12, the input terminal of the U / O analog counting delay module 12 is electrically connected to the output terminal of the feedback detection module 11, the U / O analog counting delay module 12 is used to output a logic signal according to the output signal of the feedback detection module 11, the logic signal is used to guide the working mode of the buck converter chip 101.
[0025] Through the above embodiments, the feedback detection module monitors the voltage changes of the output node of the buck converter in real time, and can quickly detect the rise or fall of the feedback node voltage. Since the feedback node is used to follow the voltage changes of the output node, and the output node is used to provide output voltage to the load, the feedback detection module can quickly identify the fluctuation of the output voltage when the load changes rapidly, and output the corresponding logic signal through the U / O analog counting delay module. This logic signal can guide the buck converter chip to enter a specific working mode, which can adjust the working mode of the buck converter in a timely manner, speed up the circuit's response speed to load changes, reduce the impact of voltage fluctuations on the downstream load, and improve the circuit's adaptability to load changes and the overall system stability.
[0026] It should be noted that the U / O analog counting delay module in this application is an existing module in electronic circuit design. The U / O analog counting delay module is used to handle the detection and response to transient or overshoot / undershoot events.
[0027] In one alternative, such as Figure 2As shown, the feedback detection module 11 includes a feedback overshoot detection module 111 and a feedback undershoot detection module 112. The input terminals of the feedback overshoot detection module 111 and the feedback undershoot detection module 112 are electrically connected to the feedback node FB, respectively. The output terminals of the feedback overshoot detection module 111 and the feedback undershoot detection module 112 are electrically connected to the input terminal of the U / O analog counting delay module 12, respectively. The feedback overshoot detection module 111 is used to output an overshoot mode signal when the voltage of the feedback node FB is detected to be in an overshoot state. The feedback undershoot detection module 112 is used to output an undershoot mode signal when the voltage of the feedback node FB is detected to be in an undershoot state. The U / O analog counting delay module 12 is used to output an undershoot / overshoot mode logic signal when it receives the overshoot mode signal or the undershoot mode signal. The undershoot / overshoot mode logic signal is used to guide the buck converter chip 101 to enter a fast response mode. In this embodiment, by setting up a feedback overshoot detection module and a feedback undershoot detection module respectively, the voltage fluctuation of the feedback node can be monitored in real time. Once a voltage overshoot or undershoot state is detected, the corresponding mode signal is immediately output. This allows the buck converter chip to quickly enter the fast response mode and adjust the output voltage to cope with the rapid changes in load. By activating the fast response mode, the adaptability and stability of the circuit to load changes are further improved, and voltage fluctuations are effectively reduced.
[0028] It should be noted that fast response mode refers to an operating mode in which the circuit can quickly adjust the output voltage to maintain its stability when the load changes suddenly; this can be achieved by adjusting the G of the error amplifier in the buck converter chip. m Increase and strengthen V C The charging current enables the circuit to respond more quickly to transient load changes, reduces transient fluctuations in output voltage, and ensures normal operation of the load.
[0029] According to some exemplary embodiments of this application, such as Figure 2As shown, the buck converter module 10 further includes: a first voltage divider resistor 102 and a second voltage divider resistor 103. The feedback node FB is electrically connected to the first end of the first voltage divider resistor 102 and the first end of the second voltage divider resistor 103, respectively. The second end of the second voltage divider resistor 103 is grounded, and the second end of the first voltage divider resistor 102 is used to connect to a first power supply (not shown). A feedforward capacitor 104 is also included, with its first end electrically connected to the feedback node FB and its second end electrically connected to the second end of the first voltage divider resistor 102. In this embodiment, the feedforward capacitor can further quickly sense changes in the output voltage, thereby further accelerating the response of the feedback signal. When the load changes rapidly, the feedforward capacitor can quickly capture the transient changes in voltage and reflect them to the feedback detection module, enabling the buck converter chip to adjust the output voltage more quickly and further reduce voltage fluctuations during load switching. The voltage divider resistor can be used to adjust the voltage level of the feedback node to better suit the input range of the subsequent detection circuit.
[0030] Specifically, the magnitude of the first power supply is the same as the magnitude of the output voltage of the buck converter chip.
[0031] Specifically, such as Figure 7 As shown, the buck converter module 10 also includes inductor L1, capacitors C1 and C2, resistors R1 and R2, capacitors C3 and R3, capacitors C4, R4 and R5, capacitors C5 and R6, capacitors C6, C7, C8, C9 and C10, inductor L2, and capacitor C11. The buck converter chip also has VIN, EN, CS, TRK / REF, VCC, MODE, BST, and PG terminals. The voltage at the VIN terminal is VR_P3V3_STBY, the voltage at the EN terminal is VR_P3V3_EN, the voltage at the TRK / REF terminal is VR_P3V3_TRK / REF, the voltage at the CS terminal is VR_P3V3_OCP, the voltage at the SW terminal is VR_P3V3_PHASE, and the voltage at the FB terminal is VR_P3V3_FB.
[0032] According to some other exemplary embodiments of this application, such as Figure 3 and Figure 4As shown, the feedback overshoot detection module 111 includes: a first transistor 13, the base of which is electrically connected to the feedback node (not shown), and the emitter of which is grounded; a third voltage divider resistor 14, the first end of which is electrically connected to the base of the first transistor 13, and the second end of which is electrically connected to the collector of the first transistor 13; a second transistor 15, the collector of which is electrically connected to the collector of the first transistor 13; a third transistor 16, the base of which is electrically connected to the base of the second transistor 15, the emitter of which is electrically connected to the emitter of the second transistor 15, and the collector of which is grounded; and a first inverter 17, the output of which is electrically connected to the input of the U / O analog counting delay module 12. Figure 3 As shown, the input terminal of the first inverter 17 is electrically connected to the collector of the first transistor 13. In this embodiment, the transistor and the third voltage divider resistor in the feedback overshoot detection module combine to form a voltage detection and signal amplification function. The transistor acts as a voltage comparator. When the feedback node voltage exceeds a certain threshold, the transistor turns on, triggering subsequent circuit actions. This accurately captures the overshoot state, promptly issues an overshoot mode signal, and prompts the buck converter to enter a fast response mode, effectively suppressing voltage overshoot.
[0033] Specifically, the first transistor and the second transistor form the first-stage overshoot detection circuit. When the feedback overshoot detection module only has the first-stage overshoot detection circuit and no other stages of overshoot detection circuits, the input terminal of the first inverter is electrically connected to the collector of the first transistor.
[0034] Specifically, the first transistor is an NPN transistor, and the second and third transistors are PNP transistors.
[0035] In other embodiments, such as Figure 4As shown, the feedback overshoot detection module 111 further includes: a fourth transistor 18, the base of which is electrically connected to the collector of the first transistor 13, and the emitter of which is grounded; a fifth transistor 19, the collector of which is electrically connected to the collector of the fourth transistor 18, the base of which is electrically connected to the base of the third transistor 16, and the emitter of which is electrically connected to the emitter of the third transistor 16; a sixth transistor 20, the base of which is electrically connected to the collector of the fourth transistor 18, and the emitter of which is grounded, and the input terminal of the first inverter 17 is electrically connected to the collector of the sixth transistor 20; and a seventh transistor 21, the collector of which is electrically connected to the collector of the sixth transistor 20, the base of which is electrically connected to the base of the third transistor 16, and the emitter of which is electrically connected to the emitter of the third transistor 16. In this embodiment, these transistors form a multi-stage amplifier circuit, which improves the strength and reliability of the overshoot detection signal. The function of the fourth to seventh transistors is to amplify the signal generated by the first to third transistors, ensuring that the signal can clearly trigger the U / O analog counting delay module, which significantly improves the sensitivity of overshoot detection. It can respond quickly even under small voltage fluctuations, further reducing the potential damage to the circuit caused by voltage overshoot.
[0036] Specifically, the fourth and fifth transistors form the second-stage overshoot detection circuit, and the sixth and seventh transistors form the third-stage overshoot detection circuit. When the feedback overshoot detection module has not only the first-stage overshoot detection circuit, but also the second-stage and third-stage overshoot detection circuits, the input terminal of the first inverter is electrically connected to the collector of the sixth transistor.
[0037] Specifically, the fourth and sixth transistors are NPN type transistors, and the fifth and seventh transistors are PNP type transistors.
[0038] Specifically, when the load switches from a higher load to a lower load, the FB node voltage can quickly sense the rise in output voltage, the pull-down current of the first transistor increases, and the base and collector terminals of the first transistor discharge. Figure 4 In the process, the voltage at node A drops, the voltage at node B rises, and the voltage at node C drops, triggering the overshoot mode signal.
[0039] In one exemplary embodiment, such as Figure 3 and Figure 4As shown, the aforementioned feedback overshoot detection module 111 further includes: a first current source 22, the collector of the third transistor 16 being grounded through the first current source 22; a first Schmitt trigger 23; and a first capacitor 24, the base of the first transistor 13 being electrically connected to the feedback node (not shown) through the first capacitor 24. Figure 3 As shown, the input terminal of the first inverter 17 is electrically connected to the collector of the first transistor 13 via the first Schmitt trigger 23. In this embodiment, the addition of the first current source, the first Schmitt trigger, and the first capacitor improves the accuracy and anti-interference capability of overshoot detection. The first current source provides a stable bias current, the first Schmitt trigger is used to eliminate signal noise, and the first capacitor is used to filter out high-frequency interference, ensuring the clarity and reliability of the overshoot signal and significantly improving the robustness of overshoot detection, maintaining good detection performance even in complex electromagnetic environments.
[0040] Specifically, in the case where the feedback overshoot detection module only has a first-stage overshoot detection circuit and no other stages of overshoot detection circuits, such as Figure 3 As shown, the input terminal of the first inverter 17 is electrically connected to the collector of the first transistor 13 via the first Schmitt trigger 23. In the case where the feedback overshoot detection module has not only a first-stage overshoot detection circuit, but also a second-stage and a third-stage overshoot detection circuit, as... Figure 4 As shown, the input terminal of the first inverter 17 is electrically connected to the collector of the sixth transistor 20 through the first Schmitt trigger 23.
[0041] According to some other exemplary embodiments of this application, such as Figure 5 and Figure 6As shown, the feedback undershoot detection module 112 includes: an eighth transistor 25, the base of which is electrically connected to the feedback node (not shown), and the emitter of which is used to receive a first level signal, which is used to turn on the eighth transistor 25; a fourth voltage divider resistor 26, the first end of which is electrically connected to the base of the eighth transistor 25, and the second end of which is electrically connected to the collector of the eighth transistor 25; and a ninth transistor 27, the collector of which is connected to... The collector of the eighth transistor 25 is electrically connected, and the emitter of the ninth transistor 27 is grounded; the base of the tenth transistor 28 is electrically connected to the base of the ninth transistor 27, and the collector of the tenth transistor 28 is used to connect to a second power supply (not shown), and the collector of the tenth transistor 28 is grounded; a second inverter 29; a third inverter 30, the input terminal of the third inverter 30 is electrically connected to the output terminal of the second inverter 29, and the output terminal of the third inverter 30 is electrically connected to the input terminal of the U / O analog counting delay module 12. (The last sentence appears to be incomplete and possibly refers to a different transistor.) Figure 5 As shown, the input terminal of the second inverter 29 is electrically connected to the collector of the eighth transistor 25. In this embodiment, the feedback undershoot detection module effectively detects the undershoot state through a combination of transistors and a fourth voltage divider resistor. The eighth transistor acts as a voltage comparator; when the feedback node voltage is lower than a certain threshold, the transistor turns on, triggering subsequent circuit actions. This accurately captures the undershoot state, promptly issues an undershoot mode signal, and further prompts the buck converter to enter a fast response mode, effectively suppressing the voltage undershoot phenomenon.
[0042] Specifically, the eighth and ninth transistors form the first-stage undershoot detection circuit. In the case that the feedback undershoot detection module only has the first-stage undershoot detection circuit and no other stages of undershoot detection circuits, the input terminal of the second inverter is electrically connected to the collector of the eighth transistor.
[0043] Specifically, the eighth and tenth transistors are PNP type transistors, and the ninth transistor is an NPN type transistor.
[0044] Specifically, the fourth voltage divider resistor and the third voltage divider resistor can be the same resistor or different resistors; this application does not impose any specific restrictions on this.
[0045] According to some other exemplary embodiments of this application, such as Figure 6As shown, the aforementioned feedback undershoot detection module 112 further includes: an eleventh transistor 31, the emitter of which is electrically connected to the emitter of the eighth transistor 25, and the base of which is electrically connected to the collector of the eighth transistor 25; a twelfth transistor 32, the collector of which is electrically connected to the collector of the eleventh transistor 31, the emitter of which is grounded, and the base of which is electrically connected to the base of the tenth transistor 28; and a thirteenth transistor 3... 3. The emitter of the thirteenth transistor 33 is electrically connected to the emitter of the eleventh transistor 31, the base of the thirteenth transistor 33 is electrically connected to the collector of the eleventh transistor 31, and the collector of the thirteenth transistor 33 is electrically connected to the input terminal of the second inverter 29; the fourteenth transistor 34 has its collector electrically connected to the collector of the thirteenth transistor 33, its emitter grounded, and its base electrically connected to the base of the tenth transistor 28. In this embodiment, these transistors constitute a multi-stage amplifier circuit, improving the strength and reliability of the undershoot detection signal. The eleventh to fourteenth transistors amplify the signals generated by the eighth to tenth transistors, ensuring that the signal can clearly trigger the U / O analog counting delay module, significantly improving the sensitivity of undershoot detection, and enabling rapid response even under small voltage fluctuations, further reducing the potential damage to the circuit caused by voltage undershoot.
[0046] Specifically, the eleventh and twelfth transistors form the second-stage undershoot detection circuit, and the thirteenth and fourteenth transistors form the third-stage undershoot detection circuit. When the feedback undershoot detection module has not only the first-stage undershoot detection circuit, but also the second-stage and third-stage undershoot detection circuits, the input terminal of the second inverter is electrically connected to the collector of the thirteenth transistor.
[0047] Specifically, the eleventh and thirteenth transistors are PNP type transistors, and the twelfth and fourteenth transistors are NPN type transistors.
[0048] Specifically, when the load switches from a lower load to a higher load state, the FB node voltage quickly senses the drop in output voltage, the base voltage of the ninth transistor drops rapidly, the pull-down current of the ninth transistor decreases, part of the current flowing through the eighth transistor charges the base of the ninth transistor through the fourth voltage divider resistor, and part charges the collector of the ninth transistor (the base of the twelfth transistor). Due to the decrease in the pull-down current of the ninth transistor, Figure 6 In the process, the voltage at node A rises, the voltage at node B falls, and the voltage at node C rises, triggering the undershoot mode signal.
[0049] In other embodiments, such as Figure 5 and Figure 6 As shown, the aforementioned feedback undershoot detection module 112 further includes: a second current source 35, through which the collector of the tenth transistor 28 is connected to the second power supply; and a second capacitor 36, through which the base of the eighth transistor 25 is electrically connected to the feedback node. In this embodiment, the addition of the second current source and the second capacitor improves the accuracy and anti-interference capability of undershoot detection. The second current source provides a stable bias current, while the second capacitor is used to filter out high-frequency interference, ensuring the clarity and reliability of the undershoot signal, significantly improving the robustness of undershoot detection, and maintaining good detection performance even in complex electromagnetic environments.
[0050] Specifically, the second capacitor and the first capacitor can be the same capacitor or different capacitors; this application does not impose any specific restrictions on this.
[0051] According to some further exemplary embodiments of this application, such as Figure 5 and Figure 6 As shown, the aforementioned feedback undershoot detection module 112 further includes a second Schmitt trigger 37. (As...) Figure 5 As shown, the input terminal of the second inverter 29 is electrically connected to the collector of the eighth transistor 25 via the second Schmitt trigger 37. In this embodiment, the second Schmitt trigger can further eliminate signal noise, further ensure the clear transmission of undershoot signals, and further improve the circuit's ability to identify undershoot states, maintaining accurate detection results even under conditions of large signal fluctuations.
[0052] Specifically, in the case where the feedback undershoot detection module only has a first-stage undershoot detection circuit and no other stages of undershoot detection circuits, such as Figure 5 As shown, the input terminal of the second inverter 29 is electrically connected to the collector of the eighth transistor 25 via the second Schmitt trigger 37. In the case where the feedback undershoot detection module has not only a first-stage undershoot detection circuit, but also a second-stage and a third-stage undershoot detection circuit, as... Figure 6 As shown, the input terminal of the second inverter 29 is electrically connected to the collector of the thirteenth transistor 33 through the second Schmitt trigger 37.
[0053] Specifically, the feedback overshoot detection module and the feedback undershoot detection module form a symmetrical structure and operate on the same principle. They detect whether the output voltage is in an overshoot or undershoot state, respectively. The feedback overshoot detection module and the feedback undershoot detection module output Undershoot mode signal (i.e., overshoot mode signal) and Overshoot mode signal (i.e., undershoot mode signal), respectively, which are input to the U / O analog counting delay module. Finally, the module outputs the UO MODE logic signal (i.e., undershoot / overshoot mode logic signal), thereby controlling the switching of the buck converter chip's operating mode. When the circuit is operating normally, the UO mode output by the U / O analog counting delay module is low. When the circuit is in a load switching state, i.e., when the output voltage is in an undershoot / overshoot state, the Undershoot mode signal or the Overshoot mode signal is triggered, and the U / O COUNT module (i.e., the U / O analog counting delay module) starts timing. The UO mode output by the U / O COUNT module is high and maintained for about 100μs.
[0054] Specifically, the system sets the connection relationship between the POL (point-of-load) buck converter module and the FB fast-response module (i.e., feedback detection module); the soft-rise time is set through capacitor C4, and the OCP (Overcurrent Protection) current is set through resistor R3; the operating status of the buck module can be determined through the PG pin on the buck converter chip; when the voltage VR_P3V3_EN at the EN terminal of the buck converter chip is 1, the buck module starts working, and the voltage VR_P3V3_PHASE at the output node SW of the buck converter chip increases slowly; when the output of the buck converter chip is working normally, the FB node voltage is stable near the set VREF, which can be approximated as a sine wave; when the load is switched, such as from a lower load to a higher load, the feedback undershoot detection module starts working to quickly transmit the feedback signal; the FB node voltage quickly senses the drop in output; the ninth crystal... The base voltage of the transistor drops rapidly, the pull-down current of the ninth transistor decreases, and part of the current flowing through the eighth transistor charges the base of the ninth transistor through the fourth voltage divider resistor, and part charges the collector of the ninth transistor (the base of the twelfth transistor). Due to the decrease in the pull-down current of the ninth transistor, the voltage at node A rises, the voltage at node B falls, and the voltage at node C rises. The eighth and ninth transistors form the first stage of the undershoot detection circuit, amplifying the higher frequency signal of FB; the eleventh and twelfth transistors form the second stage of the undershoot detection circuit, whose size is proportional to that of the first stage, enhancing the amplification gain; the thirteenth and fourteenth transistors form the final stage of the undershoot detection circuit.
[0055] Specifically, the feedback detection circuit in this application adds a feedback detection module and a U / O analog counting delay module to the original BUCK circuit. It determines whether the output voltage is in a high-low load switching state by detecting whether the FB node voltage is in a rapidly decreasing or increasing state. When the circuit is in a load switching state, the U / O analog counting delay module outputs an undershoot / overshoot mode logic signal to guide the aforementioned buck converter chip into a fast response mode, thus adjusting the error amplifier's G... m Increase and strengthen V C The charging current. The feedback detection circuit of this application has the characteristics of fast response when in load switching state; and has the advantage of high efficiency when the output voltage is normal.
[0056] Specifically, existing BUCK circuits exhibit slow response speeds and high transient voltages during load switching, resulting in a slow overall FB feedback response. While setting a higher bandwidth can improve system response speed and reduce transient voltages, it sacrifices loop phase margin, posing a risk of loop instability. Conversely, lower system bandwidth, while ensuring system stability, leads to excessively slow system response speeds and correspondingly high transient voltages, impacting downstream loads.
[0057] Specifically, in the buck module: the VIN terminal supplies power to the internal MOSFETs and regulator of the buck converter chip, requiring an input capacitor connected to the VIN terminal for input decoupling; the EN terminal is an input signal that controls the regulator's on / off state, driving EN high to turn on the regulator and driving EN low to turn it off; capacitors C1 and C2, along with inductor L1, are added to the buck module's input terminal (VIN terminal) to prevent voltage spikes from damaging the MOSFETs in the buck converter chip. When EN is high, the voltage VR_P3V3_PHASE at the SW terminal (output terminal) rises slowly according to the set soft-start time until it reaches its input voltage. The soft-start time can be set via the TRK / REF pin, the OCP can be set via the CS pin, and the buck converter chip's operating mode can be read via the PG pin.
[0058] Specifically, the input to the feedback detection module is VR_P3V3_FB (i.e., the feedback node voltage), and its output enters the U / O analog counting delay module.
[0059] Specifically, the feedback detection circuit of this application has a fast response speed when the load switches between high and low states; when the load capacitance is too large or too small, it can ensure that the transient voltage is low when switching the load state; and the overall loop stability is good when the POL circuit switches between high and low loads.
[0060] The feedback detection circuit provided in this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to help understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. A feedback detection circuit based on the point of load, characterized in that, include: A buck converter module includes a buck converter chip, which has an output node and a feedback node. The feedback node is used to follow the voltage change of the output node, and the output node is used to be electrically connected to a load. The buck converter chip is used to provide an output voltage to the load. A feedback detection module, the input terminal of which is electrically connected to the feedback node, is used to detect the voltage change of the feedback node and output a signal characterizing the voltage trend of the feedback node; The U / O analog counting delay module has its input terminal electrically connected to the output terminal of the feedback detection module. The U / O analog counting delay module is used to output a logic signal based on the output signal of the feedback detection module. The logic signal is used to guide the working mode of the buck converter chip.
2. The feedback detection circuit based on the load point according to claim 1, characterized in that, The feedback detection module includes a feedback overshoot detection module and a feedback undershoot detection module. The input terminals of the feedback overshoot detection module and the feedback undershoot detection module are electrically connected to the feedback node, respectively. The output terminals of the feedback overshoot detection module and the feedback undershoot detection module are electrically connected to the input terminal of the U / O analog counting delay module, respectively. The feedback overshoot detection module is used to output an overshoot mode signal when the voltage of the feedback node is detected to be in an overshoot state, and the feedback undershoot detection module is used to output an undershoot mode signal when the voltage of the feedback node is detected to be in an undershoot state. The U / O analog counting delay module is used to output an undershoot / overshoot mode logic signal when it receives the overshoot mode signal or the undershoot mode signal. The undershoot / overshoot mode logic signal is used to guide the buck converter chip to enter a fast response mode.
3. The feedback detection circuit based on the load point according to claim 1, characterized in that, The buck converter module further includes: The first voltage divider resistor and the second voltage divider resistor, the feedback node is electrically connected to the first end of the first voltage divider resistor and the first end of the second voltage divider resistor respectively, the second end of the second voltage divider resistor is grounded, and the second end of the first voltage divider resistor is used to connect to the first power supply. A feedforward capacitor, wherein the first end of the feedforward capacitor is electrically connected to the feedback node, and the second end of the feedforward capacitor is electrically connected to the second end of the first voltage divider resistor.
4. The feedback detection circuit based on the load point according to claim 2, characterized in that, The feedback overshoot detection module includes: The first transistor has its base electrically connected to the feedback node and its emitter grounded. The third voltage divider resistor has its first end electrically connected to the base of the first transistor and its second end electrically connected to the collector of the first transistor. The second transistor has its collector electrically connected to the collector of the first transistor. The third transistor has its base electrically connected to the base of the second transistor, its emitter electrically connected to the emitter of the second transistor, and its collector grounded. The first inverter has its input terminal electrically connected to the collector of the first transistor, and its output terminal electrically connected to the input terminal of the U / O analog counting delay module.
5. The feedback detection circuit based on the load point according to claim 4, characterized in that, The feedback overshoot detection module also includes: A fourth transistor, wherein the base of the fourth transistor is electrically connected to the collector of the first transistor, and the emitter of the fourth transistor is grounded; The fifth transistor has its collector electrically connected to the collector of the fourth transistor, its base electrically connected to the base of the third transistor, and its emitter electrically connected to the emitter of the third transistor. The sixth transistor has its base electrically connected to the collector of the fourth transistor, its emitter grounded, and the input terminal of the first inverter electrically connected to the collector of the sixth transistor. A seventh transistor, wherein the collector of the seventh transistor is electrically connected to the collector of the sixth transistor, the base of the seventh transistor is electrically connected to the base of the third transistor, and the emitter of the seventh transistor is electrically connected to the emitter of the third transistor.
6. The feedback detection circuit based on the load point according to claim 4, characterized in that, The feedback overshoot detection module also includes: The first current source is provided, and the collector of the third transistor is grounded through the first current source. The first Schmitt trigger, wherein the input terminal of the first inverter is electrically connected to the collector of the first transistor through the first Schmitt trigger; The first capacitor is used to electrically connect the base of the first transistor to the feedback node.
7. The feedback detection circuit based on the load point according to claim 2, characterized in that, The feedback undershoot detection module includes: The eighth transistor has its base electrically connected to the feedback node, and its emitter is used to receive a first level signal, which is used to turn on the eighth transistor. The fourth voltage divider resistor has its first end electrically connected to the base of the eighth transistor and its second end electrically connected to the collector of the eighth transistor. A ninth transistor, the collector of which is electrically connected to the collector of the eighth transistor, and the emitter of which is grounded; The tenth transistor has its base electrically connected to the base of the ninth transistor, its collector connected to a second power supply, and its collector grounded. The second inverter, the input terminal of which is electrically connected to the collector of the eighth transistor; The third inverter has its input terminal electrically connected to the output terminal of the second inverter, and its output terminal is electrically connected to the input terminal of the U / O analog counting delay module.
8. The feedback detection circuit based on the load point according to claim 7, characterized in that, The feedback undershoot detection module also includes: The eleventh transistor has its emitter electrically connected to the emitter of the eighth transistor, and its base electrically connected to the collector of the eighth transistor. The twelfth transistor has its collector electrically connected to the collector of the eleventh transistor, its emitter grounded, and its base electrically connected to the base of the tenth transistor. The thirteenth transistor has its emitter electrically connected to the emitter of the eleventh transistor, its base electrically connected to the collector of the eleventh transistor, and its collector electrically connected to the input terminal of the second inverter. The fourteenth transistor has its collector electrically connected to the collector of the thirteenth transistor, its emitter grounded, and its base electrically connected to the base of the tenth transistor.
9. The feedback detection circuit based on the load point according to claim 7, characterized in that, The feedback undershoot detection module also includes: The collector of the tenth transistor is connected to the second power supply through the second current source; The base of the eighth transistor is electrically connected to the feedback node via the second capacitor.
10. The feedback detection circuit based on the load point according to claim 7, characterized in that, The feedback undershoot detection module also includes: The second Schmitt trigger is used to electrically connect the input of the second inverter to the collector of the eighth transistor.