Miniature light emitting diode device

Abstract

The utility model provides a micro light emitting diode device. The miniature light-emitting diode device comprises a driving substrate which is provided with a first surface, and a plurality of first alignment marks which are arranged at intervals are distributed in a first area of the first surface; the light-emitting unit is located on the side, provided with the first surface, of the driving substrate, the orthographic projection of the light-emitting unit on the first surface is located in a second area of the first surface, and the second area is the area, except the first area, in the first surface. According to the invention, the bonding pads on the driving substrate can be aligned with the corresponding light-emitting units in a high-precision manner, so that the miniature light-emitting diode device has reliable electrical connection, and the yield of the device is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a miniature light-emitting diode device. Background Technology

[0002] Micro-LED arrays exhibit significant technological advantages due to their high color saturation, high contrast, fast response, low power consumption, and long lifespan. Currently, Micro-LED arrays employ two main structures: vertical and flip-chip structures, ultimately achieving their light-emitting function through bonding with a driving circuit.

[0003] In terms of the technical details of Micro-LEDs, the scale of each unit is refined to the micrometer level, and the electrode design is even more precise, reaching sub-micrometer dimensions and spacing. This tiny scale requires that the electrodes of the driving circuit be precisely aligned with the Micro-LED electrodes to ensure the reliability of the electrical connection. Even a minute alignment error is enough to cause poor electrode contact or short circuit, seriously interfering with the normal operation of the device, or even causing it to fail.

[0004] Given the precise connection requirements between Micro-LEDs and the driving circuitry, current technologies employ wafer bonding to integrate the two. The basic process flow is as follows:

[0005] (a) GaN substrate, buffer layer, n-type GaN, multilayer quantum well, and p-type GaN are sequentially grown on a silicon substrate;

[0006] (b) Patterned light-emitting units, with etched light-emitting unit isolation;

[0007] (c) LED unit sidewall treatment, deposition of passivation layer;

[0008] (d) Fabrication of p-metal electrodes;

[0009] (e) The LED unit isolation slot is filled with optical isolation material, and a dielectric layer is deposited;

[0010] (f) The metal electrode is bonded to the backplane of the drive circuit;

[0011] (g) Strip the substrate and remove a certain thickness of n-type GaN to completely isolate the light-emitting unit;

[0012] (h) Fabricate n metal electrodes to complete the circuit interconnection.

[0013] However, this process places extremely stringent requirements on the alignment accuracy of the bonding. This is especially true when bonding the p-metal electrode to the backplane of the drive circuit, where the alignment accuracy requirements are very high. Even minute alignment errors can lead to poor electrode contact, affecting the electrical performance of the device, or even causing a short circuit.

[0014] Therefore, improving device yield remains a major challenge in existing technologies. Utility Model Content

[0015] The main objective of this application is to provide a miniature light-emitting diode device to solve the problem of low yield of miniature light-emitting diodes in the prior art.

[0016] To achieve the above objectives, according to one aspect of this application, a miniature light-emitting diode device is provided, comprising: a driving substrate having a first surface, wherein a plurality of first alignment marks are distributed at intervals in a first region of the first surface; and a light-emitting unit located on one side of the driving substrate having the first surface, wherein the orthographic projection of the light-emitting unit on the first surface is located in a second region of the first surface, the second region being a region of the first surface other than the first region.

[0017] Optionally, the micro light-emitting diode device further includes a bonding metal layer located between the driving substrate and the light-emitting unit.

[0018] Optionally, the light-emitting units include a plurality of units spaced apart along a first direction, the first direction being parallel to the first surface. The micro light-emitting diode device further includes: a dielectric isolation structure located between adjacent light-emitting units; the dielectric isolation structure is disposed in contact with the first surface and spaced apart from the bonding metal layer.

[0019] Optionally, the micro light-emitting diode device further includes: a pad located on the driving substrate and in contact with the bonding metal layer; and a first insulating dielectric layer located between the dielectric isolation structure and the pad.

[0020] Optionally, the micro light-emitting diode device further includes: a second insulating dielectric layer located between the dielectric isolation structure and the light-emitting unit, and between the dielectric isolation structure and the bonding metal layer, wherein the second insulating dielectric layer and the dielectric isolation structure are formed of different materials.

[0021] Optionally, the driving substrate has a first end and a second end opposite to each other in a second direction, the second direction being parallel to the first surface and the first direction being perpendicular to the second direction, and the dielectric isolation structure includes: a first dielectric isolation structure located between two adjacent light-emitting units in the first direction and extending from the first end to the second end along the second direction.

[0022] Optionally, the light-emitting unit includes a plurality of units spaced apart along the second direction, the driving substrate has a third end and a fourth end opposite to each other in the first direction, and the dielectric isolation structure further includes: a second dielectric isolation structure located between two adjacent light-emitting units in the second direction, and extending from the third end to the first dielectric isolation structure along the first direction or extending from the fourth end to the first dielectric isolation structure along the first direction.

[0023] Optionally, the micro light-emitting diode device further includes an electrode layer located on the surface of the light-emitting unit away from the driving substrate.

[0024] Optionally, when the light-emitting units include a plurality of units distributed in an array along the first and second directions, the electrode layers include a plurality of layers, each electrode layer corresponding to a plurality of light-emitting units in the first direction, and each electrode layer contacts the side surface of the plurality of light-emitting units in the second direction away from the driving substrate.

[0025] Optionally, the micro light-emitting diode device further includes multiple lenses, each located on the side of the multiple light-emitting units away from the driving substrate.

[0026] This application provides a miniature light-emitting diode (LED) device, including a driving substrate and light-emitting units. The driving substrate has a first surface, and a first region of the first surface has a plurality of spaced-apart first alignment marks. The light-emitting units are located on one side of the driving substrate with the first surface, and the orthographic projection of the light-emitting units on the first surface is located in a second region of the first surface, which is the region of the first surface excluding the first region. Based on this, by setting a plurality of first alignment marks on the driving substrate, when the driving substrate and the corresponding light-emitting functional layers of the light-emitting units are bonded, the light-emitting functional layers are first patterned to expose the plurality of first alignment marks on the driving substrate. Then, the light-emitting functional layers are patterned again based on the exposed plurality of first alignment marks on the driving substrate to obtain the light-emitting units. At this time, the pads on the driving substrate can achieve high-precision alignment with the corresponding light-emitting units, thereby enabling the miniature LED device to have reliable electrical connections and improving device yield. Attached Figure Description

[0027] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0028] Figure 1 A cross-sectional view of the driving substrate provided in a method for fabricating a micro light-emitting diode device according to an embodiment of this application is shown.

[0029] Figure 2 This paper illustrates a cross-sectional view of the epitaxial wafer of a micro light-emitting diode provided in a method for fabricating a micro light-emitting diode device according to an embodiment of this application.

[0030] Figure 3 It shows that Figure 1 The driving substrate shown and Figure 2The diagram shows a cross-sectional view of the structure of the light-emitting diode epitaxial wafer after bonding.

[0031] Figure 4 It shows the removal Figure 3 A schematic cross-sectional view of the semiconductor substrate following the substrate shown in the diagram.

[0032] Figure 5 Etching is shown Figure 4 The diagram shows a cross-sectional structure after the first alignment mark on the driving substrate is exposed following the semiconductor substrate shown.

[0033] Figure 6 It shows the Figure 5 A schematic cross-sectional view of the structure after the light-emitting functional layer in the structure shown is graphically represented.

[0034] Figure 7 It shows in Figure 6 A schematic cross-sectional view of the structure after the insulating material layer has been formed in the structure shown.

[0035] Figure 8 It shows in Figure 7 A schematic cross-sectional view of the structure after the formation of the second insulating dielectric layer and the dielectric isolation structure in the structure shown.

[0036] Figure 9 It shows in Figure 8 A schematic cross-sectional view of the structure after the electrode layer is formed in the structure shown.

[0037] Figure 10 It shows in Figure 9 A schematic cross-sectional view of the structure after the lens is formed in the structure shown.

[0038] Figure 11 A top view of a micro light-emitting diode array according to an embodiment of this application is shown.

[0039] The above figures include the following reference numerals:

[0040] 100, Driving substrate; 101, First insulating dielectric layer; 102, Bonding pad; 103, Insulating material layer; 104, Second insulating dielectric layer; 200, Substrate; 201, Second doped layer; 202, Active layer; 203, First doped layer; 210, Light-emitting functional layer; 20, Light-emitting unit; 30, Bonding metal layer; 301, Second metal layer; 302, First metal layer; 40, Dielectric isolation structure; 401, First dielectric isolation structure; 402, Second dielectric isolation structure; 50, Electrode layer; 60, Lens. Detailed Implementation

[0041] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0042] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0043] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0044] As described in the background section, existing technologies employ wafer bonding to integrate the two components. The basic process flow is as follows: GaN substrate, buffer layer, n-type GaN, multilayer quantum well, and p-type GaN are sequentially grown on a silicon substrate; patterned light-emitting units are patterned, and the light-emitting unit isolation is etched; the sidewalls of the LED units are treated, and a passivation layer is deposited; p-metal electrodes are fabricated; optical isolation material is filled into the LED unit isolation trenches, and a dielectric layer is deposited; the p-metal electrodes are bonded to the backplane of the driving circuit; the substrate is peeled off and a certain thickness of n-type GaN is removed to completely isolate the light-emitting units; n-metal electrodes are fabricated to complete the circuit interconnection. However, this process places extremely stringent requirements on the alignment accuracy of the bonding. Especially when the p-metal electrodes are bonded to the backplane of the driving circuit, the alignment accuracy requirement is very high. Even a small alignment error may lead to poor electrode contact, affecting the electrical performance of the device, or even causing a short circuit. Therefore, to improve the device yield, this application provides a miniature light-emitting diode device.

[0045] In some alternative embodiments, a miniature light-emitting diode device is provided, which can be fabricated by: providing a semiconductor substrate, including stacked layers such as... Figure 1 The driving substrate 100 shown and as shown Figure 2The light-emitting functional layer 210 shown has a first surface on the driving substrate 100. A plurality of first alignment marks (not shown in the figure) are distributed on the first surface at intervals. The light-emitting functional layer 210 covers the plurality of first alignment marks. The first surface is the surface close to the side of the light-emitting functional layer 210. The light-emitting functional layer 210 is first patterned to expose the plurality of first alignment marks. A mask (not shown in the figure) is covered on the side of the light-emitting functional layer 210 away from the driving substrate 100. The mask has second alignment marks. The first alignment marks and the second alignment marks are aligned, and the light-emitting functional layer 210 is second patterned to form a light-emitting unit (not shown in the figure).

[0046] Specifically, such as Figure 1 As shown, the driving substrate 100 may have a first insulating dielectric layer 101 and a plurality of pads 102, and the first insulating dielectric layer 101 may be located between two adjacent pads 102 to achieve electrical isolation between two adjacent pads 102.

[0047] In the above embodiments, by setting multiple first alignment marks on the driving substrate 100, during the process of forming a light-emitting unit on one side of the driving substrate 100, even if the light-emitting functional layer corresponding to the light-emitting unit covers multiple first alignment marks, this application first patterns the light-emitting functional layer 210 to expose multiple first alignment marks on the driving substrate 100. On this basis, the light-emitting functional layer 210 is patterned again according to the multiple first alignment marks exposed on the driving substrate 100 to obtain the light-emitting unit. At this time, since the alignment of the patterned light-emitting unit is based on the multiple first alignment marks exposed on the driving substrate, interlayer errors are avoided, so that the pads 102 on the driving substrate 100 can achieve high-precision alignment with the corresponding light-emitting unit, thereby enabling the micro light-emitting diode device to have reliable electrical connection and thus improving the device yield.

[0048] In some optional embodiments, prior to the step of providing the semiconductor substrate, in order to prepare the semiconductor substrate, the step of forming the semiconductor substrate includes: such as Figure 1 and Figure 2 As shown, a driving substrate 100 and a light-emitting diode epitaxial wafer are provided. The light-emitting diode epitaxial wafer includes a substrate 200 and a light-emitting functional layer 210 located on one side of the substrate 200; a first metal layer 302 is formed on the side of the driving substrate 100 having a first surface; a second metal layer 301 is formed on the surface of the light-emitting functional layer 210 away from the substrate 200; as shown... Figure 3 As shown, the first metal layer 302 and the second metal layer 301 are bonded; as Figure 4 As shown, substrate 200 is removed to form a semiconductor substrate.

[0049] Specifically, such as Figure 4 As shown, the first metal layer 302 and the second metal layer 301 are bonded together to form a bonded metal layer 30.

[0050] Specifically, the light-emitting diode epitaxial wafer can be obtained by epitaxially growing the light-emitting functional layer 210 on the substrate 200. After bonding the first metal layer 302 and the second metal layer 301, the surface of the light-emitting functional layer 210 away from the driving substrate 100 can be removed to make it a light-emitting surface.

[0051] Optionally, such as Figure 2 , Figure 3 , Figure 4 and Figure 5 As shown, the light-emitting functional layer 210 may include a first doped layer 203, an active layer 202, and a second doped layer 201 stacked together. For example, the first doped layer 203 may be a p-type gallium nitride layer, the active layer 202 may be a multilayer quantum well, and the second doped layer 201 may be an n-type gallium nitride layer. Based on this, the light-emitting surface may be the surface of the n-type gallium nitride layer away from the p-type gallium nitride layer.

[0052] In the above embodiments, the first metal layer 302 and the second metal layer 301 can provide a stable bonding interface, thereby withstanding the thermal and mechanical stresses of the material during miniaturization and reducing material cracking and delamination problems caused by miniaturization. Thus, it is possible to fabricate micro-light-emitting diodes with a light-emitting unit 20 size of less than 5 μm.

[0053] Furthermore, such as Figure 5 As shown, the light-emitting functional layer 210 can be first patterned using a photolithography machine, exposing a plurality of first alignment marks on the first surface. Specifically, to first pattern the light-emitting functional layer 210 using a photolithography machine, the positions of the alignment mark regions can first be found within each exposure area based on the driving circuit layout information.

[0054] For example, such as Figure 5 As shown, five or more independent exposure areas symmetrical to the central exposure area are selected on the semiconductor substrate. Based on the driving circuit layout information, the alignment mark area is located in each independent exposure area. A pattern etching process is performed at this location to expose the alignment mark (i.e., mark clear).

[0055] It should be noted that the exposure area refers to the surface region of the wafer (corresponding to the semiconductor substrate after bonding) to be patterned during the photolithography process. These areas are planned based on the driver circuit layout information. The driver circuit layout information is created during the design phase and contains the precise location information of all circuit elements and alignment marks. This information is typically stored in files in formats such as GDSII or OASIS. By reading and parsing this design data, the photolithography machine can determine the specific coordinates of each exposure area and alignment mark, and the alignment mark areas are periodically distributed along with the exposure areas.

[0056] It is understandable that, such as Figure 5 As shown, when there is a bonding metal layer 30 between the light-emitting functional layer 210 and the driving substrate 100, in order to expose the plurality of first alignment marks on the first surface, the bonding metal layer 30 also needs to be patterned in the step of first patterning the light-emitting functional layer 210 using a photolithography machine.

[0057] Optionally, before the step of first patterning the light-emitting functional layer 210 in order to find the alignment mark region location, the fabrication method further includes: forming a notch mark (not shown) at the edge location of the semiconductor substrate; transferring the semiconductor substrate with the notch mark to a photolithography machine; and aligning the semiconductor substrate and the photolithography machine using the notch mark.

[0058] In the above steps, notch markings can be formed at the edge of the semiconductor substrate through wafer edge processing.

[0059] In summary, to expose multiple first alignment marks on the first surface of the driving substrate 100, a semiconductor substrate can be loaded or transferred into a lithography machine. The notch detection system of the lithography machine can then search for the notch marks by looking along the edges of the semiconductor substrate. The optical sensor of the notch detection system can transmit the captured notch information to the control system of the lithography machine. Based on the detected notch information, the control system directs the wafer stage to translate and rotate to position the notch at a fixed reference position inside the lithography machine, thereby achieving initial alignment between the semiconductor substrate and the lithography machine. Once the semiconductor substrate and the lithography machine are aligned, the alignment system of the lithography machine will locate each exposure area on the semiconductor substrate based on the coordinate data in the driving circuit layout information, and find the alignment mark area positions corresponding to multiple first alignment marks in each exposure area. This allows for the first patterning of the light-emitting functional layer 210 (or the light-emitting functional layer 210 and the bonding metal layer 30) to expose the multiple first alignment marks.

[0060] Based on this, the exposed first alignment marks can be used to perform a second patterning of the light-emitting functional layer 210. Optionally, the process of covering the side of the light-emitting functional layer 210 away from the driving substrate 100 with a mask (with second alignment marks) and the process of aligning the first alignment marks and the second alignment marks on the mask can both be implemented using a photolithography machine.

[0061] For example, when multiple first alignment marks are exposed on the driving substrate 100, the alignment system of the lithography machine (such as an optical alignment system) can begin to inspect the surface of the semiconductor substrate. The alignment system automatically identifies the exposed multiple first alignment marks, and once the first alignment marks are identified, the lithography machine adjusts the position of the wafer stage to ensure that the multiple first alignment marks on the driving substrate 100 of the semiconductor substrate are completely aligned with the alignment reference points of the lithography machine. It is worth mentioning that this is achieved through a high-precision mechanical and optical system, achieving nanometer-level alignment accuracy.

[0062] Furthermore, after the multiple first alignment marks on the driving substrate 100 are fully aligned with the lithography alignment system, the next step is to align the semiconductor substrate and the lithography mask (with second alignment marks), i.e., align the first and second alignment marks. The mask contains a preset pattern of the light-emitting unit 20. Once the semiconductor substrate and the mask are precisely positioned, the exposure process begins, i.e., the light-emitting functional layer 210 is second-patterned, thereby forming the microstructure of the light-emitting unit 20, such as... Figure 6 As shown. It is important to emphasize that in this application, the light-emitting functional layer 210 is patterned after the second alignment mark on the mask is aligned directly rather than indirectly with a plurality of first alignment marks on the driving substrate 100, thereby achieving higher alignment accuracy between the light-emitting unit 20 and the driving circuit on the driving substrate 100.

[0063] In summary, this application also provides a miniature light-emitting diode device, including: as shown in the figure. Figure 6 As shown, the driving substrate 100 has a first surface, and a first region of the first surface is distributed with a plurality of first alignment marks (not shown in the figure) spaced apart; the light-emitting unit 20 is located on one side of the driving substrate 100 having the first surface, and the orthographic projection of the light-emitting unit 20 on the first surface is located in a second region of the first surface, which is the region of the first surface other than the first region.

[0064] The driver substrate 100 plays a central role in the operation of the Micro-LED array, responsible for providing precise current control to each individual light-emitting unit 20. It is worth noting that, to achieve this function, such as... Figure 6As shown, the driving substrate 100 is provided with pads 102 corresponding to the light-emitting unit 20. These pads 102 are electrically connected to the light-emitting unit 20 to ensure that the corresponding light-emitting unit 20 can receive independent driving signals.

[0065] For example, such as Figure 6 As shown, there may be multiple pads 102 on the driving substrate 100, and the driving substrate 100 may also have a first insulating dielectric layer 101, so that the first insulating dielectric layer 101 can be located between two adjacent pads 102 to achieve electrical isolation between two adjacent pads 102.

[0066] Specifically, the driving substrate 100 and the light-emitting unit 20 can be physically connected by bonding.

[0067] Optionally, the first alignment mark may include, but is not limited to, a cross shape, a grid shape, or other easily recognizable patterns.

[0068] Specifically, the driving substrate 100 described above can be a silicon-based driving substrate. Optionally, the silicon-based driving substrate may include a CMOS driving circuit.

[0069] Specifically, such as Figure 6 As shown, a miniature light-emitting diode device may include multiple light-emitting units 20. It can be understood that multiple pads 102 correspond one-to-one with multiple light-emitting units 20, so that each light-emitting unit 20 can receive an independent driving signal.

[0070] Specifically, the light-emitting functional layer corresponding to the aforementioned light-emitting unit 20 can be a GaN epitaxial light-emitting functional layer.

[0071] In some alternative implementations, such as Figure 6 As shown, in order to improve the reliability of the electrical connection between the light-emitting unit 20 and the driving substrate 100 and the stability of the device performance, the micro light-emitting diode device further includes a bonding metal layer 30, and the bonding metal layer 30 is located between the driving substrate 100 and the light-emitting unit 20.

[0072] Specifically, such as Figure 6 As shown, the side surface of the light-emitting unit 20 can be aligned with the side surface of the bonding metal layer 30 on the same horizontal plane. That is, the light-emitting unit 20 and the bonding metal layer can be formed in the same etching process, so this application is compatible with advanced semiconductor manufacturing processes and can meet the needs of large-scale mass production.

[0073] Specifically, such as Figure 6 As shown, the bonding metal layer 30 can be contacted with the pads 102 on the driving substrate 100.

[0074] It is worth mentioning that the aforementioned bonding metal layer 30 not only serves as an electrode connection layer between the light-emitting unit 20 and the driving substrate 100, realizing the physical connection between the driving substrate 100 and the light-emitting unit 20, but also realizes the heterogeneous integration of the silicon-based CMOS driving circuit and the GaN epitaxial light-emitting functional layer. This solves the problem that direct bonding may generate stress when the temperature changes due to the different thermal expansion coefficients of silicon and gallium nitride, leading to material cracks or delamination, thereby improving the stability and reliability of the bonding structure.

[0075] In some alternative implementations, such as Figure 6 As shown, the light-emitting unit 20 includes a plurality of units spaced apart along a first direction A, which is parallel to the first surface. In order to prevent light crosstalk between two adjacent light-emitting units 20 in the first direction A, the micro light-emitting diode device also includes a dielectric isolation structure, which is located between adjacent light-emitting units 20. The dielectric isolation structure is in contact with the first surface and spaced apart from the bonding metal layer 30.

[0076] Specifically, such as Figure 7 and Figure 8 As shown, to form the dielectric isolation structure 40, after fabricating the light-emitting unit 20, an insulating material layer 103 can be deposited first on the side of the light-emitting unit 20 away from the driving substrate 100, so that the insulating material layer 103 covers the light-emitting unit 20. Then, the insulating material layer 103 can be patterned, removing a portion of the insulating material between two adjacent light-emitting units 20 to expose a portion of the first surface, forming an isolation region between two adjacent light-emitting units 20 (not shown in the figure), and the remaining portion of the insulating material in the insulating material layer 103 located between two adjacent light-emitting units 20 covers the sidewall of the light-emitting unit 20, forming a second insulating dielectric layer 104. Metal can then be deposited within the isolation region to form the aforementioned dielectric isolation structure 40 between two adjacent light-emitting units 20.

[0077] Specifically, the material of the dielectric isolation structure 40 can be a metallic material, that is, the materials used to form the second insulating dielectric layer 104 and the dielectric isolation structure 40 are different.

[0078] Thus, as Figure 8 , Figure 9 and Figure 10As shown, in the case of a miniature light-emitting diode device including a second insulating dielectric layer 104, the second insulating dielectric layer 104 is located between the dielectric isolation structure 40 and the light-emitting unit 20. Further, in the case where the miniature light-emitting diode device also includes a bonding metal layer 30, the aforementioned second insulating dielectric layer 104 is also located between the dielectric isolation structure 40 and the bonding metal layer 30. In this case, the light-emitting units 20 are double-isolated by the second insulating dielectric layer 104 and the dielectric isolation structure 40. Since the dielectric isolation structure 40 is made of metal, it can prevent optical crosstalk, increase the lateral reflectivity of the emitted light, and improve heat dissipation efficiency.

[0079] Of course, in some other exemplary embodiments, two adjacent light-emitting units 20 in a micro LED device may only include a second insulating dielectric layer 104 for electrical isolation.

[0080] In some alternative implementations, in order to achieve N-type circuit connection of the light-emitting unit, the micro light-emitting diode device further includes an electrode layer located on the side surface of the light-emitting unit away from the driving substrate.

[0081] Specifically, such as Figure 8 and Figure 9 As shown, after the step of forming the dielectric isolation structure 40, an electrode layer 50 can be formed on the side of the light-emitting unit 20 away from the driving substrate 100.

[0082] In some alternative implementations, to improve light output efficiency, the micro LED device also includes a lens located on the side of the light-emitting unit away from the driving substrate.

[0083] Specifically, such as Figure 9 and Figure 10 As shown, after the step of forming the electrode layer 50, a lens 60 can be formed on the side of the light-emitting unit 20 away from the driving substrate 100.

[0084] In some alternative implementations, such as Figure 11 As shown, for a micro LED array, the light-emitting units 20 include a plurality of units distributed along a first direction A and a second direction B. The plurality of light-emitting units 20 on the first direction A are spaced apart, and the plurality of light-emitting units 20 on the second direction B are spaced apart. Optionally, the driving substrate 100 has a first end and a second end opposite to each other on the second direction B. The second direction B is parallel to the first surface, and the first direction A is perpendicular to the second direction B. The dielectric isolation structure 40 includes: a first dielectric isolation structure 401, which is located between two adjacent light-emitting units 20 on the first direction A and extends from the first end to the second end along the second direction B.

[0085] Optionally, such as Figure 11As shown, the driving substrate 100 has a third end and a fourth end opposite to each other in the first direction A. The dielectric isolation structure 40 further includes: a second dielectric isolation structure 402, which is located between two adjacent light-emitting units 20 in the second direction B, and extends from the third end to the first dielectric isolation structure 401 along the first direction A or from the fourth end to the first dielectric isolation structure 401.

[0086] Based on this, the electrode layer 50 may include multiple electrode layers, each of which corresponds one-to-one with a plurality of light-emitting units 20 on the first direction A, and each electrode layer 50 contacts the side surface of the plurality of light-emitting units 20 disposed on the second direction B that is away from the driving substrate 100.

[0087] That is, through the above implementation method, multiple light-emitting units 20 in the second direction B can share an N-type electrode, thereby realizing the N-type circuit connection of multiple light-emitting units 20.

[0088] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0089] This application provides a miniature light-emitting diode (LED) device, including a driving substrate and light-emitting units. The driving substrate has a first surface, and a first region of the first surface has a plurality of spaced-apart first alignment marks. The light-emitting units are located on one side of the driving substrate with the first surface, and the orthographic projection of the light-emitting units on the first surface is located in a second region of the first surface, which is the region of the first surface excluding the first region. Based on this, by setting a plurality of first alignment marks on the driving substrate, this application allows for the patterning of the light-emitting functional layers corresponding to the driving substrate and the light-emitting units, firstly exposing the plurality of first alignment marks on the driving substrate, and then patterning the light-emitting functional layers again based on the exposed first alignment marks to obtain the light-emitting units. At this time, the pads on the driving substrate can achieve high-precision alignment with the corresponding light-emitting units, thereby enabling the miniature LED device to have reliable electrical connections and improving device yield.

[0090] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A miniature light-emitting diode device, characterized in that, include: A driving substrate has a first surface, and a plurality of first alignment marks are distributed at intervals in a first region of the first surface; The light-emitting unit is located on one side of the driving substrate having the first surface. The orthographic projection of the light-emitting unit on the first surface is located in a second region of the first surface, which is the region of the first surface other than the first region.

2. The miniature light-emitting diode device according to claim 1, characterized in that, The miniature light-emitting diode device also includes: A bonding metal layer is located between the driving substrate and the light-emitting unit.

3. The miniature light-emitting diode device according to claim 2, characterized in that, The light-emitting unit includes a plurality of units spaced apart along a first direction, the first direction being parallel to the first surface; the micro light-emitting diode device further includes: A dielectric isolation structure is located between adjacent light-emitting units; The dielectric isolation structure is disposed in contact with the first surface and spaced apart from the bonding metal layer.

4. The miniature light-emitting diode device according to claim 3, characterized in that, The miniature light-emitting diode device also includes: The pads are located on the driving substrate and are in contact with the bonding metal layer; A first insulating dielectric layer is located between the dielectric isolation structure and the pad.

5. The miniature light-emitting diode device according to claim 4, characterized in that, The miniature light-emitting diode device also includes: A second insulating dielectric layer is located between the dielectric isolation structure and the light-emitting unit, and between the dielectric isolation structure and the bonding metal layer. The second insulating dielectric layer and the dielectric isolation structure are formed of different materials.

6. The miniature light-emitting diode device according to claim 3, characterized in that, The driving substrate has a first end and a second end opposite each other in a second direction, the second direction being parallel to the first surface and the first direction being perpendicular to the second direction, and the dielectric isolation structure comprising: A first dielectric isolation structure is located between two adjacent light-emitting units in the first direction and extends from the first end to the second end along the second direction.

7. The miniature light-emitting diode device according to claim 6, characterized in that, The light-emitting unit includes a plurality of units spaced apart along the second direction, the driving substrate has opposing third and fourth ends in the first direction, and the dielectric isolation structure further includes: The second dielectric isolation structure is located between two adjacent light-emitting units in the second direction, and extends from the third end to the first dielectric isolation structure along the first direction or from the fourth end to the first dielectric isolation structure along the first direction.

8. The miniature light-emitting diode device according to any one of claims 1 to 7, characterized in that, The miniature light-emitting diode device also includes: An electrode layer is located on the surface of the light-emitting unit away from the driving substrate.

9. The miniature light-emitting diode device according to claim 8, characterized in that, In the case where the light-emitting units include a plurality of units distributed in an array along a first direction and a second direction, the electrode layers include a plurality of units, each of which corresponds one-to-one with the plurality of light-emitting units in the first direction, and each of the electrode layers is disposed in contact with the side surface of the plurality of light-emitting units in the second direction away from the driving substrate.

10. The miniature light-emitting diode device according to claim 8, characterized in that, The miniature light-emitting diode device also includes: The lens is located on the side of the light-emitting unit away from the driving substrate.

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