Silicon wafer bearing device

By designing the hollowed-out part and isolation structure of the silicon wafer carrier device, the problem of the coating carrier device scratching the silicon wafer was solved, and the quality and efficiency of double-sided coating of the silicon wafer were improved.

CN223844238UActive Publication Date: 2026-01-27TRINA SOLAR CO LTD
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Patent Information

Application Number
CN202520101632.0
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-01-16
Publication Date
2026-01-27
Estimated Expiration
2035-01-16

AI Technical Summary

Technical Problem

In the fabrication process of heterojunction solar cells, the coating carrier is prone to scratching the silicon wafer during transmission.

Method used

A silicon wafer support device is designed, including a support member and an isolation structure. The support member is provided with a hollow part and a blocking part, and the isolation structure is located on the support surface. The silicon wafer is supported by the isolation structure, which reduces the contact area between the silicon wafer and the support member and reduces the risk of friction.

Benefits of technology

This effectively reduces the risk of silicon wafers being scratched during the coating process, ensuring the quality and efficiency of double-sided coating.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to a silicon wafer bearing device, which comprises a bearing piece and an isolation structure, and is characterized in that the bearing piece comprises a bearing part and a surrounding part at least partially surrounding the bearing part; the bearing part is provided with a bearing face and a hollow part located on the side, away from the fence part, of the bearing face. The bearing piece is provided with the hollow part, so that the front surface and the back surface of the silicon wafer on the isolation structure can be exposed, and double-sided coating can be carried out on the silicon wafer. When double-sided coating operation is carried out on the silicon wafer, as the isolation structure is arranged on the bearing surface of the bearing part, the silicon wafer can be borne through the isolation structure, and the bearing part and the silicon wafer are isolated, so that the contact area between the silicon wafer and the bearing piece is reduced, and the possibility that the silicon wafer is rubbed when the bearing piece moves relative to the silicon wafer is reduced; and the risk that the silicon wafer is scratched is reduced.
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Description

Technical Field

[0001] This application relates to the field of solar cell technology, and in particular to silicon wafer carrier devices. Background Technology

[0002] In heterojunction solar cell fabrication, TCO (Transparent Conductive Oxide) thin films are currently mainly deposited on both sides using coating equipment. During the coating process, a coating support is used to hold the silicon wafer to prevent it from falling off. However, the silicon wafer is prone to scratches during this process. Utility Model Content

[0003] Therefore, it is necessary to provide a silicon wafer carrier device to address the problem that existing coating carriers are prone to scratching silicon wafers during the process of carrying silicon wafers.

[0004] A silicon wafer carrier device, comprising:

[0005] A support member, comprising a support portion and a retaining portion at least partially surrounding the support portion; the support portion having a support surface and an openwork portion located on the side of the support surface away from the retaining portion; and

[0006] An isolation structure is disposed on the bearing portion, at least a portion of which is located on the bearing surface.

[0007] In one embodiment, the orthographic projection of the isolation structure onto the bearing surface lies within the bearing surface.

[0008] In one embodiment, the enclosure portion is configured with at least one enclosure surface;

[0009] Wherein, any of the enclosure surfaces is not parallel to the bearing surface.

[0010] In one embodiment, the enclosure portion is constructed having a plurality of enclosure surfaces connected in sequence;

[0011] The multiple enclosure surfaces are not parallel to each other.

[0012] In one embodiment, an axis passing through the geometric center of the cutout and parallel to the depth direction of the cutout is defined as a reference axis;

[0013] Along the direction of gravity, the distance between the plurality of enclosure surfaces of the enclosure portion and the reference axis gradually decreases along a first direction; the first direction is the direction from the side of the enclosure portion closer to the reference axis to the other side of the enclosure portion away from the reference axis.

[0014] In one embodiment, at least one of the support portion and the isolation structure is provided with a snap-fit ​​portion, and at least the other is provided with a mating portion for snap-fitting with the snap-fit ​​portion.

[0015] In one embodiment, the isolation structure includes a first isolation portion and a snap-fit ​​portion connected to one side of the first isolation portion; the first isolation portion is located on the bearing surface;

[0016] The mating part is configured as a snap-fit ​​groove provided on the bearing surface; or, the mating part is configured as a snap-fit ​​hole extending through the bearing surface from the bearing surface.

[0017] In one embodiment, the mating part is configured as a snap-fit ​​hole that extends through the bearing surface into the bearing part;

[0018] The end of the snap-fit ​​portion opposite to the first isolation portion is provided with a locking portion that protrudes from the bearing portion;

[0019] The locking part extends out of the snap-fit ​​hole and abuts against the side surface of the bearing part opposite to the bearing surface.

[0020] In one embodiment, the radial dimension of the locking portion gradually decreases along the second direction;

[0021] Wherein, the second direction is parallel to the depth direction of the snap-fit ​​hole, and is the direction in which the bearing surface of the bearing part points to the side of the bearing part away from the bearing surface.

[0022] In one embodiment, the isolation structure further includes a second isolation portion connected to the side of the first isolation portion opposite to the snap-fit ​​portion, wherein the extending direction of the second isolation portion intersects the extending direction of the first isolation portion;

[0023] The second isolation portion is disposed on the side surface of the enclosure portion near the hollow portion.

[0024] In one embodiment, the silicon wafer carrier includes a plurality of carrier elements and a plurality of isolation structures;

[0025] The isolation structure is provided on at least a portion of the carrier.

[0026] Using the aforementioned silicon wafer carrier device, the carrier component has a perforated section, allowing both the front and back sides of the silicon wafer located on the isolation structure to be exposed, thus enabling double-sided coating of the silicon wafer. During the double-sided coating operation, the isolation structure on the carrier surface effectively supports the silicon wafer and separates the carrier component from the silicon wafer, thereby reducing the contact area between the silicon wafer and the carrier component. This reduces the possibility of friction between the carrier component and the silicon wafer during movement, and consequently lowers the risk of scratches on the silicon wafer. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of a silicon wafer carrier device provided in the first embodiment of this application.

[0028] Figure 2 This is a schematic diagram of a silicon wafer carrier device provided in the second embodiment of this application.

[0029] Figure 3 for Figure 2 A cross-sectional view of section AA in the silicon wafer carrier shown.

[0030] Figure 4 for Figure 3 The diagram shows an exploded view of the silicon wafer carrier device.

[0031] Figure 5 This is a cross-sectional view of the silicon wafer carrier device provided in the third embodiment of this application.

[0032] Figure 6 This is a cross-sectional view of the silicon wafer carrier device provided in the fourth embodiment of this application.

[0033] Figure 7 This is a cross-sectional view of the silicon wafer carrier device provided in the fifth embodiment of this application.

[0034] Figure 8 This is a cross-sectional view of the silicon wafer carrier device provided in the sixth embodiment of this application.

[0035] Figure 9 This is a cross-sectional view of the silicon wafer carrier device provided in the seventh embodiment of this application.

[0036] Reference numerals: 100, bearing component; 110, bearing part; 111, bearing surface; 112, hollow part; 113, mating part; 1131, snap-fit ​​hole; 114, bearing block; 120, enclosure part; 121, enclosure surface; 130, bearing groove;

[0037] 200. Isolation structure; 210. Isolation block; 211. First isolation part; 212. Snap-fit ​​part; 213. Locking part; 214. Second isolation part;

[0038] 1000. Silicon wafers. Detailed Implementation

[0039] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0040] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0041] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0042] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0043] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0044] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0045] Currently, in the TCO (Transparent Conductive Oxide) thin film deposition process of heterojunction solar cells, a deposition support is used to hold the silicon wafer to prevent it from falling off. The inventors of this application have discovered that the deposition support accelerates or decelerates during transmission, which can easily cause relative movement between the support and the silicon wafer, resulting in friction and scratches on the wafer.

[0046] Based on this, an embodiment of this application provides a silicon wafer carrier device that can solve the above problems. The silicon wafer carrier device provided in an embodiment of this application will be described in detail below with reference to the accompanying drawings.

[0047] See Figures 1 to 4 As shown, a silicon wafer carrier device provided in one embodiment of this application includes a carrier 100, the carrier 100 including a carrier portion 110 and a retaining portion 120 at least partially surrounding the carrier portion 110; the carrier portion 110 is configured with a carrier surface 111 and a hollow portion 112 located on the side of the carrier surface 111 away from the retaining portion 120; the silicon wafer carrier device also includes an isolation structure 200 disposed on the carrier portion 110, at least a portion of the isolation structure 200 being located on the carrier surface 111.

[0048] This silicon wafer support device can be applied to coating equipment, such as magnetron sputtering coating equipment and plasma-enhanced chemical vapor deposition equipment. The silicon wafer support device supports the silicon wafer 1000, using the obstruction of the enclosure 120 and the support of the support 110 to prevent the silicon wafer 1000 from falling and to prevent short circuits between the front and back TCO films of adjacent silicon wafers 1000. Using the aforementioned silicon wafer support device, because the support member 100 is provided with a cutout 112, both the front and back sides of the silicon wafer 1000 located on the isolation structure 200 can be exposed, thus enabling double-sided coating of the silicon wafer 1000. When performing double-sided coating on the silicon wafer 1000, since the bearing surface 111 of the bearing part 110 is provided with an isolation structure 200, the silicon wafer 1000 can be supported by the isolation structure 200, and the bearing part 110 and the silicon wafer 1000 can be separated. This reduces the contact area between the silicon wafer 1000 and the bearing 100, reduces the possibility of friction between the bearing 100 and the silicon wafer 1000 when the bearing moves relative to the silicon wafer 1000, and thus reduces the risk of the silicon wafer 1000 being scratched.

[0049] In one embodiment, the isolation structure 200 may be made of a flexible material such as rubber. The isolation structure 200 may be a sheet-like isolation sheet with a thickness of less than 1 mm along the direction of gravity. The cross-sectional shape of the isolation sheet may be circular, square, triangular, or polygonal, etc., and is not specifically limited.

[0050] In another embodiment, the isolation structure 200 is made of an insulating material, including PEEK (polyetheretherketone), PFA (polytetrafluoroethylene alkoxy resin), PTFE (polytetrafluoroethylene), or PPS (polyphenylene sulfide). By placing the isolation structure 200 made of insulating material between the carrier 100 and the silicon wafer 1000, insulation is achieved between the silicon wafer 1000 and the carrier 100, reducing the risk of arcing of the silicon wafer 1000 during the coating process and ensuring the coating quality.

[0051] like Figure 3 and Figure 4 As shown, in one embodiment, at least one of the support portion 110 and the isolation structure 200 is provided with a snap-fit ​​portion 212, and at least the other is provided with a mating portion 113 for snap-fitting with the snap-fit ​​portion 212. For example, in Figure 4In the illustrated embodiment, the support portion 110 is configured with a mating portion 113, and the isolation structure 200 is configured with a snap-fit ​​portion 212 that snaps into the mating portion 113. One of the snap-fit ​​portion 212 and the mating portion 113 can be a snap-fit ​​post, and the other can be a snap-fit ​​groove that mates with the snap-fit ​​post. Through the mating of the snap-fit ​​portion 212 and the mating portion 113, the connection reliability between the isolation structure 200 and the support portion 110 is improved, the possibility of the isolation structure 200 detaching from the support portion 110 is reduced, and the reliability of the isolation structure 200 in isolating the silicon wafer 1000 and the support portion 110 is improved, thereby reducing the risk of the support portion 110 rubbing against the silicon wafer 1000.

[0052] In other embodiments, the positions of the snap-fit ​​portion and the mating portion can be interchanged; that is, the support portion is constructed with a snap-fit ​​portion, and the isolation structure is constructed with a mating portion for engaging with the snap-fit ​​portion. Alternatively, in yet another embodiment, the isolation structure and the support portion can each be provided with a first snap-fit ​​portion and a second snap-fit ​​portion, with the support portion and the isolation structure respectively positioned at a first mating portion for engaging with the first snap-fit ​​portion and a second mating portion for engaging with the second snap-fit ​​portion, further improving the connection reliability between the isolation structure and the support portion.

[0053] like Figure 3 and Figure 4 As shown, in one embodiment, the isolation structure 200 includes a first isolation portion 211 and a snap-fit ​​portion 212 connected to one side of the first isolation portion 211. The first isolation portion 211 is located on the bearing surface 111, that is, the first isolation portion 211 is located between the bearing portion 110 and the silicon wafer 1000 to isolate the silicon wafer 1000 and the bearing portion 110. The snap-fit ​​portion 212 is constructed as a snap-fit ​​post. Correspondingly, the mating portion 113 is constructed as a snap-fit ​​groove provided on the bearing surface 111, and the snap-fit ​​post and the snap-fit ​​groove are snap-fitted together to realize the connection between the isolation structure 200 and the bearing portion 110.

[0054] like Figure 3 and Figure 4 As shown, in one embodiment, the snap-fit ​​portion 212 is configured as a snap-fit ​​post, and the mating portion 113 is configured as a snap-fit ​​hole 1131 that penetrates the bearing portion 110 from the bearing surface 111. The end of the snap-fit ​​portion 212 opposite to the first isolation portion 211 has a locking portion 213 protruding from the bearing portion 110. The locking portion 213 extends out of the snap-fit ​​hole 1131 and abuts against the side surface of the bearing portion 110 opposite to the bearing surface 111. In other words, the mating portion 113 is a through hole, and the isolation structure 200 penetrates the bearing portion 110. This arrangement increases the connection area between the isolation structure 200 and the bearing portion 110, further improving the connection reliability between them. This, in turn, improves the reliability of the isolation structure 200 between the silicon wafer 1000 and the bearing portion 110, and reduces the possibility of the bearing portion 110 wearing down the silicon wafer 1000.

[0055] like Figure 3 and Figure 4 As shown, in one embodiment, the radial dimension of the locking portion 213 gradually decreases along the second direction; wherein, the second direction is parallel to the depth direction of the snap-fit ​​hole 1131, and is the direction in which the bearing surface 111 of the bearing portion 110 points to the side of the bearing portion 110 opposite to the bearing surface 111. Figure 3 As shown, the second direction is indicated by an arrow. Understandably, the locking part 213 is made of a flexible material such as rubber. Therefore, when the isolation structure 200 is installed onto the support part 110, the locking part 213 undergoes elastic deformation, allowing it to pass through the mating part 113 constructed on the support part 110, thus achieving the connection between the isolation structure 200 and the support part 110. Simultaneously, since the maximum dimension of the locking part 213 along the first direction is larger than the dimension of the mating part 113, the possibility of the isolation structure 200 detaching from the mating part 113 can be reduced by the blocking effect of the locking part 213; at the same time, under the gravity of the silicon wafer 1000, the isolation structure 200 can also be pressed firmly onto the isolation part, reducing the risk of the isolation structure 200 falling off the support part 110.

[0056] like Figure 3 As shown, in one embodiment, the direction from the first isolating part 211 to the locking part 213, that is... Figure 3 As shown in the direction of gravity, the size of the locking portion 213 gradually decreases along the first direction. For example, in this embodiment, the locking portion 213 is an inverted cone shape, and both sides of the locking portion 213 along the first direction are inclined surfaces, that is, the longitudinal cross-section of the locking portion 213 is an inverted triangle. Thus, when the locking portion 213 is inserted into the mating portion 113 on the bearing portion 110, the inclined surfaces of the locking portion 213 can play a guiding role, improving the smoothness of the insertion of the isolation structure 200 into the bearing portion 110. It is understood that in other embodiments, the longitudinal cross-section of the isolation portion can also be an inverted trapezoid, and there is no specific limitation.

[0057] like Figure 6 As shown, in one embodiment, the isolation structure 200 further includes a second isolation portion 214 connected to the side of the first isolation portion 211 opposite to the snap-fit ​​portion 212, the extending direction of the second isolation portion 214 intersecting the extending direction of the first isolation portion 211; the second isolation portion 214 is disposed on the surface of the enclosure portion 120 near the hollow portion 112. For example, in Figure 4In the illustrated embodiment, the first isolation portion 211 and the second isolation portion 214 make a portion of the isolation structure 200 L-shaped. When the silicon wafer 1000 is supported within the silicon wafer carrier, the second isolation portion 214 isolates the sidewall of the silicon wafer 1000 from the enclosure portion 120, thereby further reducing the contact area between the carrier 100 and the silicon wafer 1000 and reducing the possibility of wear on the silicon wafer 1000. In addition, the second isolation portion 214 can also fill the gap between the sidewall of the silicon wafer 1000 and the enclosure portion 120, allowing the silicon wafer 1000 to abut against the flexible second isolation portion 214, making the connection between the silicon wafer 1000 and the silicon wafer carrier more compact, reducing the possibility of displacement of the silicon wafer 1000, and thus ensuring the accuracy of the coating position.

[0058] like Figure 2 and Figure 3 As shown, in one embodiment, an axis passing through the geometric center of the cutout 112 and parallel to the depth direction of the cutout 112 is defined as a reference axis, for example, in Figure 2 In the illustrated embodiment, the cutout portion 112 is a rectangular through hole, and its geometric center is the centroid of the rectangle. The distance from this geometric center to all positions on the wall of the cutout portion 112 is equal. Figure 3 As shown, the reference axis is indicated by a dashed line. The enclosure portion 120 is constructed as a continuous structure surrounding the reference axis. For example, in... Figure 2 In the embodiment shown, the enclosure 120 is a ring structure. By setting the enclosure 120 to a ring shape, stress concentration can be reduced and the stability of the overall structure can be improved. At the same time, the ring structure can be standardized for production and is easy to process and manufacture.

[0059] like Figure 5 As shown, in one embodiment, the enclosure portion 120 is constructed with at least one enclosure surface 121, wherein any enclosure surface 121 is not parallel to the bearing surface 111, that is, the enclosure surface 121 is inclined relative to the bearing surface 111. In one embodiment, the enclosure portion 120 is constructed with a plurality of enclosure surfaces 121 connected in sequence; the plurality of enclosure surfaces 121 are not parallel to each other. For example, in Figure 5 In the illustrated embodiment, there are two obstruction surfaces 121, and the slopes of the two obstruction surfaces 121 are different. Thus, the obstruction surfaces 121 block and limit the silicon wafer 1000, preventing displacement of the silicon wafer 1000 relative to the supporting surface 111. Furthermore, when the silicon wafer supporting device supports multiple silicon wafers, the obstruction surfaces 121 can form a shield between two adjacent silicon wafers 1000, reducing the impact of sputtering during coating between adjacent silicon wafers 1000 and ensuring the coating effect of the corresponding silicon wafer 1000. In other embodiments, only one obstruction surface may be provided.

[0060] like Figure 5As shown, in one embodiment, an axis passing through the geometric center of the cutout 112 and parallel to the depth direction of the cutout 112 is defined as the reference axis; along the direction of gravity, the distance between the plurality of enclosure surfaces 121 of the enclosure 120 and the reference axis gradually decreases along a first direction; the first direction is the direction from the side of the enclosure 120 near the reference axis to the other side of the enclosure 120 away from the reference axis, such as... Figure 5 As shown, the first direction is indicated by an arrow, which can be understood as the direction of gravity from top to bottom. That is to say, the size of the space enclosed by the enclosure 120 gradually expands outward from bottom to top. Thus, when performing a coating operation on the silicon wafer 1000 supported by the silicon wafer carrier, compared to a straight enclosure surface, the outwardly expanding enclosure surface 121 increases the opening of the carrier groove 130 formed by the carrier member 100, thereby reducing the obstruction of the plasma by the enclosure 120, ensuring that the plasma is fully sputtered onto the surface of the silicon wafer 1000, and improving the coating effect of the silicon wafer 1000.

[0061] like Figure 5 As shown, in one embodiment, the size of the support groove 130 defined by the retaining portion 120 is slightly larger than the size of the silicon wafer 1000, that is, there is a gap G between the retaining portion 120 and the sidewall of the silicon wafer 1000, which is less than 1 mm. By setting this gap, the processing errors of the retaining portion 120 and the silicon wafer 1000 are accommodated, ensuring that the silicon wafer 1000 can be placed into the support groove 130.

[0062] like Figure 2 As shown, in one embodiment, the support portion 110 is constructed as a continuous structure surrounding the aforementioned reference axis, that is, the support portion 110 is a ring structure. This configuration increases the support area of ​​the support portion 110 for supporting the silicon wafer 1000 and makes the support force distribution more uniform, improving the support stability of the silicon wafer 1000; simultaneously, the ring structure can be standardized for production, making it easy to process and manufacture. Further, the isolation structure 200 includes multiple isolation blocks 210, which are spaced apart and arranged around the reference axis; the isolation blocks 210 are connected to the support surface 111. This further saves material used in the isolation structure 200 and reduces manufacturing costs. Each isolation block 210 includes the aforementioned first isolation portion 211, snap-fit ​​portion 212, and locking portion 213 to improve the connection effect between the isolation block 210 and the support portion 110.

[0063] like Figure 8As shown, in another embodiment, the support portion 110 is constructed as a continuous structure surrounding the aforementioned reference axis, and the isolation structure 200 is constructed as a continuous structure surrounding the reference axis. That is, both the support portion 110 and the isolation structure 200 are annular structures. In addition to the advantages of the aforementioned annular structure, this also increases the contact area between the isolation structure 200 and the silicon wafer 1000, which is more conducive to improving the stability of the silicon wafer support device in supporting the silicon wafer 1000 and reducing the possibility of the support member 100 contacting the silicon wafer 1000.

[0064] like Figure 7 As shown, in other embodiments, the support portion 110 includes a plurality of support blocks 114, which are spaced apart and arranged around a reference axis; each support block 114 is configured with a support surface 111; the gap between the support blocks 114 located on opposite sides of the reference axis forms a hollow portion 112. This further saves material used in the support member 100 and reduces manufacturing costs. Figure 7 In the embodiment shown, the isolation structure 200 includes a plurality of isolation blocks 210, which are spaced apart and arranged around the reference axis, thereby saving the manufacturing cost of the isolation structure 200; each isolation block 210 is connected to the bearing surface 111, that is, the positions of the isolation block 210 and the bearing block 114 correspond.

[0065] like Figure 7 As shown, in one embodiment, the orthographic projection of the isolation structure 200 onto the bearing surface 111 lies within the bearing surface 111. For example, in Figure 5 In the illustrated embodiment, the width W2 of the isolation structure 200 along the first direction is not greater than the width W1 of the bearing surface 111 along the first direction. That is, the isolation structure 200 will not extend relative to the bearing surface 111 along the first direction, thereby reducing the possibility of the isolation structure 200 blocking the lower surface of the silicon wafer 1000, ensuring that the plasma can fully contact and sputter onto the lower surface of the silicon wafer 1000, and ensuring the coating effect on the lower surface of the silicon wafer 1000.

[0066] In another embodiment, such as Figure 9 As shown, the support portion 110 includes a plurality of support blocks 114, which are spaced apart and arranged around a reference axis; each support block 114 is constructed with a support surface 111; the gap between the support blocks 114 located on opposite sides of the reference axis forms a hollow portion 112. Figure 9 In the embodiment shown, the isolation structure 200 is constructed as a continuous structure around the reference axis, that is, the isolation structure 200 is a ring structure, which overlaps on the bearing surface 111 of each bearing block 114, thereby isolating the silicon wafer 1000 from the bearing block 114.

[0067] like Figure 1As shown, in one embodiment, the silicon wafer carrier includes a plurality of carrier members 100 and a plurality of isolation structures 200; at least a portion of the carrier members 100 are provided with isolation structures 200. For example, in Figure 1 In the illustrated embodiment, each carrier 100 is provided with a corresponding isolation structure 200. Thus, the silicon wafer carrier device can simultaneously support multiple silicon wafers 1000, thereby enabling batch coating of the silicon wafers 1000 and improving coating efficiency. In one embodiment, the carrier 100 can be a metal plate. Hollow grooves are cut into the metal plate, forming the aforementioned hollow portion 112. Stepped portions are machined into the groove walls of each hollow groove, thereby forming a retaining portion 120 and a carrier portion 110, respectively.

[0068] like Figure 1 As shown, in one embodiment, when the silicon wafer carrier is provided with multiple carriers 100 to carry multiple silicon wafers 1000, the enclosure portion 120 can not only block and limit the silicon wafers 1000 to prevent them from shifting, but also form a shield between two adjacent silicon wafers 1000 to reduce the impact of coating sputtering between two adjacent silicon wafers 1000 and ensure the coating effect of the corresponding silicon wafers 1000.

[0069] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0070] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A silicon wafer carrier device, characterized in that, The silicon wafer carrier includes: A support member (100) includes a support portion (110) and a retaining portion (120) at least partially surrounding the support portion (110); the support portion (110) is configured with a support surface (111) and a cutout portion (112) located on the side of the support surface (111) away from the retaining portion (120); and An isolation structure (200) is disposed on the support portion (110), at least a portion of the isolation structure (200) being located on the support surface (111).

2. The silicon wafer carrier device according to claim 1, characterized in that, The orthographic projection of the isolation structure (200) onto the bearing surface (111) lies within the bearing surface (111).

3. The silicon wafer carrier device according to claim 1, characterized in that, The enclosure part (120) is constructed with at least one enclosure surface (121). Wherein, any of the enclosure surfaces (121) are not parallel to the bearing surface (111).

4. The silicon wafer carrier device according to claim 3, characterized in that, The enclosure section (120) is constructed with a plurality of enclosure surfaces (121) connected in sequence. The multiple enclosure surfaces (121) are not parallel to each other.

5. The silicon wafer support device according to claim 4, characterized in that, The axis passing through the geometric center of the cutout (112) and parallel to the depth direction of the cutout (112) is defined as the reference axis; Along the direction of gravity, the distance between the plurality of enclosure surfaces (121) of the enclosure portion (120) and the reference axis gradually decreases along a first direction; the first direction is the direction from the side of the enclosure portion (120) close to the reference axis to the other side of the enclosure portion (120) away from the reference axis.

6. The silicon wafer carrier device according to any one of claims 1-5, characterized in that, At least one of the bearing portion (110) and the isolation structure (200) is provided with a snap-fit ​​portion (212), and at least the other is provided with a mating portion (113) for snap-fitting with the snap-fit ​​portion (212).

7. The silicon wafer carrier device according to claim 6, characterized in that, The isolation structure (200) includes a first isolation part (211) and a snap-fit ​​part (212) connected to one side of the first isolation part (211); the first isolation part (211) is located on the bearing surface (111); The mating part (113) is configured as a snap-fit ​​groove provided on the bearing surface (111); or, the mating part (113) is configured as a snap-fit ​​hole (1131) that extends from the bearing surface (111) through the bearing part (110).

8. The silicon wafer carrier device according to claim 7, characterized in that, The mating part (113) is configured as a snap-fit ​​hole (1131) that extends from the bearing surface (111) through the bearing part (110). The snap-fit ​​portion (212) has a locking portion (213) protruding from the bearing portion (110) at one end opposite to the first isolation portion (211). The locking part (213) extends out of the snap-fit ​​hole (1131) and the abutment limit is located on the side surface of the bearing part (110) opposite to the bearing surface (111).

9. The silicon wafer carrier device according to claim 8, characterized in that, Along the second direction, the radial dimension of the locking part (213) gradually decreases; Wherein, the second direction is parallel to the depth direction of the snap-fit ​​hole (1131), and is the direction in which the bearing surface (111) of the bearing portion (110) points to the side of the bearing portion (110) away from the bearing surface (111).

10. The silicon wafer carrier device according to claim 7, characterized in that, The isolation structure (200) further includes a second isolation part (214) connected to the side of the first isolation part (211) opposite to the snap-fit ​​part (212), and the extending direction of the second isolation part (214) intersects the extending direction of the first isolation part (211); The second isolation part (214) is disposed on the side surface of the enclosure part (120) near the hollow part (112).

11. The silicon wafer carrier device according to any one of claims 1-5, characterized in that, The silicon wafer carrier device includes multiple carrier elements (100) and multiple isolation structures (200). The isolation structure (200) is provided on at least a portion of the carrier (100).